Abstract: An array substrate includes a substrate, an active layer, a first insulating layer, a first metal layer, a second insulating layer, a second metal layer and a barrier layer. The array substrate includes a thin film transistor (TFT) area, the first metal layer includes a gate sub-layer located in the TFT area, and an orthographic projection of the barrier layer covers at least part of an orthographic projection of an active layer exposed area in the TFT area on the active layer. The TFT area includes a driving TFT sub-area located in which the gate sub-layer includes a first gate, the active layer includes a first active sub-layer and the barrier layer includes a first barrier sub-layer, and an orthographic projection of the first barrier sub-layer on the first active sub-layer covers at least part of an orthographic projection of the first gate on the first active sub-layer.

Abstract: A display panel and a manufacturing method are provided. The present disclosure can reduce process steps of the display panel by disposing a first source electrode and a first drain electrode of a low temperature polysilicon thin film transistor and a second source electrode and a second drain electrode of an oxide thin film transistor in a same layer. Therefore, stability of the oxide thin film transistor can be improved, a channel length of the oxide thin film transistor can be shortened correspondingly, resolution of the display panel can be improved, and a thickness of the display panel can be reduced.

Abstract: An array substrate, a manufacturing method thereof, and a display panel are provided. By disposing first electrodes and second electrodes on top and bottom sides of an active layer, respectively, and disposing a part of each gate electrode among sub-active patterns, the array substrate is formed with vertical-structured thin film transistors. Therefore, a channel resistance can be reduced, and a channel width of the thin film transistors can be reduced, thereby reducing an area of the thin film transistors, reducing impedance of the thin film transistors, and reducing power consumption of the display panel.

Abstract: An array substrate and a manufacturing method thereof are provided. The array substrate includes a substrate, an active layer, a first insulating layer, a first metal layer, a second insulating layer, and a second metal layer. The array substrate includes a thin film transistor (TFT) area, and the second metal layer includes a source-drain metal sub-layer located in the TFT area. The TFT area is defined with an active layer exposed area. The array substrate includes a barrier layer, and an orthographic projection of the barrier layer on the active layer at least partially covers an orthographic projection of the active layer exposed area on the active layer.

Abstract: An embodiment of the application discloses a panel and a manufacturing method thereof. In the panel, a thin-film transistor layer, a first conductive layer, a light-emitting diode (LED), and a second conductive layer are sequentially disposed on a substrate. The LED includes a first end and a second end. The first end is disposed on the first electrode. The second end is disposed on the second electrode. The second conductive layer includes a first conductive portion and a second conductive portion. The first conductive portion is electrically connected to the first end and the first electrode. The second conductive portion is electrically connected to the second end and the second electrode.

Abstract: The present disclosure provides a display panel, a manufacturing method thereof, and a display device. The display panel includes a substrate and a thin film transistor layer disposed on the substrate, wherein the thin film transistor layer includes an active layer, a metal layer, and an anti-reflection layer; the anti-reflection layer is at least disposed on a side of the metal layer close to the active layer, and a reflectivity of the anti-reflection layer is less than a reflectivity of the metal layer.

Abstract: A display panel includes a substrate, an active layer, a first metal layer and a second metal layer. The active layer is disposed on the substrate and includes a plurality of the driving active portions, and each driving active portion comprises a conductor sub-layer and a first semiconductor sub-layer. The first metal layer is disposed on a side of the active layer away from the substrate and includes a plurality of the driving gates, one of the plurality of the driving gates is correspondingly located on a side of the driving active portion away from the substrate. The second metal layer disposed on a side of the first metal layer away from the active layer and includes a plurality of the driving source electrodes and a plurality of the driving drain electrodes. The conductor sub-layer includes a first conductor sub-portion and a second conductor sub-portion arranged at intervals.

Abstract: A display panel and a manufacturing method thereof are disclosed. The display panel includes a substrate, an active layer, and a first metal layer. The active layer is disposed on one side of the substrate and includes a plurality of driving active parts, and each driving active part includes a first conductive subsection and a second conductive subsection spaced apart from each other, and a channel subsection connected between the first conductive subsection and the second conductive subsection. The first metal layer is disposed on one side of the active layer away from the substrate and includes a plurality of driving gates. A size of the channel subsection in a first direction is less than a size of the driving gates in the first direction, and the first direction is a direction in which the first conductive subsection points to the second conductive subsection.

Abstract: A display panel and a manufacturing method thereof are disclosed. The display panel includes a substrate, an active layer, and a first metal layer. The active layer is disposed on one side of the substrate and includes a plurality of driving active parts, and each driving active part includes a first conductive subsection and a second conductive subsection spaced apart from each other, and a channel subsection connected between the first conductive subsection and the second conductive subsection. The first metal layer is disposed on one side of the active layer away from the substrate and includes a plurality of driving gates. A size of the channel subsection in a first direction is less than a size of the driving gates in the first direction, and the first direction is a direction in which the first conductive subsection points to the second conductive subsection.

Abstract: A display panel includes a substrate, an active layer, a first metal layer and a second metal layer. The active layer is disposed on the substrate and includes a plurality of the driving active portions, and each driving active portion comprises a conductor sub-layer and a first semiconductor sub-layer. The first metal layer is disposed on a side of the active layer away from the substrate and includes a plurality of the driving gates, one of the plurality of the driving gates is correspondingly located on a side of the driving active portion away from the substrate. The second metal layer disposed on a side of the first metal layer away from the active layer and includes a plurality of the driving source electrodes and a plurality of the driving drain electrodes. The conductor sub-layer includes a first conductor sub-portion and a second conductor sub-portion arranged at intervals.

Abstract: The present invention discloses a micro light emitting diode display substrate and a manufacturing method thereof. The substrate includes an underlay substrate, a thin film transistor and a micro light emitting diode disposed on a top surface of the underlay substrate and connected to each other, a first metal film layer disposed on a bottom surface of the underlay substrate and at least formed with fanout circuit pattern and a side printed bonding pad. The fanout circuit pattern is connected to the side printed bonding pad, the side printed bonding pad is connected to the thin film transistor through a side wire such that after the display substrate is assembled with a bezel, a top surface display pixel region can maximally approach the bezel, to achieve bezel-less effect.

Abstract: A thin-film transistor (TFT), a display panel, and a manufacturing method of the display panel are provided. The TFT includes: a gate, a gate insulating layer, an active layer, a first electrode, an interlayer insulating layer, and a second electrode. The interlayer insulating layer is disposed between the first electrode and the active layer. A first via is defined on the interlayer insulating layer. The active layer is connected to the first electrode by the first via. A thickness of the interlayer insulating layer is greater than a thickness of the gate insulating layer. The second electrode is connected to the active layer.

Abstract: An embodiment of the present application discloses a display panel manufacturing method and a display panel including a driver transistor, a storage capacitor, a switch transistor, and a sensing transistor vertically stacked. At leas two transistors are vertically stacked to solve a technical issue that a pixel in a conventional display panel employs a pixel circuit design of transistors and capacitors arranged along a direction parallel to the display panel to cause a lowered pixel density of the display panel to result in a lowered resolution of a display panel product.

Abstract: The present invention relates to a display panel and an electronic display device. A first source of a driving thin film transistor extends and covers a first gate layer, the first source is used to block water vapor, thus to prevent water vapor intrusion from reducing weather resistance of the driving thin film transistor, to improve a service life of the driving thin film transistor, and to prevent a degradation or a failure of display qualities caused by a decline during use of the driving thin film transistor, and to improve display stability of the display panel.

Abstract: A manufacturing method of an array substrate, the array substrate, and a display panel are provided. In the manufacturing method of the array substrate, by forming an oxide material layer including aluminum atoms on a gate electrode metal layer, and by heating the oxide material layer to allow the aluminum atoms to capture oxygen in the oxide semiconductor layer, an aluminium oxide is formed, and by making the oxide in the oxide semiconductor layer to lose oxygen to become conductive, a source electrode region and a drain electrode of a thin film transistor are formed.

Abstract: An array substrate and a manufacturing method thereof are provided. The array substrate includes a substrate, an active layer, a first insulating layer, a first metal layer, a second insulating layer, and a second metal layer. The array substrate includes a thin film transistor (TFT) area, and the second metal layer includes a source-drain metal sub-layer located in the TFT area. The TFT area is defined with an active layer exposed area. The array substrate includes a barrier layer, and an orthographic projection of the barrier layer on the active layer at least partially covers an orthographic projection of the active layer exposed area on the active layer.

Abstract: An embodiment of the application discloses a panel and a manufacturing method thereof. In the panel, a thin-film transistor layer, a first conductive layer, a light-emitting diode (LED), and a second conductive layer are sequentially disposed on a substrate. The LED includes a first end and a second end. The first end is disposed on the first electrode. The second end is disposed on the second electrode. The second conductive layer includes a first conductive portion and a second conductive portion. The first conductive portion is electrically connected to the first end and the first electrode. The second conductive portion is electrically connected to the second end and the second electrode.

Abstract: A display panel and a manufacturing method are provided. The present disclosure can reduce process steps of the display panel by disposing a first source electrode and a first drain electrode of a low temperature polysilicon thin film transistor and a second source electrode and a second drain electrode of an oxide thin film transistor in a same layer. Therefore, stability of the oxide thin film transistor can be improved, a channel length of the oxide thin film transistor can be shortened correspondingly, resolution of the display panel can be improved, and a thickness of the display panel can be reduced.

Abstract: The present application provides a display panel, a manufacturing method thereof, and a display device. The present application adopts a molybdenum/copper stackup to form a solder pad for bonding, which can effectively solve a problem of a poor bonding force between MTD and a soldering material in the prior art. Meanwhile, a bonding lead is made of titanium-molybdenum-nickel alloy/copper/titanium-molybdenum-nickel alloy stackup, which can reduce manufacturing processes of the display panel and reduce manufacturing costs.

Abstract: An array substrate, a manufacturing method thereof, and a display panel are provided. By disposing first electrodes and second electrodes on top and bottom sides of an active layer, respectively, and disposing a part of each gate electrode among sub-active patterns, the array substrate is formed with vertical-structured thin film transistors. Therefore, a channel resistance can be reduced, and a channel width of the thin film transistors can be reduced, thereby reducing an area of the thin film transistors, reducing impedance of the thin film transistors, and reducing power consumption of the display panel.