Abstract: A one port-to-M port passive signal power divider circuit (or combiner circuit) where M>2 and .noteq. 2.sup.N, M and N are integers, includes M - 1 two-way in-phase passive power dividers having a signal delay D through each path in one or more delay devices having delay D. Each output of each two-way power divider is coupled to an input of another power divider, a delay line or an output port, the arrangement being such that the delay through all ports of the power divider are equal. In accordance with a further embodiment of the invention the outputs of a passive power divider are connected to two-way switches using active components. The switches under control of a control circuit are utilized to switch the input signal to the power divider to any one of 2.multidot.M output terminals of the switches.

Abstract: A predistortion circuit for a radio frequency power amplifier which has gain and phase shift characteristics that are non-linear as a function of power level of an RF input signal. The circuit includes a dual gate FET, with a drain coupled to the power amplifier. A modulated RF input signal is applied to an inductive matching network which is coupled to the signal gate of the FET. A modulating envelope detected version of the input signal is applied to a video amplifier which is coupled to the FET control gate. The signal applied to the control gate varies the gain of the FET as a function of input signal to compensate for the non-linear gain characteristic of the power amplifier and in conjunction with the matching network causes a phase change of the signal through the predistortion circuit to compensate for the non-linear phase characteristic of the power amplifier.

Abstract: A variable-gain, constant output power amplifier which generates an output rf signal of constant power level in response to an input rf signal of varying power level. The amplifier gain is preadjusted by a plurality of feedforward automatic-gain-control circuits to provide the constant output power. The amplifier comprises five dual-gate MESFET signal-amplifying stages. The first and last stages do not have built-in automatic-gain-control. The first stage is provided for preamplification prior to sampling the input signal, and the last stage is provided for setting the level of the output power externally. The signal at the input of each of the middle three stages is sampled through a coupler and detected and processed at video frequencies to dynamically preadjust the gain of the next signal-amplifying stage.

Abstract: A plurality of FET or other amplifiers are connected between respective outputs of an N output port power divider network and respective inputs of an N input power combining network in a variable power amplifier system. A gate bias is selectively supplied to each of the amplifiers which is either at a first value to cause the amplifier to amplify or at a second value to cause the amplifier to be cut off and therefore to not dissipate any DC power. The number of amplifiers receiving the first potential is determinative of the amount of power amplification of the variable power amplifier.

Abstract: A 0.degree. and 180.degree. hybrid power divider/combiner includes a first quadrature hybrid and two other quadrature hybrids arranged in tandem with one output port of the first hybrid connected to an input port of the tandem arrangement and the other output port thereof connected to a delay of electrical length equal to that of the tandem arrangement. When an input signal is applied to one input port of the first hybrid with the other port terminated, two signals of reduced amplitude which are either in phase or of opposed phase (dependent on which input port receives the input signal) are produced at the output of the tandem arrangement and delay.