Patents by Inventor Mahmud Assar
Mahmud Assar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8058696Abstract: A multi-state current-switching magnetic memory element includes a stack of magnetic tunneling junction (MTJ) separated by a non-magnetic layer for storing more than one bit of information, wherein different levels of current applied to the memory element cause switching to different states.Type: GrantFiled: February 23, 2007Date of Patent: November 15, 2011Assignee: Avalanche Technology, Inc.Inventors: Rajiv Yadav Ranjan, Mahmud Assar, Parviz Keshtbod
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Patent number: 8032694Abstract: A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically, the mass storage will need to be cleaned up. These advantages are achieved through the use of several flags, and a map to correlate a logical block address of a block to a physical address of that block. In particular, flags are provided for defective blocks, used blocks, and old versions of a block. An array of volatile memory is addressable according to the logical address and stores the physical address.Type: GrantFiled: July 27, 2010Date of Patent: October 4, 2011Assignee: Micron Technology, Inc.Inventors: Petro Estakhri, Mahmud Assar
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Publication number: 20100293324Abstract: A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically, the mass storage will need to be cleaned up. These advantages are achieved through the use of several flags, and a map to correlate a logical block address of a block to a physical address of that block. In particular, flags are provided for defective blocks, used blocks, and old versions of a block. An array of volatile memory is addressable according to the logical address and stores the physical address.Type: ApplicationFiled: July 27, 2010Publication date: November 18, 2010Inventors: Petro Estakhri, Mahmud Assar
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Publication number: 20100228890Abstract: Memory devices having a memory module, an interface, identification circuitry and a controller coupled to the memory module and the identification circuitry. The identification circuitry is configured to identify a selected operating mode from a plurality of signals sensed at the interface in response to a plurality of signals previously applied to the interface by the identification circuitry. The controller is operable to configure the memory device to the selected operating mode responsive to the identification circuitry.Type: ApplicationFiled: May 18, 2010Publication date: September 9, 2010Inventors: Petro Estakhri, Mahmud Assar
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Patent number: 7774576Abstract: A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically, the mass storage will need to be cleaned up. These advantages are achieved through the use of several flags, and a map to correlate a logical block address of a block to a physical address of that block. In particular, flags are provided for defective blocks, used blocks, and old versions of a block. An array of volatile memory is addressable according to the logical address and stores the physical address.Type: GrantFiled: April 20, 2009Date of Patent: August 10, 2010Assignee: Lexar Media, Inc.Inventors: Petro Estakhri, Mahmud Assar
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Patent number: 7721017Abstract: Apparatus and methods provide for configuring a peripheral device in response to applying defined sets of signals to input/output terminals of the peripheral device, sensing the signals at those input/output terminals after applying the defined sets of signals, and comparing the sensed signals with the defined sets of signals.Type: GrantFiled: August 27, 2008Date of Patent: May 18, 2010Assignee: Lexar Media, Inc.Inventors: Petro Estakhri, Mahmud Assar
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Publication number: 20090204750Abstract: A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically, the mass storage will need to be cleaned up. These advantages are achieved through the use of several flags, and a map to correlate a logical block address of a block to a physical address of that block. In particular, flags are provided for defective blocks, used blocks, and old versions of a block. An array of volatile memory is addressable according to the logical address and stores the physical address.Type: ApplicationFiled: April 20, 2009Publication date: August 13, 2009Inventors: Petro Estakhri, Mahmud Assar
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Patent number: 7523249Abstract: A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically, the mass storage will need to be cleaned up. These advantages are achieved through the use of several flags, and a map to correlate a logical block address of a block to a physical address of that block. In particular, flags are provided for defective blocks, used blocks, and old versions of a block. An array of volatile memory is addressable according to the logical address and stores the physical address.Type: GrantFiled: June 24, 2005Date of Patent: April 21, 2009Assignee: Lexar Media, Inc.Inventors: Petro Estakhri, Mahmud Assar
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Publication number: 20090046501Abstract: A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die.Type: ApplicationFiled: July 30, 2008Publication date: February 19, 2009Applicant: YADAV TECHNOLOGY, INC.Inventors: Rajiv Yadav RANJAN, Parviz KESHTBOD, Mahmud ASSAR
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Publication number: 20080320175Abstract: Apparatus and methods provide for configuring a peripheral device in response to applying defined sets of signals to input/output terminals of the peripheral device, sensing the signals at those input/output terminals after applying the defined sets of signals, and comparing the sensed signals with the defined sets of signals.Type: ApplicationFiled: August 27, 2008Publication date: December 25, 2008Inventors: Petro Estakhri, Mahmud Assar
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Patent number: 7421523Abstract: An interfacing system facilitating user-friendly connectivity in a selected operating mode between a host computer system and a flash memory card. The interfacing system includes an interface device and a flash memory card. The interfacing system features significantly expanded operating mode detection capability within the flash memory card and marked reduction in the incorrect detection of the operating mode. The interface device includes a first end for coupling to the host computer and a second end for coupling to the flash memory card, while supporting communication in the selected operating mode which is also supported by the host computer system. The flash memory card utilizes a fifty pin connection to interface with the host computer system through the interface device. The fifty pin connection of the flash memory card can be used with different interface devices in a variety of configurations such as a universal serial mode, PCMCIA mode, and ATA IDE mode.Type: GrantFiled: December 1, 2005Date of Patent: September 2, 2008Assignee: Lexar Media, Inc.Inventors: Petro Estakhri, Mahmud Assar
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Publication number: 20080094886Abstract: One embodiment of the present invention includes a non-uniform switching based non-volatile magnetic memory element including a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer, wherein switching current is applied, in a direction that is substantially perpendicular to the fixed, barrier, first free, non-uniform and the second free layers causing switching between states of the first, second free and non-uniform layers with substantially reduced switching current.Type: ApplicationFiled: February 12, 2007Publication date: April 24, 2008Inventors: Rajiv Yadav Ranjan, Petro Estakhri, Mahmud Assar, Parviz Keshtbod
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Publication number: 20070201265Abstract: One embodiment of the present invention includes a multi-state current-switching magnetic memory element having a stack of magnetic tunneling junction (MTJ) separated by a non-magnetic layer for storing more than one bit of information, wherein different levels of current applied to the memory element cause switching to different states.Type: ApplicationFiled: February 23, 2007Publication date: August 30, 2007Inventors: Rajiv Yadav Ranjan, Mahmud Assar, Parviz Keshtbod
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Patent number: 7174445Abstract: An interfacing system facilitating user-friendly connectivity in a selected operating mode between a host computer system and a flash memory card. The interfacing system includes an interface device and a flash memory card. The interfacing system features significantly expanded operating mode detection capability within the flash memory card and marked reduction in the incorrect detection of the operating mode. The interface device includes a first end for coupling to the host computer and a second end for coupling to the flash memory card, while supporting communication in the selected operating mode which is also supported by the host computer system. The flash memory card utilizes a fifty pin connection to interface with the host computer system through the interface device. The fifty pin connection of the flash memory card can be used with different interface devices in a variety of configurations such as a universal serial mode, PCMCIA mode, and ATA IDE mode.Type: GrantFiled: April 1, 2002Date of Patent: February 6, 2007Assignee: Lexar Media, Inc.Inventors: Petro Estakhri, Mahmud Assar
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Patent number: 7111085Abstract: An interfacing system facilitating user-friendly connectivity in a selected operating mode between a host computer system and a flash memory card. The interfacing system includes an interface device and a flash memory card. The interfacing system features significantly expanded operating mode detection capability within the flash memory card and marked reduction in the incorrect detection of the operating mode. The interface device includes a first end for coupling to the host computer and a second end for coupling to the flash memory card, while supporting communication in the selected operating mode which is also supported by the host computer system. The flash memory card utilizes a fifty pin connection to interface with the host computer system through the interface device. The fifty pin connection of the flash memory card can be used with different interface devices in a variety of configurations such as a universal serial mode, PCMCIA mode, and ATA IDE mode.Type: GrantFiled: August 21, 2003Date of Patent: September 19, 2006Assignee: Lexar Media, Inc.Inventors: Petro Estakhri, Mahmud Assar
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Patent number: 6912618Abstract: A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically, the mass storage will need to be cleaned up. These advantages are achieved through the use of several flags, and a map to correlate a logical block address of a block to a physical address of that block. In particular, flags are provided for defective blocks, used blocks, and old versions of a block. An array of volatile memory is addressable according to the logical address and stores the physical address.Type: GrantFiled: May 7, 2001Date of Patent: June 28, 2005Assignee: Lexar Media, Inc.Inventors: Petro Estakhri, Mahmud Assar
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Publication number: 20040117586Abstract: A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically, the mass storage will need to be cleaned up. These advantages are achieved through the use of several flags, and a map to correlate a logical block address of a block to a physical address of that block. In particular, flags are provided for defective blocks, used blocks, and old versions of a block. An array of volatile memory is addressable according to the logical address and stores the physical address.Type: ApplicationFiled: May 7, 2001Publication date: June 17, 2004Inventors: Petro Estakhri, Mahmud Assar
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Patent number: 6721819Abstract: An interfacing system facilitating user-friendly connectivity in a selected operating mode between a host computer system and a flash memory card. The interfacing system includes an interface device and a flash memory card. The interfacing system features significantly expanded operating mode detection capability within the flash memory card and marked reduction in the incorrect detection of the operating mode. The interface device includes a first end for coupling to the host computer and a second end for coupling to the flash memory card, while supporting communication in the selected operating mode which is also supported by the host computer system. The flash memory card utilizes a fifty pin connection to interface with the host computer system through the interface device. The fifty pin connection of the flash memory card can be used with different interface devices in a variety of configurations such as a universal serial mode, PCMCIA mode, and ATA IDE mode.Type: GrantFiled: August 28, 2001Date of Patent: April 13, 2004Assignee: Lexar Media, Inc.Inventors: Petro Estakhri, Mahmud Assar
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Publication number: 20040039854Abstract: An interfacing system facilitating user-friendly connectivity in a selected operating mode between a host computer system and a flash memory card. The interfacing system includes an interface device and a flash memory card. The interfacing system features significantly expanded operating mode detection capability within the flash memory card and marked reduction in the incorrect detection of the operating mode. The interface device includes a first end for coupling to the host computer and a second end for coupling to the flash memory card, while supporting communication in the selected operating mode which is also supported by the host computer system. The flash memory card utilizes a fifty pin connection to interface with the host computer system through the interface device. The fifty pin connection of the flash memory card can be used with different interface devices in a variety of configurations such as a universal serial mode, PCMCIA mode, and ATA IDE mode.Type: ApplicationFiled: August 21, 2003Publication date: February 26, 2004Applicant: Lexar Media, Inc.Inventors: Petro Estakhri, Mahmud Assar
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Patent number: 6587382Abstract: An embodiment of the present invention is disclosed to include a nonvolatile memory system for controlling erase operations performed on a nonvolatile memory array comprised of rows and columns, the nonvolatile memory array stores digital information organized into blocks with each block having one or more sectors of information and each sector having a user data field and an extension field and each sector stored within a row of the memory array. A controller circuit is coupled to a host circuit and is operative to perform erase operations on the nonvolatile memory array, the controller circuit erases an identified sector of information having a particular user data field and a particular extension field wherein the particular user field and the particular extension field are caused to be erased separately.Type: GrantFiled: June 19, 2002Date of Patent: July 1, 2003Assignee: Lexar Media, Inc.Inventors: Petro Estakhri, Siamack Nemazie, Mahmud Assar, Parviz Keshtbod