Patents by Inventor Makoto Kanda

Makoto Kanda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10921767
    Abstract: According to an embodiment, an encoder system includes an encoder and an interface. The encoder detects the position and speed of a motor, and generates A-, B- and Z-phase signals. The interface includes an AB waveform recognition circuitry to recognize a waveform of an AB phase, a Z waveform recognition circuitry to recognize a period of an enable state of a Z phase, a starting point storage device to store a value of the AB phase when the Z phase changes and stores an AB-phase change pattern, a starting point recognition circuitry to generate an interrupt signal, and a rotation angle counter to start a new count of the rotation angle of the motor.
    Type: Grant
    Filed: August 12, 2019
    Date of Patent: February 16, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Akihiro Kobayashi, Makoto Kanda, Shigeru Itoh, Hiroshi Nishikawa, Wataru Furuichi, Kiyoshige Taga, Kazuma Takeda
  • Patent number: 10789144
    Abstract: According to one embodiment, a supervisory circuit includes a trigger determination circuit and a trigger table. The trigger determination circuit receives signal processing signals outputted from a plurality of signal processing circuits as trigger signals, determines whether processing operations by the signal processing circuits are executed in a predetermined order, and outputs an interrupt signal when detecting a trigger signal out of setting. The trigger table is provided with trigger-specific tables corresponding to the respective signal processing circuits, reads a trigger setting to occur next based on a trigger determined as being correct by the trigger determination circuit, and outputs a table read signal to the trigger determination circuit.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: September 29, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Akihiro Kobayashi, Makoto Kanda, Shigeru Itoh, Hiroshi Nishikawa, Wataru Furuichi, Kiyoshige Taga, Itsuro Nomura
  • Publication number: 20200125049
    Abstract: According to an embodiment, an encoder system includes an encoder and an interface. The encoder detects the position and speed of a motor, and generates A-, B- and Z-phase signals. The interface includes an AB waveform recognition circuitry to recognize a waveform of an AB phase, a Z waveform recognition circuitry to recognize a period of an enable state of a Z phase, a starting point storage device to store a value of the AB phase when the Z phase changes and stores an AB-phase change pattern, a starting point recognition circuitry to generate an interrupt signal, and a rotation angle counter to start a new count of the rotation angle of the motor.
    Type: Application
    Filed: August 12, 2019
    Publication date: April 23, 2020
    Inventors: Akihiro Kobayashi, Makoto Kanda, Shigeru Itoh, Hiroshi Nishikawa, Wataru Furuichi, Kiyoshige Taga, Kazuma Takeda
  • Publication number: 20200012594
    Abstract: According to one embodiment, a shared FIFO device includes a write pointer control circuit, a read pointer control circuit, a write pointer selection circuit, a read pointer selection circuit, a selection circuit, and a memory array. The shared FIFO device performs FIFO access through n transfer routes (where n is an integer of 2 or greater).
    Type: Application
    Filed: December 20, 2018
    Publication date: January 9, 2020
    Inventors: Wataru Furuichi, Makoto Kanda, Shigeru Itoh, Hiroshi Nishikawa, Akihiro Kobayashi, Kiyoshige Taga
  • Publication number: 20190272223
    Abstract: According to one embodiment, a supervisory circuit includes a trigger determination circuit and a trigger table. The trigger determination circuit receives signal processing signals outputted from a plurality of signal processing circuits as trigger signals, determines whether processing operations by the signal processing circuits are executed in a predetermined order, and outputs an interrupt signal when detecting a trigger signal out of setting. The trigger table is provided with trigger-specific tables corresponding to the respective signal processing circuits, reads a trigger setting to occur next based on a trigger determined as being correct by the trigger determination circuit, and outputs a table read signal to the trigger determination circuit.
    Type: Application
    Filed: August 31, 2018
    Publication date: September 5, 2019
    Inventors: Akihiro Kobayashi, Makoto Kanda, Shigeru Itoh, Hiroshi Nishikawa, Wataru Furuichi, Kiyoshige Taga, Itsuro Nomura
  • Patent number: 7794299
    Abstract: A method for manufacturing an image display device includes the steps of preparing a plurality of spacers preliminarily, measuring heights of the plurality of spacers prepared by the preparing step individually, and deciding an order of arranging the spacers on the basis of the measured heights obtained in the measuring step. The spacers are arranged in the order decided in the deciding step.
    Type: Grant
    Filed: May 20, 2008
    Date of Patent: September 14, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Makoto Kanda, Masahiro Tagawa, Tomokazu Andoh, Takahiro Oguchi
  • Patent number: 7544522
    Abstract: To prevent breakage of a membrane probe during a probe test using a probe card having the membrane probe, appearance of a main surface of a wafer as a test object is tested by an appearance tester 51, and results of bad appearance such as adhesion of a foreign substance to the main surface of the wafer and abnormality in shape of bump electrodes over the main surface of the wafer are collected as wafer map data according to arrangement of respective chips in a plane of the wafer, then the wafer map data are transmitted to a probe tester 53 via a server 52, and the probe tester 53 omits the probe test for chips in which bad appearance was detected, and concurrently performs the probe test to other chips in which bad appearance was not detected, based on the wafer map data.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: June 9, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Makoto Kanda, Koji Watanabe, Daisuke Hirota
  • Publication number: 20080227358
    Abstract: A method for manufacturing an image display device includes the steps of preparing a plurality of spacers preliminarily, measuring heights of the plurality of spacers prepared by the preparing step individually, and deciding an order of arranging the spacers on the basis of the measured heights obtained in the measuring step. The spacers are arranged in the order decided in the deciding step.
    Type: Application
    Filed: May 20, 2008
    Publication date: September 18, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Makoto Kanda, Masahiro Tagawa, Tomokazu Andoh, Takahiro Oguchi
  • Patent number: 7390235
    Abstract: A method manufactures an image display device including a rear plate having a plurality of electron emitting devices arranged thereon, a face plate arranged opposite the rear plate, an outer frame arranged between the rear plate and the face plate and supporting peripherals of the rear plate and the face plate, and a plurality of spacers arranged between the face plate and the rear plate. The method includes the steps of preparing the plurality of spacers preliminarily, measuring heights of the plurality of spacers prepared by the preparing step individually, deciding an order of arranging the spacers on the basis of the measured heights obtained in the measuring step, and arranging the spacers in the order decided in the deciding step.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: June 24, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Makoto Kanda, Masahiro Tagawa, Tomokazu Andoh, Takahiro Oguchi
  • Publication number: 20070231936
    Abstract: To prevent breakage of a membrane probe during a probe test using a probe card having the membrane probe, appearance of a main surface of a wafer as a test object is tested by an appearance tester 51, and results of bad appearance such as adhesion of a foreign substance to the main surface of the wafer and abnormality in shape of bump electrodes over the main surface of the wafer are collected as wafer map data according to arrangement of respective chips in a plane of the wafer, then the wafer map data are transmitted to a probe tester 53 via a server 52, and the probe tester 53 omits the probe test for chips in which bad appearance was detected, and concurrently performs the probe test to other chips in which bad appearance was not detected, based on the wafer map data.
    Type: Application
    Filed: June 9, 2004
    Publication date: October 4, 2007
    Inventors: Makoto Kanda, Koji Watanabe, Daisuke Hirota
  • Publication number: 20060192479
    Abstract: An image display device of a high quality, in which the variation of heights between adjoining spacers is reduced by measuring the heights of spacers to arrange the spacers from the end in the sequential order of heights so that the mechanical precision of the spacers need not be strictly managed.
    Type: Application
    Filed: April 19, 2006
    Publication date: August 31, 2006
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Makoto Kanda, Masahiro Tagawa, Tomokazu Andoh, Takahiro Oguchi
  • Patent number: 7088036
    Abstract: An image display device of a high quality, in which the variation of heights between adjoining spacers is reduced by measuring the heights of spacers to arrange the spacers from the end in the sequential order of heights so that the mechanical precision of the spacers need not be strictly managed.
    Type: Grant
    Filed: August 10, 2004
    Date of Patent: August 8, 2006
    Assignee: Canon Kabushiki Kaisha
    Inventors: Makoto Kanda, Masahiro Tagawa, Tomokazu Andoh, Takahiro Oguchi
  • Patent number: 7005741
    Abstract: A semiconductor device includes a semiconductor substrate, a plurality of electrode pads aligned on the semiconductor substrate, and a plurality of bump electrodes placed on each electrode pad, wherein the plurality of bump electrodes on the electrode pad are aligned in a direction orthogonal to a direction where the electrode pads are aligned. A manufacturing method of the semiconductor device includes the steps of patterning a photoresist which serves as a bump electrode forming use mask on the semiconductor substrate having formed thereon the electrode pads and forming a bump electrode in a perpendicular straight wall shape to be thinner than the photoresist by plating the bump electrode forming use metal to the electrode pad.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: February 28, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Atsushi Ono, Yasunori Chikawa, Makoto Kanda, Norimitsu Nie, Satoru Tone, Motoji Shiota, Akio Inohara, Hirokazu Yoshida
  • Patent number: 6998295
    Abstract: A small ball is formed at an end of a second gold wire that is held and guided by a second capillary. The small ball has a diameter approximately equal to that of a first gold wire. The small ball is bonded to an electrode on an optical device. The second gold wire is separated from the small ball. A large ball is formed at the lower end of the first gold wire, which is held and guided by a first capillary. The large ball is bonded to a wiring pattern on a external wiring substrate. The first capillary is moved upward, and then moved toward the small ball in the horizontal direction. The first gold wire is connected to the large ball. The first gold wire is bonded to the small ball by stitch bonding, and then separated from the small ball.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: February 14, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Makoto Kanda, Yasunari Shiraishi
  • Patent number: 6933607
    Abstract: A semiconductor device includes a semiconductor substrate, a plurality of electrode pads aligned on the semiconductor substrate, and a plurality of bump electrodes placed on each electrode pad, wherein the plurality of bump electrodes on the electrode pad are aligned in a direction orthogonal to a direction where the electrode pads are aligned. A manufacturing method of the semiconductor device includes the steps of patterning a photoresist which serves as a bump electrode forming use mask on the semiconductor substrate having formed thereon the electrode pads and forming a bump electrode in a perpendicular straight wall shape to be thinner than the photoresist by plating the bump electrode forming use metal to the electrode pad.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: August 23, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Atsushi Ono, Yasunori Chikawa, Makoto Kanda, Norimitsu Nie, Satoru Tone, Motoji Shiota, Akio Inohara, Hirokazu Yoshida
  • Patent number: 6901093
    Abstract: A semiconductor laser apparatus includes a base, a block, and a semiconductor laser element. The base has a recess on a main plane thereof. The block is perpendicularly elongating on the main plane. The block is neighboring the recess. The semiconductor laser element is mounted on a side of the block. A first end of the semiconductor element is located on outer side of the recess, and a second end of the semiconductor element is located on inner side of the recess.
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: May 31, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yasunori Hosokawa, Kenji Ohgiyama, Makoto Kanda
  • Publication number: 20050009434
    Abstract: An image display device of a high quality, in which the variation of heights between adjoining spacers is reduced by measuring the heights of spacers to arrange the spacers from the end in the sequential order of heights so that the mechanical precision of the spacers need not be strictly managed.
    Type: Application
    Filed: August 10, 2004
    Publication date: January 13, 2005
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Makoto Kanda, Masahiro Tagawa, Tomokazu Andoh, Takahiro Oguchi
  • Patent number: 6760001
    Abstract: The present application discloses a characteristic adjusting method of executing a step of changing the characteristics of display devices in an image display apparatus. In particular, the present invention discloses a configuration in which target values for changes in characteristics are obtained by reducing the high-frequency components of the spatial distribution of the characteristics of the display devices.
    Type: Grant
    Filed: February 8, 2002
    Date of Patent: July 6, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventors: Makoto Kanda, Takahiro Oguchi, Akihiko Yamano
  • Publication number: 20040115918
    Abstract: A small ball is formed at the lower end of a second gold wire that is held and guided by a second capillary. The small ball has a diameter approximately equal to that of a first gold wire. The small ball is bonded to an electrode on an optical device. The second gold wire is separated from the small ball. A large ball is formed at the lower end of the first gold wire that is held and guided by a first capillary. The large ball is bonded to a wiring pattern on an external wiring substrate. The first capillary is moved upward, and then, moved toward the small ball in the horizontal direction. A bonding wire is formed with the first gold wire connecting with the large ball. The first gold wire is bonded to the small ball by stitch bonding, and then, separated from the small ball.
    Type: Application
    Filed: November 25, 2003
    Publication date: June 17, 2004
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Makoto Kanda, Yasunari Shiraishi
  • Publication number: 20040105472
    Abstract: A semiconductor laser apparatus includes a base, a block, and a semiconductor laser element. The base has a recess on a main plane thereof. The block is perpendicularly elongating on the main plane. The block is neighboring the recess. The semiconductor laser element is mounted on a side of the block. A first end of the semiconductor element is located on outer side of the recess, and a second end of the semiconductor element is located on inner side of the recess.
    Type: Application
    Filed: June 3, 2003
    Publication date: June 3, 2004
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yasunori Hosokawa, Kenji Ohgiyama, Makoto Kanda