Patents by Inventor Makoto Kanda

Makoto Kanda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6611504
    Abstract: The mobile wireless device of the present invention comprises: the wireless device main body 1; the antenna element 2 provided in the case; the hand strap connection portion 3 to connect the hand strap 4 to the vicinity of the antenna element 2; and the hand strap 4 which is made of conductive material and is formed into a ring shape. As the result, when the hand strap 4 which is made of conductive material and is formed into a ring shape, is attached, the hand strap 4 and the antenna element 2 are electro-magnetically coupled, and thereby, the antenna has a high gain.
    Type: Grant
    Filed: September 13, 1999
    Date of Patent: August 26, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Makoto Kanda, Yoshio Koyanagi
  • Publication number: 20030075451
    Abstract: A manufacturing apparatus of a semiconductor integrated circuit, having an anode electrode which is provided in a tank section for storing a plating liquid, and a cathode electrode for connecting to a target plating surface of a wafer, further includes induction coils and a high-frequency power source. The manufacturing apparatus of a semiconductor integrated circuit can produce the magnetic field caused by the induction coils and electromagnetic force caused by the current passing through the target plating surface of the wafer, so as to form a bump electrode on the wafer by electrolytic plating method while vibrating the wafer through the electromagnetic force.
    Type: Application
    Filed: September 20, 2002
    Publication date: April 24, 2003
    Inventor: Makoto Kanda
  • Publication number: 20030067072
    Abstract: A semiconductor device includes a semiconductor substrate, a plurality of electrode pads aligned on the semiconductor substrate, and a plurality of bump electrodes placed on each electrode pad, wherein the plurality of bump electrodes on the electrode pad are aligned in a direction orthogonal to a direction where the electrode pads are aligned. A manufacturing method of the semiconductor device includes the steps of patterning a photoresist which serves as a bump electrode forming use mask on the semiconductor substrate having formed thereon the electrode pads and forming a bump electrode in a perpendicular straight wall shape to be thinner than the photoresist by plating the bump electrode forming use metal to the electrode pad.
    Type: Application
    Filed: October 30, 2002
    Publication date: April 10, 2003
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Atsushi Ono, Yasunori Chikawa, Makoto Kanda, Norimitsu Nie, Satoru Tone, Motoji Shiota, Akio Inohara, Hirokazu Yoshida
  • Publication number: 20030062623
    Abstract: A semiconductor device includes a semiconductor substrate, a plurality of electrode pads aligned on the semiconductor substrate, and a plurality of bump electrodes placed on each electrode pad, wherein the plurality of bump electrodes on the electrode pad are aligned in a direction orthogonal to a direction where the electrode pads are aligned. A manufacturing method of the semiconductor device includes the steps of patterning a photoresist which serves as a bump electrode forming use mask on the semiconductor substrate having formed thereon the electrode pads and forming a bump electrode in a perpendicular straight wall shape to be thinner than the photoresist by plating the bump electrode forming use metal to the electrode pad.
    Type: Application
    Filed: October 29, 2002
    Publication date: April 3, 2003
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Atsushi Ono, Yasunori Chikawa, Makoto Kanda, Norimitsu Nie, Satoru Tone, Motoji Shiota, Akio Inohara, Hirokazu Yoshida
  • Patent number: 6525422
    Abstract: A semiconductor device includes a semiconductor substrate, a plurality of electrode pads aligned on the semiconductor substrate, and a plurality of bump electrodes placed on each electrode pad, wherein the plurality of bump electrodes on the electrode pad are aligned in a direction orthogonal to a direction where the electrode pads are aligned. A manufacturing method of the semiconductor device includes the steps of patterning a photoresist which serves as a bump electrode forming use mask on the semiconductor substrate having formed thereon the electrode pads and forming a bump electrode in a perpendicular straight wall shape to be thinner than the photoresist by plating the bump electrode forming use metal to the electrode pad.
    Type: Grant
    Filed: December 11, 1997
    Date of Patent: February 25, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Atsushi Ono, Yasunori Chikawa, Makoto Kanda, Norimitsu Nie, Satoru Tone, Motoji Shiota, Akio Inohara, Hirokazu Yoshida
  • Patent number: 6452281
    Abstract: A semiconductor integrated circuit is provided which includes bump electrodes having a uniform height. The semiconductor integrated circuit includes: a semiconductor substrate (wafer) having a plurality of bump electrode formation areas and a bump electrode non-formation area respectively defined on a front surface thereof; a first electrode pad formed in the bump electrode non-formation area; a second electrode pad formed in each bump electrode formation area; and a bump electrode formed on each second electrode pad; wherein the first electrode pad is used for supplying a plating electric current to the second electrode pads through the semiconductor substrate in formation of the bump electrodes by electrolytic plating.
    Type: Grant
    Filed: January 29, 2002
    Date of Patent: September 17, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Makoto Kanda
  • Publication number: 20020122018
    Abstract: The present application discloses a characteristic adjusting method of executing a step of changing the characteristics of display devices in an image display apparatus. In particular, the present invention discloses a configuration in which target values for changes in characteristics are obtained by reducing the high-frequency components of the spatial distribution of the characteristics of the display devices.
    Type: Application
    Filed: February 8, 2002
    Publication date: September 5, 2002
    Inventors: Makoto Kanda, Takahiro Oguchi, Akihiko Yamano
  • Publication number: 20020100975
    Abstract: A semiconductor integrated circuit is provided which includes bump electrodes having a uniform height. The semiconductor integrated circuit includes: a semiconductor substrate (wafer) having a plurality of bump electrode formation areas and a bump electrode non-formation area respectively defined on a front surface thereof; a first electrode pad formed in the bump electrode non-formation area; a second electrode pad formed in each bump electrode formation area; and a bump electrode formed on each second electrode pad; wherein the first electrode pad is used for supplying a plating electric current to the second electrode pads through the semiconductor substrate in formation of the bump electrodes by electrolytic plating.
    Type: Application
    Filed: January 29, 2002
    Publication date: August 1, 2002
    Inventor: Makoto Kanda
  • Patent number: 6281510
    Abstract: A method of transferring a sample to and from a treating chamber kept in a vacuum atmosphere through a pressure regulatively preparatory chamber. The sample is contained in the sample transfer container, which is kept air-permeable by a dust filtering filter, in a cleaned atmosphere before the sample is transferred to the treating chamber. The sample transfer container is transferred into the preparatory chamber, and the inside of the preparatory chamber is evacuated to a vacuum atmosphere. The sample is then extracted from the sample transfer container in the vacuum atmosphere and is transferred into the treating chamber. Also disclosed is an apparatus for supporting the sample transferring method.
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: August 28, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shusuke Yoshitake, Yoshiaki Tsukumo, Ryoichi Hirano, Toru Tojo, Yoshiaki Tada, Makoto Kanda
  • Patent number: 6213356
    Abstract: A bump forming apparatus includes a first tank storing fused solder, a cavity having an inlet for the fused solder, a nozzle arranged on a lower portion of the cavity, a pressure element formed by a diaphragm and a piezoelectric element, and a first heater heating the first tank, a pipe and the cavity. The bump forming apparatus further comprises a static pressure control part having a second tank storing solid solder, a second heater provided around a second opening, a level detector detecting the surface level of the fused solder in the first tank and a level control part controlling driving of the second heater on the basis of a detection signal from the level detector. Thus obtained are a bump forming apparatus and a bump forming method capable of properly avoiding defective discharge, increasing the speed of discharge, avoiding dispersion of an amount of discharge and stabilizing discharge.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: April 10, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yasufumi Nakasu, Masaharu Yoshida, Makoto Kanda, Hiroshi Fukumoto
  • Patent number: 6090176
    Abstract: A method of transferring a sample to and from a treating chamber kept in a vacuum atmosphere through a pressure regulative preparatory chamber. The sample is contained in the sample transfer container, which is kept air-permeable by a dust filtering filter, in a cleaned atmosphere before the sample is transferred to the treating chamber. The sample transfer container is transferred into the preparatory chamber, and the inside of the preparatory chamber is evacuated to a vacuum atmosphere. The sample is then extracted from the sample transfer container in the vacuum atmosphere and is transferred into the treating chamber. Also disclosed is an apparatus for supporting the sample transferring method.
    Type: Grant
    Filed: March 11, 1998
    Date of Patent: July 18, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shusuke Yoshitake, Yoshiaki Tsukumo, Ryoichi Hirano, Toru Tojo, Yoshiaki Tada, Makoto Kanda
  • Patent number: 5879132
    Abstract: An ultra high head pumpturbine power generating plant with a turbine having a runner rotating with water flow supplied through a high head conducting tube. A rotary electric machine rotates with rotation of the runner. The head is in the range of 400-600 m, and the runner is at least 5 meters in diameter. The said runner has characteristics of toughness at room temperature: at least 500 N/mm.sup.2, or tensile strength at room temperature: at least 650 N/mm.sup.2, elongation at least 16%, reduction of area at least 45%, 2 mm U-notch impact value at 0.degree. C. at least 100 J, and fracture toughness at least 6000 N/mm.sup.3/2.
    Type: Grant
    Filed: November 14, 1996
    Date of Patent: March 9, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Kenichi Usami, Hiroshi Takayasu, Tsutomu Onuma, Makoto Kanda, Masao Kawakami, Fumio Sakamoto, Tsugio Fushimi, Tsugio Yoshikawa
  • Patent number: 5601411
    Abstract: High toughness stainless steel type 13Cr5Ni containing C: 0.008-0.03% (by weight, all of the following elements), Si: max. 1%, Mn: max. 2%, Cr: 10.0-14.0%, Ni: 4.0-7.0%, and Mo: 0.2-2.0%, in which (Cr/Ni) ratio is in a range of 2.0-3.0 or (C/Mo) ratio is in a range of 0.015-0.1, as a structural material for fluid machinery, austenitic stainless steel containing C: 0.10-0.30% (by weight, all of the following elements), Si: max. 1%, Mn: max. 2%, Cr: 16.00-23.00%, Ni: 1.00-8.00%, and Co: 2.00-9.00%, and Ni+Co: 6.00-12.00% as a weld padding layer forming material, and fluid machinery using the same.
    Type: Grant
    Filed: June 19, 1995
    Date of Patent: February 11, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Kenichi Usami, Hiroshi Takayasu, Tsutomu Onuma, Makoto Kanda, Masao Kawakami, Fumio Sakamoto, Tsugio Fushimi, Tsugio Yoshikawa
  • Patent number: 5302801
    Abstract: A bonding apparatus comprises a base (16) for supporting a printed circuit board (7), an atmosphere cover (1) which has a concavity (1c) covering a semiconductor device (5) mounted on the printed circuit board (7) and which is formed of laser light transmitting material, driving means (1j) for moving the atmosphere cover (1) upwards and downwards related to the base (16), pressing means (2) and (3) provided in the atmosphere cover (1) for pressing the semiconductor device (5) toward the printed circuit board (7), and laser heating means (9) for bonding a lead terminal (6) of the semiconductor device (5) with a junction (7a) of the printed circuit board (7).
    Type: Grant
    Filed: May 25, 1993
    Date of Patent: April 12, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Makoto Kanda, Masaharu Yoshida
  • Patent number: 5250781
    Abstract: A bonding apparatus comprises a base (16) for supporting a printed circuit board (7), an atmosphere cover (1) which has a concavity (1c) covering a semiconductor device (5) mounted on the printed circuit board (7) and which is formed of laser light transmitting material, driving means (1j) for moving the atmosphere cover (1) upwards and downwards related to the base (16), pressing means (2) and (3) provided in the atmosphere cover (1) for pressing the semiconductor device (5) toward the printed circuit board (7), and laser heating means (9) for bonding a lead terminal (6) of the semiconductor device (5) with a junction (7a) of the printed circuit board (7).
    Type: Grant
    Filed: October 22, 1991
    Date of Patent: October 5, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Makoto Kanda, Masaharu Yoshida
  • Patent number: 5009590
    Abstract: A plurality of semiconductor chips are sequentially mounted on a rotary table, heated on the rotary table for a predetermined time, and ejected from the rotary table. The semiconductor chips ejected from the rotary table are fed to a bonding apparatus. The semiconductor chips are heated while the rotary table is stationary and are held to the rotary table by a vacuum chuck. The position of a semiconductor chip is adjusted before the semiconductor chip is ejected from the rotary table.
    Type: Grant
    Filed: January 18, 1990
    Date of Patent: April 23, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tadashi Mitarai, Makoto Kanda