Abstract: A semiconductor device includes a first electrode, a first semiconductor layer of a first conductivity type located on the first electrode, a second semiconductor layer of a second conductivity type located on a portion of the first semiconductor layer, a metal layer located on the first and second semiconductor layers, a second electrode located on the metal layer, a bonding member connected to an upper surface of the second electrode, and a conductive member located between the second semiconductor layer and the metal layer. The metal layer has a Schottky junction with the first semiconductor layer. The conductive member is made of a different material from the metal layer. An area ratio of the conductive member in a region directly under the bonding member is higher than an area ratio of the conductive member in a region other than the region directly under the bonding member.

Abstract: A semiconductor device includes a first electrode, a first semiconductor layer of a first conductivity type on the first electrode, a first pillar of a second conductivity type on the first semiconductor layer, the first pillar having a first average concentration of impurities, a second pillar of the first conductivity type on the first semiconductor layer, and including a first layer having a second average concentration of impurities lower than the first average concentration, and a second layer having a third average concentration of impurities higher than the first average concentration, a second semiconductor layer of the second conductivity type on the second pillar, a third semiconductor layer of the first conductivity type on the second semiconductor layer, a second electrode connected to the first pillar and the third semiconductor layer, a third electrode, and an insulating film disposed between the second semiconductor layer and the third electrode.

Abstract: The super junction structure part includes a plurality of n-type pillars having higher impurity concentrations than the second layer, a plurality of p-type pillars having higher impurity concentrations than the second layer, and a boundary region positioned between the n-type pillar and the p-type pillar in a second direction orthogonal to the first direction, the boundary region extending in the first direction continuously from the second layer, the boundary region having a lower impurity concentration than the n-type pillars and the p-type pillars.

Abstract: A semiconductor device includes first, second, and third metal layers on a surface of the insulating substrate. A first terminal is connected to the first metal layer at a first region. A second terminal is connected to the second metal layer at a second region. An output terminal is connected to the third metal layer. First chips are aligned along a first direction on the first metal layer. Second chips are aligned along the first direction on the third metal layer. A first wire connects a first upper electrode of a first chip to the third metal layer. A second wire connects a second upper electrode of a second chip to the second metal layer. The second chips are between the first chips and the third metal layer in a second direction perpendicular to the first direction. Available conductive routes between the first and second terminals are made more uniform.

Abstract: A semiconductor device of embodiments includes: an electrode containing titanium (Ti); a silicon carbide layer; a first region provided between the silicon carbide layer and the electrode, containing silicon (Si) and oxygen (O), and having a thickness equal to or more than 2 nm and equal to or less than 10 nm; and a second region provided between the first region and the electrode and containing titanium (Ti) and silicon (Si).

Abstract: A semiconductor device includes a first silicon carbide region of a first conductivity type, a second silicon carbide region of a second conductivity type on the first region, and a third silicon carbide region of a second conductivity type on the second region. Fourth and fifth silicon carbide region of the first conductivity type are on the third region. A first electrode has a first portion between the fourth region and fifth region in a first direction. A metal silicide layer is between the first portion and the third region, between the first portion and the fourth region in the first direction, and between the first portion and the fifth silicon carbide region in the first direction.

Abstract: A semiconductor device of embodiments includes: a first silicon carbide region of first conductive type including a first region in contact with a first face of a silicon carbide layer having first and second faces; a second silicon carbide region of second conductive type above the first silicon carbide region; a third silicon carbide region of second conductive type above the second silicon carbide region; a fourth silicon carbide region of first conductive type above the second silicon carbide region; a first gate electrode and a second gate electrode extending in the first direction; a first electrode on the first face and including a first portion and a second portion between the first and the second gate electrode. The first portion contacts the third and the fourth silicon carbide region. The second portion provided in the first direction of the first portion and contacts with the first region.

Abstract: A semiconductor device according to an embodiment includes a semiconductor layer, a metal layer, and a bonding layer provided between the semiconductor layer and the metal layer, the bonding layer including a plurality of silver particles, and the bonding layer including a region containing gold existing between the plurality of silver particles.

Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type; a third semiconductor layer of the first conductivity type; a first active region; and a third electrode. The first semiconductor layer is located between the first electrode and the second electrode. The second semiconductor layer is located above the first semiconductor layer. The first active region is next to the second semiconductor layer in a second direction. The first active region includes a first upper portion and a first upper portion. An average value of a width in the second direction of the first lower portion is greater than an average value of a width in the second direction of the first upper portion. The third semiconductor layer is electrically connected with the second electrode.

Abstract: A semiconductor device according to an embodiment includes a semiconductor layer, a metal layer, and a bonding layer provided between the semiconductor layer and the metal layer, the bonding layer including a plurality of silver particles, and the bonding layer including a region containing gold existing between the plurality of silver particles.

Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type; a third semiconductor layer of the first conductivity type; a first active region; and a third electrode. The first semiconductor layer is located between the first electrode and the second electrode. The second semiconductor layer is located above the first semiconductor layer. The first active region is next to the second semiconductor layer in a second direction. The first active region includes a first upper portion and a first upper portion. An average value of a width in the second direction of the first lower portion is greater than an average value of a width in the second direction of the first upper portion. The third semiconductor layer is electrically connected with the second electrode.

Abstract: A semiconductor device according to an embodiment includes a semiconductor layer, a metal layer, and a bonding layer provided between the semiconductor layer and the metal layer, the bonding layer including a plurality of silver particles, and the bonding layer including a region containing gold existing between the plurality of silver particles.

Abstract: A semiconductor device according to an embodiment includes a silicon carbide layer having first and second planes; first and second trenches extending in a first direction; first and second gate electrodes; a first silicon carbide region of a first conductivity type; a plurality of second silicon carbide regions of a second conductivity type between the first silicon carbide region and the first plane, located between the first trench and the second trench, and separated from each other in the first direction; a fourth silicon carbide region of the second conductivity type between two of the second silicon carbide regions and contacting the second silicon carbide region; a fifth silicon carbide region of the second conductivity type between the two second silicon carbide regions and contacting the second silicon carbide region; a first electrode contacting the first silicon carbide region; and a second electrode.

Abstract: A stacked multilayer structure according to an embodiment of the present invention comprises: a stacked layer part including a plurality of conducting layers and a plurality of insulating layers, said plurality of insulating layers being stacked alternately with each layer of said plurality of conducting layers, one of said plurality of insulating layers being a topmost layer among said plurality of conducting layers and said plurality of insulating layers; and a plurality of contacts, each contact of said plurality of contacts being formed from said topmost layer and each contact of said plurality of contacts being in contact with a respective conducting layer of said plurality of conducting layers, a side surface of each of said plurality of contacts being insulated from said plurality of conducting layers via an insulating film.

Abstract: A semiconductor device according to an embodiment includes a silicon carbide layer having first and second planes; a first silicon carbide region; second and third silicon carbide regions between the first silicon carbide region and the first plane; a fourth silicon carbide region between the second silicon carbide region and the first plane; a first and second gate electrodes; a suicide layer on the fourth silicon carbide region; a first electrode on the first plane having a first portion and a second portion, the first portion being in contact with the first silicon carbide region, the second portion being in contact with the suicide layer; a second electrode on the second plane; and an insulating layer between the first portion and the second portion having a first side surface and a second side surface, an angle of the first side surface being smaller than that of the second side surface.

Abstract: A stacked multilayer structure according to an embodiment of the present invention comprises: a stacked layer part including a plurality of conducting layers and a plurality of insulating layers, said plurality of insulating layers being stacked alternately with each layer of said plurality of conducting layers, one of said plurality of insulating layers being a topmost layer among said plurality of conducting layers and said plurality of insulating layers; and a plurality of contacts, each contact of said plurality of contacts being formed from said topmost layer and each contact of said plurality of contacts being in contact with a respective conducting layer of said plurality of conducting layers, a side surface of each of said plurality of contacts being insulated from said plurality of conducting layers via an insulating film.

Abstract: A semiconductor device according to an embodiment includes a silicon carbide layer having first and second planes; a first silicon carbide region; second and third silicon carbide regions between the first silicon carbide region and the first plane; a fourth silicon carbide region between the second silicon carbide region and the first plane; a first and second gate electrodes; a suicide layer on the fourth silicon carbide region; a first electrode on the first plane having a first portion and a second portion, the first portion being in contact with the first silicon carbide region, the second portion being in contact with the suicide layer; a second electrode on the second plane; and an insulating layer between the first portion and the second portion having a first side surface and a second side surface, an angle of the first side surface being smaller than that of the second side surface.

Abstract: A semiconductor device according to an embodiment includes a silicon carbide layer having first and second planes; first and second trenches extending in a first direction; first and second gate electrodes; a first silicon carbide region of a first conductivity type; a plurality of second silicon carbide regions of a second conductivity type between the first silicon carbide region and the first plane, located between the first trench and the second trench, and separated from each other in the first direction; a fourth silicon carbide region of the second conductivity type between two of the second silicon carbide regions and contacting the second silicon carbide region; a fifth silicon carbide region of the second conductivity type between the two second silicon carbide regions and contacting the second silicon carbide region; a first electrode contacting the first silicon carbide region; and a second electrode.

Abstract: A stacked multilayer structure according to an embodiment of the present invention comprises: a stacked layer part including a plurality of conducting layers and a plurality of insulating layers, said plurality of insulating layers being stacked alternately with each layer of said plurality of conducting layers, one of said plurality of insulating layers being a topmost layer among said plurality of conducting layers and said plurality of insulating layers; and a plurality of contacts, each contact of said plurality of contacts being formed from said topmost layer and each contact of said plurality of contacts being in contact with a respective conducting layer of said plurality of conducting layers, a side surface of each of said plurality of contacts being insulated from said plurality of conducting layers via an insulating film.

Abstract: According to an embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region, a plurality of second semiconductor regions, a plurality of third semiconductor regions, a plurality of third electrodes, and a plurality of gate electrodes. The gate electrodes and the third electrodes are arranged parallel in a second direction and periodically with a third arrangement cycle such that the ratio of the number of the gate electrodes and the third electrodes in the first region is m3 to m4 (m3, m4 being positive integers and m3 being more than or equal to m4).