Abstract: A semiconductor integrated circuit device constituted by a plurality of sets each of which having a pair of memory mats and each memory mat having a plurality of memory cells arranged in a matrix and a sense amplifier, I/O lines for transmitting signals provided by the sense amplifiers, selecting circuitry for selecting either a condition for sending out the signals provided by the sense amplifiers on the I/O lines or a condition for not sending out the same on the I/O lines, and Y-selection lines for transmitting the selection signals. A decoder connected with selection is disposed substantially at the middle of the Y-selection lines. X- and Y-address buffers are disposed close to each other nearer to the center of the chip than X- and Y-redundant circuits. A reference voltage generating circuit is disposed nearer to the edge of the chip than an output buffer circuit. A relief selecting circuit of each memory mat is formed adjacent to a redundant line selecting circuits included in the same memory mat.

Abstract: A semiconductor memory device has a plurality of divided memory blocks, each of which has its X-system addresses assigned so that an equal number of word lines in a plurality of sets of memory mats and sense amplifiers may be selected. Each memory block is equipped with a plurality of internal voltage drop circuits for generating a supply voltage from the outside into the operating voltages of the sense amplifiers.

Abstract: A semiconductor memory is provided with a first memory cell group, a second memory cell group, a first register for a serial output operation for holding information related to the first memory cell group, a second register for a serial output operation for holding information related to the second memory cell group, and transfer means for transferring information related to either the first or second memory cell group to either the first or second serial output register. By virtue of this arrangement, while the information transferred to the first serial output register is being serially output therefrom, information can simultaneously be transferred to the second serial output register by the transfer means.