Patents by Inventor Makoto Nohmi

Makoto Nohmi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6513131
    Abstract: A self-checking circuit, which is useful for a highly reliable system configuration, includes a logic circuit having an error detection function. For function blocks for feeding out a plurality of signals that are at least duplexed, the logic circuit compares the output signals of the function blocks, and detects an error on the basis of results of the comparison. The logic circuit comprises synthesizing means provided to superimpose inherent waveforms assigned in advance to the respective output signals of the function blocks onto the output signals of one of the function blocks. The inherent waveforms are orthogonal waveforms generated by an orthogonal waveform generator circuit. The logic circuit also comprises comparison means for comparing a signal output of the synthesizing means with the signal output of the other function block to detect an error. The whole circuit including the function blocks are judged normal only if the waveforms inherent to both output signals exist.
    Type: Grant
    Filed: August 19, 1999
    Date of Patent: January 28, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyasu Kanekawa, Shoji Suzuki, Yoshimichi Sato, Korefumi Tashiro, Keisuke Bekki, Hiroshi Sato, Makoto Nohmi, Shinya Ohtsuji
  • Patent number: 6092217
    Abstract: A self-checking circuit, which is useful for a highly reliable system configuration, includes a logic circuit having an error detection function. For function blocks for feeding out a plurality of signals that are at least duplexed, the logic circuit compares the output signals of the function blocks, and detects an error on the basis of results of the comparison. The logic circuit comprises synthesizing means provided to superimpose inherent waveforms assigned in advance to the respective output signals of the function blocks onto the output signals of one of the function blocks. The inherent waveforms are orthogonal waveforms generated by an orthogonal waveform generator circuit. The logic circuit also comprises comparison means for comparing a signal output of the synthesizing means with the signal output of the other function block to detect an error. The whole circuit including the function blocks are judged normal only if the waveforms inherent to both output signals exist.
    Type: Grant
    Filed: November 3, 1997
    Date of Patent: July 18, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyasu Kanekawa, Shoji Suzuki, Yoshimichi Sato, Korefumi Tashiro, Keisuke Bekki, Hiroshi Sato, Makoto Nohmi, Shinya Ohtsuji
  • Patent number: 5805797
    Abstract: An ATP device generates control data for two systems from an ATP command speed signal, provides duplicate logic units in the ATP device so as to process the respective control data, provides at least two CRC data for checking the control data for each system, and changes the CRC data of the opposite logic unit or selects one of the two according to the content of a failure detection signal from each of the duplicated logic units. It is possible to check the control data and the operation of each logic circuit in such a way that only when all the data, circuits, and elements operate normally will an output signal for controlling the object to be controlled be outputted, and when a failure is detected in a part, an output signal to that effect is outputted. Therefore, when a failure occurs, a fail safe function for performing control on the safe side is made possible.
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: September 8, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Sato, Nobuyasu Kanekawa, Makoto Nohmi, Korefumi Tashiro
  • Patent number: 5802266
    Abstract: A self-checking circuit, which is useful for a highly reliable system configuration, includes a logic circuit having an error detection function. For function blocks for feeding out a plurality of signals that are at least duplexed, the logic circuit compares the output signals of the function blocks, and detects an error on the basis of results of the comparison. The logic circuit comprises synthesizing circuitry provided to superimpose inherent waveforms assigned in advance to the respective output signals of the function blocks onto the output signals of one of the function blocks. The inherent waveforms are orthogonal waveforms generated by an orthogonal waveform generator circuit. The logic circuit also compares the output signals having the superimposed inherent waveforms with the signal output of the other function block to detect an error. The whole circuit including the function blocks are judged normal only if the waveforms inherent to both output signals exist.
    Type: Grant
    Filed: October 14, 1994
    Date of Patent: September 1, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyasu Kanekawa, Shoji Suzuki, Yoshimichi Sato, Korefumi Tashiro, Keisuke Bekki, Hiroshi Sato, Makoto Nohmi, Shinya Ohtsuji
  • Patent number: 5625762
    Abstract: A method for extracting a three-dimensional color vector from a three-dimensional color space in which correlated features are distributed includes steps of projecting the three-dimensional color space on a two-dimensional plane, displaying the two-dimensional plane on a display screen of a display, designating a line segment on the display screen by an input device, and executing the above steps at least two times by changing the angle of projection between the three-dimensional space and the two-dimensional plane to extract the color vector.
    Type: Grant
    Filed: May 10, 1991
    Date of Patent: April 29, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Yuri Takizawa, Shinichiro Miyaoka, Makoto Kato, Makoto Nohmi
  • Patent number: 5594850
    Abstract: Simultaneously and automatically with creating a CG image by computer graphics, (1) the image is segmented to create a mask image, (2) a mask attribute table is created by data transformation, (3) an intrinsic image (object color component, light source color component, ambient color component) is created by data transformation, and the results are saved. The mask image is used to cut a portion from the computer graphics image and the cut portion is combined with a different image, which may be a natural image for example, to obtain a composite image, and at the same time, transparency processing or other such image processing is conducted on the basis of the attribute data. In addition, the color etc. of the object are modified by changing the object color vector or the like.
    Type: Grant
    Filed: January 25, 1994
    Date of Patent: January 14, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Hideo Noyama, Makoto Kato, Makoto Nohmi, Yuri Takizawa
  • Patent number: 5473382
    Abstract: A method of converting and displaying scan lines for displaying interlace video signals permitting television or the like, represented by the NTSC standard, on a non-interlace display apparatus, including a reduction of images. Scan lines of a video signal are converted by a horizontal coordinate conversion circuit, a horizontal filtering circuit, a vertical coordinate conversion circuit, a vertical filtering circuit, and a one-scan line portion of line memory. The coordinates are converted on the basis of the coordinate system of the frame of the interlace video signal; and filtering in the vertical direction is performed in field units based on the coordinate conversion.
    Type: Grant
    Filed: November 3, 1993
    Date of Patent: December 5, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Makoto Nohmi, Tomohisa Kohiyama, Masami Yamagishi, Munekazu Kamo
  • Patent number: 5398308
    Abstract: An image simulation method and system which is capable of preparing images in a simple way by running image editing tools without programming by a compiler language. The image simulation system includes a computer system for preparing an embedded image in a way that parts of a digital image or the image textures or patterns are embedded in any of several digital background images, with its geometrical shape deformed, or with color data changed as needed, or for preparing an image, color data of which are changed at particular portions thereof. The system further includes circuitry for changing the geometrical shape in preparing the embedded image, for changing the color data, for designating embedding positions, and for storing selection data for the image to be embedded, selection data for the background image, and control data for the images and such processes, and for reproducing the images on the basis of the data set up in advance.
    Type: Grant
    Filed: September 17, 1992
    Date of Patent: March 14, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Makoto Kato, Shinichiro Miyaoka, Makoto Nohmi
  • Patent number: 5369736
    Abstract: A texture mapping method projects a specified texture picture onto the surface of an object in another specified picture. Three-dimensional data on the surface shape of the object to be projected is not known previously. The three-dimensional data on the surface shape of the object is estimated on the basis of the data in the objective picture to attain the texture mapping.
    Type: Grant
    Filed: November 22, 1993
    Date of Patent: November 29, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Makoto Kato, Shinichiro Miyaoka, Makoto Nohmi
  • Patent number: 5317678
    Abstract: In order to accomplish a color adjustment capable of determining a color at a high degree of freedom, a variety of color expressions and corresponding input instructions are correlated to reflect the instruction of a color change by a certain expression upon another expression. In order to accomplish a color change considering the changes in the ambience, moreover, each vector of an object color, a light source color, a color texture, an ambient color and an input bias is decided to determine the separated component values of the former three vectors of a picture element value so that the changed color of the picture element value may be determined after the vector change from the separated component values and the changed vectors.
    Type: Grant
    Filed: March 14, 1990
    Date of Patent: May 31, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Okawara, Makoto Kato, Shinichiro Miyaoka, Makoto Nohmi, Yuri Takizawa
  • Patent number: 5299301
    Abstract: The king of a partial image designated on the display screen is determined and desired processing is effected at high speeds. For this purpose, the region designated on the displayed image and the attribute or identity data of that region are stored corresponding to each other. The attribute or identity of the partial image corresponding to the region is retrieved by using the attribute or identity data. The region of the partial image having a predetermined attribute inclusive of the retrieved attribute is picked up, and a predetermined operation is effected on the image data in the region that is picked up.
    Type: Grant
    Filed: December 7, 1992
    Date of Patent: March 29, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Makoto Nohmi, Shinichiro Miyaoka, Motohisa Funabashi
  • Patent number: 5247583
    Abstract: An image processing area is divided into a plurality of small areas which are allowed to overlap one another. One or a plurality of pixels in a region to be segmented and in a region not to be segmented are specified. A representative point of the region to be segmented and a reference point of the region not to be segmented are determined from the color information of each of the pixels. A discriminating plane, a plane or a curved surface that intersects the line segment connecting the representative point and the reference point a right angles is used in processing. By the processing a particular region can be segmented out of the image. Further, a shape model is made by two-dimensionally projecting from a given direction the three-dimensional structure expressed by a line drawing consisting of nodes and curves connecting the nodes based on priori property relating the structure of the region to be segmented in the image.
    Type: Grant
    Filed: October 31, 1990
    Date of Patent: September 21, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Makoto Kato, Shinichiro Miyaoka, Makoto Nohmi, Hiroyuki Okawara, Toyohisa Morita
  • Patent number: 5043873
    Abstract: A plurality of elemental processors each include a local memory for storing data and task programs and an execution section for executing the task programs. A communications section transfers data among the processors. In a method of parallel processing with these elemental processors, a task program is executed in one of the processors. A detection operation is conducted to determine whether the data from the task program is to be copied to the local memories of other processors. The detection is based on predetermined information which is stored in the local memory of the processor which performs the task program and indicates which of the other processors will need the data. The detection also determines which of the other processors that will require access to the data are ready to receive the data.
    Type: Grant
    Filed: August 17, 1989
    Date of Patent: August 27, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Akira Muramatsu, Kousuke Sakoda, Ikuo Yoshihara, Kazuo Nakao, Makoto Nohmi, Naoki Hamanaka, Shigeo Nagashima, Teruo Tanaka
  • Patent number: 5010479
    Abstract: An information processing system includes a loop-shaped signal transmission line for transmitting data to be stored, a plurality of transmission control processors disposed around the transmission line, and information processing units for inputting and outputting data to and from the signal transmission line through the corresponding transmission control processors. Each of the transmission control processors is adapted to variably control the signal amplitude of data flowing around the signal transmission line in accordance with the utilization of the data in the corresponding information processing unit.
    Type: Grant
    Filed: February 22, 1988
    Date of Patent: April 23, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Kinji Mori, Yuko Kunai, Masakazu Akiyama, Tadaaki Kadoya, Katsumi Kawano, Shoji Miyamoto, Makoto Nohmi, Sadanori Shingai, Hirokazu Ihara
  • Patent number: 4951193
    Abstract: In accessing a memory, each element processor executes a program constructed so as to designate an address belonging to a predetermined local address area for each element processor. When a memory write instruction is executed by an element processor, it is detected if the memory address designated by the instruction coincides with a predetermined address. If detected, a predetermined address belonging to a local address space of another element processor and assigned to the first-mentioned predetermined address, and the data written in response to the write instruction, are sent to the other element processor to instruct the data to be written therein as a copy data. A next task to be executed is decided independently for each element processor.
    Type: Grant
    Filed: August 14, 1987
    Date of Patent: August 21, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Akira Muramatsu, Kousuke Sakoda, Ikuo Yoshihara, Kazuo Nakao, Makoto Nohmi, Naoki Hamanaka, Shigeo Nagashima, Teruo Tanaka
  • Patent number: 4801855
    Abstract: The magnitude of current change for the change of input voltage or for the change of speed of rotation of the shunt motor is utilized, i.e., the shunt characteristics are utilized, and the voltage applied to the motor is limited so that the armature current decreases by an amount that corresponds to the increase in the armature voltage when slipping and to the decrease in the armature voltage when sliding have taken place, thereby to obtain improved adhesion characteristics. For this purpose according to the invention, an electromotive force of the motor is calculated from a motor speed detected by a detector and from a field current of the motor, a voltage drop caused by the motor resistance and the motor current is calculated, a motor voltage is calculated by adding the thus calculated voltage drop to the electromotive force of the motor, and the voltage applied to the motor is limited depending upon the calculated motor voltage.
    Type: Grant
    Filed: June 18, 1987
    Date of Patent: January 31, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Makoto Nohmi, Eiji Kozu
  • Patent number: 4779208
    Abstract: A computer system performs processing such as inference processing by sequentially executing rules each with its if-part stored in a working memory. The computer system comprises a production memory storing rules such as the laws of experience and nature and a working memory storing facts and hypothesis. The processing system processes the case where the rules include variables. To this end, this processing system groups the if-items and then-items which may be matched with each other depending on variable values, and takes representatives of the respective grouped items as association items to store the facts by the local parts of the association items.
    Type: Grant
    Filed: September 26, 1984
    Date of Patent: October 18, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Setsuo Tsuruta, Shoji Miyamoto, Makoto Nohmi
  • Patent number: 4763254
    Abstract: An information processing system includes a loop-shaped signal transmission line for transmitting data to be stored, a plurality of transmission control processors disposed around the transmission line, and information processing units for inputting and outputting data to and from the signal transmission line through the corresponding transmission control processors. Each of the transmission control processors is adapted to variably control the signal amplitude of data flowing around the signal transmission line in accordance with the utilization of the data in the corresponding information processing unit.
    Type: Grant
    Filed: May 26, 1983
    Date of Patent: August 9, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Kinji Mori, Yuko Kunai, Masakazu Akiyama, Tadaaki Kadoya, Katsumi Kawano, Shoji Miyamoto, Makoto Nohmi, Sadanori Shingai, Hirokazu Ihara
  • Patent number: 4752723
    Abstract: A chopper control system for a vehicle driven by a shunt motor. The system is provided with an integrating circuit for generating a command value for the voltage which is to be supplied to an armature of the motor in accordance with the difference between the command value of current which is to be supplied to the armature and the detected value of current flowing through the armature, and with a voltage control circuit for generating a control signal the value of which is proportional to the above command voltage value and is inversely proportional to the power source voltage value. The gate of a chopper switch is on-off controlled by the above control signal, so that the power source voltage value is converted into a voltage value corresponding to the command voltage value and is then supplied to the armature of the motor.
    Type: Grant
    Filed: February 17, 1987
    Date of Patent: June 21, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Makoto Nohmi, Tadashi Takaoka, Eiji Kozu
  • Patent number: RE32887
    Abstract: A message communication method and system in which a message signal to be communicated includes a function code signal portion and a data signal portion, the former being an index to the content of the latter and forming the substantial part of the message signal, and in which such a message signal is communicated not only among equipment blocks connected with one and the same communication line but also among those connected with different communication lines coupled with each other through a common equipment block connected with both of the coupled communication lines.
    Type: Grant
    Filed: April 3, 1987
    Date of Patent: March 14, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Kinji Mori, Makoto Nohmi, Shoji Miyamoto, Hirokazu Ihara, Hiroshi Matsumaru, Katuaki Ikeda