Patents by Inventor Makoto Totani

Makoto Totani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6527162
    Abstract: Lands formed on a flexible printed circuit board are electrically connected with lands formed on a rigid printed circuit board through solder. At this point, solder resist is formed between neighboring two lands on the rigid printed circuit board, and is terminated with an end portion that is interposed between the rigid printed circuit board and the flexible printed circuit board. Accordingly, even when surplus solder is extruded onto the rigid printed circuit board, the solder resist can prevent solder bridges from being formed between the lands.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: March 4, 2003
    Assignee: Denso Corporation
    Inventors: Makoto Totani, Toshihiro Miyake, Tomohiro Yokochi, Takehito Teramae, Yoshitaro Yazaki, Kazuyuki Deguchi, Hajime Nakagawa
  • Patent number: 6499217
    Abstract: An efficient method of manufacturing a three-dimensional printed wiring board is provided in which a conductor foil can be reliably heat-fused to the board at a relatively low temperature and the three-dimensional shape such as convex and concave of a mold can be reproduced precisely with no residual stress. The method comprises the steps of providing a filmy insulator comprising a thermoplastic resin composition containing 65-35 wt % of a polyaryl ketone resin having a crystal-melting peak temperature of 260° C. or over, and 35-65 wt % of an amorphous polyetherimide resin, and having a glass transition temperature as measured when the temperature is increased for differential scanning calorie measurement of 150-230° C.
    Type: Grant
    Filed: February 6, 2001
    Date of Patent: December 31, 2002
    Assignees: Mitsubishi Plastics Inc., Denso Corporation
    Inventors: Shingetsu Yamada, Jun Takagi, Koichiro Taniguchi, Kaoru Nomoto, Toshihiro Miyake, Kazuya Sanada, Makoto Totani
  • Publication number: 20020189862
    Abstract: An interconnection structure has a first printed circuit board including an insulating substrate made of a thermoplastic resin and a first board conductive pattern with a land, a second printed circuit board overlapped with the first printed circuit board, and including a second board conductive pattern with a land that is electrically interconnected with the land of the first printed circuit board to form an interconnection portion between the first board conductive pattern and the second board conductive pattern. A part of the thermoplastic resin constituting the insulating substrate of the first printed circuit board extends to seal the interconnection portion. The insulating substrate of the first printed circuit board is adhered to an insulating substrate of the second printed circuit through an adhesion enhancing layer in which a material for lowering a modulus of elasticity of the insulating substrate of the first printed circuit board is dispersed therein.
    Type: Application
    Filed: July 26, 2002
    Publication date: December 19, 2002
    Inventors: Toshihiro Miyake, Katsuaki Kojima, Makoto Totani, Yoshitaro Yazaki
  • Patent number: 6449836
    Abstract: In interconnecting printed circuit boards: preparing a first and second printed circuit board is accomplished with the first having an insulating substrate of thermoplastic resin and a conductive pattern with a land, while the second has a conductive pattern with a land; overlapping the land of the first with the land of the second is done to form an interconnection portion; and heating the interconnection portion at a temperature approximately higher than a glass transition temperature of the thermoplastic resin while applying pressure to the interconnection portion to create an electrical interconnection sealed with a part of the thermoplastic resin constituting the insulating substrate of the first board is accomplished. The insulating substrate of the first board is overlapped with an insulating substrate of the second printed board to interpose a film, the film including material to reduce a modulus of elasticity of the insulating substrate of the first board.
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: September 17, 2002
    Assignee: Denso Corporation
    Inventors: Toshihiro Miyake, Katsuaki Kojima, Hiroyasu Iwama, Makoto Totani, Yoshitaro Yazaki, Takehito Teramae, Tomohiro Yokochi, Kenzo Hirano, Tomoyuki Nanami
  • Publication number: 20020014518
    Abstract: Lands formed on a flexible printed circuit board are electrically connected with lands formed on a rigid printed circuit board through solder. At this point, solder resist is formed between neighboring two lands on the rigid printed circuit board, and is terminated with an end portion that is interposed between the rigid printed circuit board and the flexible printed circuit board. Accordingly, even when surplus solder is extruded onto the rigid printed circuit board, the solder resist can prevent solder bridges from being formed between the lands.
    Type: Application
    Filed: July 19, 2001
    Publication date: February 7, 2002
    Inventors: Makoto Totani, Toshihiro Miyake, Tomohiro Yokochi, Takehito Teramae, Yoshitaro Yazaki, Kazuyuki Deguchi, Hajime Nakagawa
  • Patent number: 6282098
    Abstract: An electronic circuit module has an electronic circuit module main body and two signal pedestals, one on each side of the main body. The first signal pedestal is formed at a level higher than the second signal pedestal by an amount equal to the vertical thickness of the second signal pedestal. Signal lines are formed on a bottom surface of the first signal pedestal and on a top surface of the second signal pedestal. When connected to adjacent electronic circuit modules, the first signal pedestal of the electronic circuit module overlaps a second signal pedestal of one adjacent electronic circuit module, and the second signal pedestal underlaps a first signal pedestal of another adjacent electronic circuit module to electrically connect electronic circuit modules in multiple stages, improving signal connections and reducing the size of the electronic circuit module package.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: August 28, 2001
    Assignee: Fujitsu Limited
    Inventors: Makoto Totani, Yasuhide Kuroda, Masaki Ono, Takayoshi Tanemura, Tetsuya Kiyonaga
  • Patent number: 6038135
    Abstract: A wiring board to be provided between a packaged electronic component having an integrated circuit and a mother board on which the packaged electronic component should be mounted, includes a base made of an insulating material, a first circuit pattern which is provided on a first surface of the base and has terminals connectable to terminals of the packaged electronic component for external connections, and a second circuit pattern which is provided on a second surface of the base opposite to the first surface thereof and has terminals connectable to terminals provided on the mother board.
    Type: Grant
    Filed: January 25, 1996
    Date of Patent: March 14, 2000
    Assignee: Fujitsu Limited
    Inventors: Yutaka Higashiguchi, Mitsuo Inagaki, Makoto Totani, Yasuhiro Teshima
  • Patent number: 6023098
    Abstract: A semiconductor device includes a wiring board, an electronic component supported by the wiring board, a heat conduction layer provided in the wiring board so as to be in contact with the electronic component, and terminals provided on the wiring board and thermally connected to the heat conduction layer through thermal vias provided in the wiring board. Heat generated by the electronic component conducts to the terminals through the heat conduction layer and then conducts to a circuit board on which the semiconductor device is placed.
    Type: Grant
    Filed: January 25, 1996
    Date of Patent: February 8, 2000
    Assignee: Fujitsu Limited
    Inventors: Yutaka Higashiguchi, Mitsuo Inagaki, Toshio Kumai, Ryoichi Ochiai, Makoto Totani
  • Patent number: 5783865
    Abstract: A wiring substrate has a semiconductor device mounted thereonto, the semiconductor device having ball-shaped externally connecting parts. The wiring substrate includes through holes at positions corresponding to the ball-shaped externally connecting parts and electric conductors provided inside and around the through holes. Land portions of the electric conductors, at which the electric conductors are engaged with the externally connecting parts, includes sectional tapering portions, respectively. Further, the through holes have sectional tapering portions at edge portions in proximity to the land portions, respectively. The ball-shaped externally connecting parts of the semiconductor device are engaged with the land portions provided around the through holes of the wiring substrate and having the sectional tapering portions, respectively.
    Type: Grant
    Filed: February 16, 1996
    Date of Patent: July 21, 1998
    Assignee: Fujitsu Limited
    Inventors: Yutaka Higashiguchi, Mitsuo Inagaki, Makoto Totani, Yasuhiro Teshima, Hiroshi Iimura