Abstract: Provided is a solar cell device wherein: a Cu-containing metal layer exhibits good adhesion strength with respect to an Si substrate and a tab wire; and diffusion of Cu into the substrate and an Ag finger wiring line is suppressed. Provided is a solar cell device which comprises a silicon semiconductor substrate, a Cu-containing metal layer, an Ag-containing finger wiring line, and an interface layer containing an oxide or an organic compound. The Ag-containing finger wiring line is formed on the light receiving surface of the silicon semiconductor substrate; the interface layer is formed on the light receiving surface of the silicon semiconductor substrate; and the Cu-containing metal layer is formed on the interface layer and is arranged at a distance from the Ag-containing finger wiring line.

Abstract: Connection devices for connecting together a filter, a regulator, and a lubricator, which constitute a fluidic unit, are each provided with: a base member having a hole; a pair of first and second fastening members which are mounted to one side surface and the other side surface of the base members; and first and second holders held by the first and second fastening members. The first and second holders are engaged with the engagement protrusions of the filter, the regulator, and the lubricator, and first and second nuts are engaged with the first and second fastening members through threads to connect the fluidic devices together through the first and second holders. Caps are fitted over the first holders and the first nuts.

Abstract: A solar cell module capable of preventing the occurrence of a PID failure in a solar photovoltaic power generation system with a MW capacity, said system being used in a high-temperature high-humidity environment; and a method for manufacturing this solar cell module. A solar cell module which comprises a protection glass material and a sealing material on a light receiving surface side of a substrate, and which also comprises an oxide layer between the substrate and the protection glass material, said oxide layer containing a metal element and silicon. It is preferable that the oxide layer contains at least one metal element selected from the group consisting of magnesium, aluminum, titanium, vanadium, chromium, manganese, zirconium, niobium and molybdenum. It is also preferable that the oxide layer has a refractive index of from 1.5 to 2.3 (inclusive) with respect to incident light having a wavelength of 587 nm.

Abstract: According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a co-catalyst layer and catalyst layer above a surface of a semiconductor substrate. The co-catalyst layer and catalyst layer have fcc structure. The fcc structure is formed such that (111) face of the fcc structure is to be oriented parallel to the surface of the semiconductor substrate. The catalyst includes a portion which contacts the co-catalyst layer. The portion has the fcc structure. An exposed surface of the catalyst layer is planarized by oxidation and reduction treatments. A graphene layer is formed on the catalyst layer.

Abstract: An energy storage module includes an energy storage cell group containing a plurality of energy storage cells stacked in a stacking direction, and a pair of end plates provided at both ends of the energy storage cell group in the stacking direction. A terminal frame is provided at the end plate in order to electrically connect an electrode terminal of the energy storage cell provided at an end in the stacking direction and an output line. The terminal frame is fixed to the end plate by fixing points.

Abstract: According to one embodiment, a semiconductor device is disclosed. The device includes interconnects each including a catalyst layer and a graphene layer thereon. The catalyst layer includes a first to fifth catalyst regions arranged along a first direction in order of the first to fifth catalyst regions. The first, third and fifth catalyst regions include upper surfaces higher than those of the second and fourth catalyst regions. Adjacent ones of the first to fifth catalyst regions are in contact with each other. A distance between the first and the third catalyst region and a distance between the third and fifth catalyst region are greater than a mean free path of graphene. The graphene layer includes a first graphene layer on the second catalyst region and a second graphene layer on the fourth catalyst region.

Abstract: According to one embodiment, a method for manufacturing a semiconductor device is disclosed. The method includes forming a co-catalyst layer and catalyst layer above a surface of a semiconductor substrate. The co-catalyst layer and catalyst layer have fcc structure. The fcc structure is formed such that (111) face of the fcc structure is to be oriented parallel to the surface of the semiconductor substrate. The catalyst includes a portion which contacts the co-catalyst layer. The portion has the fcc structure. An exposed surface of the catalyst layer is planarized by oxidation and reduction treatments. A graphene layer is formed on the catalyst layer.

Abstract: A power-generating module has a base, a power-generating unit that is placed in the base, a plunger that is placed in the base and that vertically reciprocates, and a drive section that interlocks with the reciprocation of the plunger and starts up the power-generating unit. The drive section is biased to a boost-up position where the plunger is boosted up. The drive section has at least two links that turn between the boost-up position and a press-in position where the power-generating unit is started up. Both ends of one of the links are turnably supported by the base. Both ends of another link are turnably supported by the plunger. The links turn in an interlocking manner by coupling to each other.

Abstract: According to one embodiment, a semiconductor device is disclosed. The device includes a foundation layer including first and second layers being different from each other in material, and the foundation layer including a surface on which a boundary of the first and second layers is presented, a catalyst layer on the surface of the foundation layer, and the catalyst layer including a protruding area. The device further includes a graphene layer being in contact with the protruding area.

Abstract: An electric storage device includes at least first to third storage modules and storage-module busbars. The at least first to third storage modules each include a plurality of storage cells. The at least first to third storage modules are arranged next to each other. Storage-module terminals of the at least first to third storage modules are adjacent to each other. The storage-module terminals of the at least first to third storage modules are electrically connected to each other with the storage-module busbars. The storage-module busbars includes a long storage-module busbar and a short storage-module busbar. The long storage-module busbar is provided at a first side of the at least first to third storage modules. The short storage-module busbar is provided at a second side of the at least first to third storage modules. The long storage-module busbar is longer than the short storage-module busbar.

Abstract: According to one embodiment, a method of manufacturing a semiconductor device, the method includes forming a graphene film on a catalytic layer, removing a part of the graphene film to form an exposed side surface of the graphene film, introducing dopant into the graphene film from the exposed side surface, and forming a graphene interconnect by patterning the graphene film into which the dopant is introduced.

Abstract: According to one embodiment, a semiconductor device is disclosed. The device includes interconnects each including a catalyst layer and a graphene layer thereon. The catalyst layer includes a first to fifth catalyst regions arranged along a first direction in order of the first to fifth catalyst regions. The first, third and fifth catalyst regions include upper surfaces higher than those of the second and fourth catalyst regions. Adjacent ones of the first to fifth catalyst regions are in contact with each other. A distance between the first and the third catalyst region and a distance between the third and fifth catalyst region are greater than a mean free path of graphene. The graphene layer includes a first graphene layer on the second catalyst region and a second graphene layer on the fourth catalyst region.

Abstract: A wire of an embodiment includes: a substrate; a metal film provided on the substrate; a metal part provided on the metal film; and graphene wires formed on the metal part, wherein the graphene wire is electrically connected to the metal film, and the metal film and the metal part are formed using different metals or alloys from each other.

Abstract: According to one embodiment, a semiconductor device includes a catalyst underlying layer formed on a substrate including semiconductor elements formed thereon and processed in a wiring pattern, a catalyst metal layer that is formed on the catalyst underlying layer and whose width is narrower than that of the catalyst underlying layer, and a graphene layer growing with a sidewall of the catalyst metal layer set as a growth origin and formed to surround the catalyst metal layer.

Abstract: According to one embodiment, a semiconductor device includes a metal interconnect and a graphene interconnect which are stacked to one another.

Abstract: A return mechanism is achieved which requires only a small force for operation. In one aspect of the present invention, a return mechanism (10) includes: a first spring (1) that acts between an operating section (11) and a working section (12); and a second spring (2) that acts between the operating section (11) and a base (13). A direction in which the second spring acts when the operating section (11) is in a first position is not parallel to a direction in which the second spring (2) acts when the operating section (11) is in a second position. A component which, of a force of the second spring, acts in a direction of motion of the operating section (11) is smaller when the operating section (11) is in the second position than in the first position.

Abstract: According to one embodiment, a method of manufacturing a semiconductor device, the method includes forming a first film having a first melting point, forming a pattern of a second film on an upper surface of the first film, the second film having a second melting point lower than the first melting point, and forming a graphene film on the upper surface of the first film, the graphene film being formed from a side surface of the pattern of the second film.

Abstract: According to one embodiment, a semiconductor device is disclosed. The device includes a foundation layer including first and second layers being different from each other in material, and the foundation layer including a surface on which a boundary of the first and second layers is presented, a catalyst layer on the surface of the foundation layer, and the catalyst layer including a protruding area. The device further includes a graphene layer being in contact with the protruding area.

Abstract: A semiconductor device according to one embodiment includes: a semiconductor substrate provided with a semiconductor element; a first conductive member formed on the semiconductor substrate; a first insulating film formed on the same layer as the first conductive member; a second conductive member formed so as to contact with a portion of an upper surface of the first conductive member; a second insulating film formed on the first insulating film so as to contact with a portion of the upper surface of the first conductive member, and including at least one type of element among elements contained in the first insulating film except Si; and an etching stopper film formed on the second insulating film so as to contact with a portion of a side surface of the second conductive member, and having an upper edge located below the upper surface of the second conductive member.

Abstract: A return mechanism is achieved which requires only a small force for operation. In one aspect of the present invention, a return mechanism (10) includes: a first spring (1) that acts between an operating section (11) and a working section (12); and a second spring (2) that acts between the operating section (11) and a base (13). A direction in which the second spring acts when the operating section (11) is in a first position is not parallel to a direction in which the second spring (2) acts when the operating section (11) is in a second position. A component which, of a force of the second spring, acts in a direction of motion of the operating section (11) is smaller when the operating section (11) is in the second position than in the first position.