Abstract: An image sensor includes a pixel array including a plurality of unit pixels, each having a photodiode, a transfer transistor, a reset transistor, a drive transistor, and a select transistor, an analog to digital converter for sampling an analogous sensing signal from the pixel array and converting the analogous sensing signal into a digital sensing signal, and a timing controller for forwarding a transfer signal which turns on the transfer transistor until after sampling the sensing signal.

Abstract: Disclosed is an image sensor including a photodiode region on a first conductive type semiconductor substrate; a first floating diffusion region having a second conductive type, separate from the photodiode region; a second floating diffusion region having the second conductive type, separate from the first floating diffusion region; a first gate on the semiconductor substrate between the photodiode region and the first floating diffusion region; and a second gate on the semiconductor substrate between the first floating diffusion region and the second floating diffusion region, wherein the semiconductor substrate and the first floating diffusion region forms a junction area that is larger than that of the semiconductor substrate and the second floating diffusion region.

Abstract: Disclosed are a pinned photodiode having and electrically controllable pinning layer and an image sensor including the pinned photodiode. A predetermined voltage is applied to the pinning layer for the depletion duration of the photodiode in the image sensor, so that stable surface pinning is acquired and the uniform surface pinning is achieved between pixels.

Abstract: An image sensor includes a charge pump circuit supplying first to third signals having sequentially decreasing voltage levels, a reset transistor having a drain and a gate connected with the charge pump circuit to form a diode connection and receiving the first to third signals, a photodiode generating photocharges, a transfer transistor forming a series connection between the photodiode and the reset transistor, a floating diffusion region forming a parallel connection between the transfer transistor and the reset transistor and storing the photocharges, and a drive transistor connected with the floating diffusion region, the reset transistor, a power supply voltage terminal, and a unit pixel output terminal. A gate of the transfer transistor receives a turn-off voltage if the first or second signal is supplied, and receives a turn-off voltage or a turn-on voltage if the third signal is supplied.

Abstract: A pixel array and an image sensor including the pixel array having improved sensitivity and can drive pixels with high resolution, according to embodiments. In embodiments, a pixel array may include a plurality of pixels having a pixel area and a logic area. The pixel array may include at least one of: (1) A photoelectric conversion unit in the pixel area of each of the pixels. (2) A pixel-area transistor disposed at a side of the photoelectric conversion unit in the pixel area. (3) A metal-0 layer on the pixel-area transistor. (4) A metal-1 layer on and/or over the metal-0 layer. (5) A light reception unit on and/or over the metal-1 layer, with the metal-1 layer being the top metal layer in the pixel area.

Abstract: A complementary metal-oxide semiconductor (CMOS) image sensor includes a photodiode formed in a substrate structure, first to fourth gate electrodes formed over the substrate structure, spacers formed on both sidewalls of the first to fourth gate electrodes and filled between the third and fourth gate electrodes, a first ion implantation region formed in a portion of the substrate structure below the spacers filled between the third and fourth gate electrodes, and second ion implantation regions formed in portions of the substrate structure exposed between the spacers, the second ion implantation regions having a higher concentration than the first ion implantation region.

Abstract: Provided is an image sensor including a drive transistor as a voltage buffer, which can suppress generation of secondary electrons from a channel of the drive transistor to prevent generation of image defects caused by dark current. The transistor includes a gate electrode formed on a substrate, source and drain regions formed in the substrate exposed to both sides of the gate electrode, respectively, and an electric field attenuation region formed on the drain region and partially overlapping the gate electrode.

Abstract: Disclosed are a pinned photodiode having and electrically controllable pinning layer and an image sensor including the pinned photodiode. A predetermined voltage is applied to the pinning layer for the depletion duration of the photodiode in the image sensor, so that stable surface pinning is acquired and the uniform surface pinning is achieved between pixels.

Abstract: An image sensor includes a charge pump circuit supplying first to third signals having sequentially decreasing voltage levels, a reset transistor having a drain and a gate connected with the charge pump circuit to form a diode connection and receiving the first to third signals, a photodiode generating photocharges, a transfer transistor forming a series connection between the photodiode and the reset transistor, a floating diffusion region forming a parallel connection between the transfer transistor and the reset transistor and storing the photocharges, and a drive transistor connected with the floating diffusion region, the reset transistor, a power supply voltage terminal, and a unit pixel output terminal. A gate of the transfer transistor receives a turn-off voltage if the first or second signal is supplied, and receives a turn-off voltage or a turn-on voltage if the third signal is supplied.

Abstract: A complementary metal-oxide semiconductor (CMOS) image sensor includes a photodiode formed in a substrate structure, first to fourth gate electrodes formed over the substrate structure, spacers formed on both sidewalls of the first to fourth gate electrodes and filled between the third and fourth gate electrodes, a first ion implantation region formed in a portion of the substrate structure below the spacers filled between the third and fourth gate electrodes, and second ion implantation regions formed in portions of the substrate structure exposed between the spacers, the second ion implantation regions having a higher concentration than the first ion implantation region.