Abstract: When a file system control part 155A writes file data into a main memory 142, a file can be easily written continuously and the number of file copy can be decreased at updating a directory entry by writing the file data and a directory entry into different allocation units. In this manner, when using a nonvolatile memory in which physical block size as an erase unit is larger than cluster size, the write performance can be enhanced.

Abstract: A reset pulse generating section applies the total of voltages of a positive voltage source and two constant-voltage sources from a high side ramp wave generating section to a high side scan switching device as the upper limit of a reset voltage pulse, and applies the ground potential from a low side ramp wave generating section to a low side scan switching device as the lower limit of the reset voltage pulse. A sustaining pulse generating section applies the upper and lower limits of a sustaining voltage pulse through a common sustaining pulse transmission path to the low side scan switching device.

Abstract: In a storage having a nonvolatile RAM of destructive read type, the number of restorations attributed to data read from the nonvolatile RAM is decreased, and the overall life of the storage is prolonged. In a storage having a nonvolatile RAM of destructive read type and a volatile RAM and holding the same data in the nonvolatile and volatile RAMs, data is read out of the volatile RAM in reading and data is written in both volatile and nonvolatile RAMs in writing.

Abstract: A physical area management table (105) and a pointer table (106) are stored in a nonvolatile auxiliary storage memory (107). When a logical-physical conversion table (108) is updated (restored) in a main storage memory (140), the restored area is determined in a re-arrangement way by the pointer table to avoid rewrite concentration on the main storage memory (140). Immediately after data is written in the main storage memory (140), the state of the physical block on the physical area management table (105) is updated. Consequently, even if power interruption occurs, it is possible to reliably judge if the data is valid or not.

Abstract: An object of the present invention is to provide a damping and soundproofing member not only excellent in an excellent damping and soundproofing effect but also excellent in easiness of forming thereof, especially capable of forming directly a damping and soundproofing layer on a substance to be adhered and further excellent in lightness, washing ability, durability, and the like. The invention relates to a structure formed by laminating cured product layers formed from plurality of fluid resin compositions on a substrate expecting a damping or soundproofing effect, wherein at least two cured product layers of the above cured product layers are different in hardness. Moreover, preferably, no part of the hardest layer in the above cured product layers is directly formed on the substrate and the hardest layer is formed on the substrate via an intermediate layer.

Abstract: A bidirectional switch includes a field-effect transistor having a first ohmic electrode, a second ohmic electrode and a gate electrode, and a control circuit for controlling between a conduction state and a cut-off state by applying a bias voltage to the gate electrode. The control circuit applies the bias voltage from the first ohmic electrode as a reference when a potential of the second ohmic electrode is higher than the potential of the first ohmic electrode, and applies the bias voltage from the second ohmic electrode as a reference when the potential of the second electrode is lower than the potential of the first ohmic electrode.

Abstract: The invention presents a memory controller capable of shortening the creation time of address management table at the time of initialization of memory card, while avoiding decline of access speed due to process of writing back the address management table in normal operation.

Abstract: There are provided a plating method for a roll and a grinding method before a cell is formed in which copper sulfate plating having a uniform thickness without any particles or pits can be applied to the roll for a gravure printing, both a middle finish grinding and a mirror surface finish grinding not depending on a grinding stone grinding can be carried out in a short period of time and a high quality roll can be provided. The grinding is carried out after applying the copper sulfate plating to the roll to attain a mirror surface finish state. The copper sulfate plating is carried out in such a way that non-soluble anode having a length more than the maximum roll length is ascended to the rotating process roll and approached to the lower surface of the roll, plating liquid having some avoidable impurities becoming a cause of particles or pits removed through a filter so as to perform a plating having no thickened portions at both ends of the roll.

Abstract: The present invention provides a nonvolatile memory device that can be used in combination with a plurality of types of memory controllers that are different in number of banks to be simultaneously accessed, the nonvolatile memory device being also capable of achieving high-speed access. The nonvolatile memory device of the present invention includes: a memory area divided into a plurality of banks from/to which data can be read/written independently; and data registers for storing data that has been read from the memory area or that is to be written to the memory area, the data registers being at least equal in number to the banks, and connections between the banks and the data registers are changed in accordance with the number of banks that are to be simultaneously accessed.

Abstract: An address at which a writing error occurs is held, and after a completion of a series of writings, the data of the held address is read. Then, a faulty-block processing is performed only for the addresses, for which it is determined that retry of writing is required, thereby preventing an increase of faulty-blocks. This can suppress the problem that when a writing is performed in a particular flash memory, a writing error frequently occurs and a large number of faulty blocks occur.

Abstract: A writing completion flag table (105) for storing a writing completion flag corresponding to a predetermined storage unit such as a cluster or a physical block is stored in a non-volatile control memory (106). When completion of data writing into a predetermined storage unit is detected, a write completion flag is written in the corresponding address of the storage unit on the write completion flag table (105). Thus, it is possible to recognize that data has been written normally. Even when the flag indicating completion of writing into a page of the writing unit of the main storage memory cannot be written, it is possible to improve the writing reliability.

Abstract: A semiconductor memory device in which data is not written in a transfer destination under a state including an error when an error occurs at the time of reading data at the transfer destination. The semiconductor memory device (1) comprising a nonvolatile memory (2) having a data writing unit smaller than a physical block is provided with an error detecting/correcting circuit (23) in the non-volatile memory (2). When data stored in a specified block of the non-volatile memory (2) is transferred to a different physical block and written, the error detecting/correcting circuit (23) performs error detection and correction of data.

Abstract: A PDP driving circuit is comprised of a power recovery unit for recovering an electric power from a capacitive load by resonance operation with PDP which is the capacitive load Cp, and reusing the recovered power. The power recovery unit includes a recovery inductor for resonating with the capacitive load, a recovery switch element for connecting the recovery capacitor to the capacitive load and recovery inductor, and forming a channel for passing resonance current, a counterflow preventive diode for blocking flow of current in the recovery switch element in reverse polarity direction, and a protective diode for forming a closed current channel including the recovery inductor and recovery switch element when the counterflow preventive diode is changed from ON state to OFF state.

Abstract: A bypass control section (6) maintains a bypass switch (5) in the ON state during the period when a battery voltage (Vi) is higher than the output voltage (Vo) to an external load (L). Upon falling of the output voltage (Vo) at a desired voltage (ET), a converter control section (4) starts switching control at once, and a step-up chopper (3) promptly starts boost operation. The bypass control section (6) maintains the bypass switch (5) in the ON state from the start of the boost operation of the step-up chopper (3) until the match between the battery voltage (Vi) and the output voltage (Vo).

Abstract: A PDP driving apparatus drives a plasma display panel (PDP) having sustain electrodes, scan electrodes, and address electrodes. The PDP driving apparatus has a plurality of switch elements. At least one of the plurality of switch elements is a normally-on switch element which turns on while a driving voltage is not applied to itself.

Abstract: A PDP driving apparatus drives a plasma display panel (PDP) having sustain electrodes, scan electrodes, and address electrodes. The PDP driving apparatus includes switch elements, and a power source circuit generates a driving voltage of the switch elements. The power source circuit includes a first voltage source, a first capacitor that charges and supplies as the driving voltage an output voltage of the first voltage source, a charging switch element that turns on when a negative electrode of the first capacitor is at a voltage higher than a specified voltage, and a first diode that is connected electrically to the charging switch element and charges the first capacitor with the output voltage of the first voltage source.

Abstract: A card information-storing portion is provided in a semiconductor memory card, and information relating to access performance such as access condition and access rate is held in the storing portion. Further, an access device acquires the held information from the semiconductor memory card to make it possible that the information can be used for control of a file system. This optimizes processing of the access device and the semiconductor memory card independent of differences in characteristics of semiconductor memory cards and management methods used, realizing high-rate access from the access device to a semiconductor memory card.

Abstract: A PDP driving apparatus drives a plasma display panel (PDP) having sustain electrodes, scan electrodes, and address electrodes. The PDP driving apparatus includes a high side switch element and a low side switch element, those electrically coupled in series. A specific pulse voltage is applied from a junction point of the high side switch element and the low side switch element to at least sustain electrodes, scan electrodes, or address electrodes of the plasma display panel. At least one of the high side switch element and the low side switch element is a bidirectional switch element.

Abstract: With nonvolatile memory device employing a nonvolatile memory such as multiple-valued NAND flash memory or the like in which each memory cell holds data in a plurality of pages, there is such a problem that, if an error occurred under writing data, data stored in other page in the same group of the current page is changed, and hence the object of the present invention is to solve this problem. In writing data into a nonvolatile memory 110, when error occurred under writing data into a certain page, an error page identification part 128 identifies an error type and a physical address of the page where error occurred. An error corrector 129 then corrects errors occurred in other pages belonging to the same group of error occurrence page.