Patents by Inventor Mandyam Sriram
Mandyam Sriram has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8709551Abstract: Methods and hardware for depositing ultra-smooth silicon-containing films and film stacks are described. In one example, an embodiment of a method for forming a silicon-containing film on a substrate in a plasma-enhanced chemical vapor deposition apparatus is disclosed, the method including supplying a silicon-containing reactant to the plasma-enhanced chemical vapor deposition apparatus; supplying a co-reactant to the plasma-enhanced chemical vapor deposition apparatus; supplying a capacitively-coupled plasma to a process station of the plasma-enhanced chemical vapor deposition apparatus, the plasma including silicon radicals generated from the silicon-containing reactant and co-reactant radicals generated from the co-reactant; and depositing the silicon-containing film on the substrate, the silicon-containing film having a refractive index of between 1.4 and 2.1, the silicon-containing film further having an absolute roughness of less than or equal to 4.5 ? as measured on a silicon substrate.Type: GrantFiled: December 16, 2010Date of Patent: April 29, 2014Assignee: Novellus Systems, Inc.Inventors: Keith Fox, Dong Niu, Joe Womack, Mandyam Sriram, George Andrew Antonelli, Bart van Schravendijk, Jennifer O'Loughlin
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Publication number: 20140094035Abstract: Techniques, systems, and apparatuses for performing carbon gap-fill in semiconductor wafers are provided. The techniques may include performing deposition-etching operations in a cyclic fashion to fill a gap feature with carbon. A plurality of such deposition-etching cycles may be performed, resulting in a localized build-up of carbon film on the top surface of the semiconductor wafer near the gap feature. An ashing operation may then be performed to preferentially remove the built-up material from the top surface of the semiconductor wafer. Further groups of deposition-etching cycles may then be performed, interspersed with further ashing cycles.Type: ApplicationFiled: May 17, 2013Publication date: April 3, 2014Applicant: Novellus Systems, Inc.Inventors: Chunhai Ji, Sirish Reddy, Tuo Wang, Mandyam Sriram
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Patent number: 8637411Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by intermittent delivery of dopant species to the film between the cycles of adsorption and reaction.Type: GrantFiled: September 23, 2011Date of Patent: January 28, 2014Assignee: Novellus Systems, Inc.Inventors: Shankar Swaminathan, Jon Henri, Dennis M. Hausmann, Pramod Subramonium, Mandyam Sriram, Vishwanathan Rangarajan, Kirthi K. Kattige, Bart J. van Schravendijk, Andrew J. McKerrow
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Publication number: 20130319329Abstract: Embodiments related to depositing thin conformal films using plasma-activated conformal film deposition (CFD) processes are described herein. In one example, a method of processing a substrate includes, applying photoresist to the substrate, exposing the photoresist to light via a stepper, patterning the resist with a pattern and transferring the pattern to the substrate, selectively removing photoresist from the substrate, placing the substrate into a process station, and, in the process station, in a first phase, generating radicals off of the substrate and adsorbing the radicals to the substrate to form active species, in a first purge phase, purging the process station, in a second phase, supplying a reactive plasma to the surface, the reactive plasma configured to react with the active species and generate the film, and in a second purge phase, purging the process station.Type: ApplicationFiled: August 9, 2013Publication date: December 5, 2013Applicant: Novellus Systems, Inc.Inventors: Ming Li, Hu Kang, Mandyam Sriram, Adrien Lavoie
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Publication number: 20130323930Abstract: Provided are methods and systems for forming air gaps in an interconnect layer between adjacent conductive lines. Protective layers may be selectively formed on exposed surfaces of the conductive lines, while structures in between the lines may remain unprotected. These structures may be made from a sacrificial material that is later removed to form voids. In certain embodiments, the structures are covered with a permeable non-protective layer that allows etchants and etching products to pass through during removal. When a work piece having a selectively formed protective layer is exposed to gas or liquid etchants, these etchants remove the sacrificial material without etching or otherwise impacting the metal lines. Voids formed in between these lines may be then partially filled with a dielectric material to seal the voids and/or protect sides of the metal lines. Additional interconnect layers may be formed above the processed layer containing air gaps.Type: ApplicationFiled: May 29, 2012Publication date: December 5, 2013Inventors: Kaushik Chattopadhyay, George A. Antonelli, Pramod Subramonium, Mandyam Sriram, Tighe A. Spurlin
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Publication number: 20130316518Abstract: Smooth silicon films having low compressive stress and smooth tensile silicon films are deposited by plasma enhanced chemical vapor deposition (PECVD) using a process gas comprising a silicon-containing precursor (e.g., silane), argon, and a second gas, such as helium, hydrogen, or a combination of helium and hydrogen. Doped smooth silicon films and smooth silicon germanium films can be obtained by adding a source of dopant or a germanium-containing precursor to the process gas. In some embodiments dual frequency plasma comprising high frequency (HF) and low frequency (LF) components is used during deposition, resulting in improved film roughness. The films are characterized by roughness (Ra) of less than about 7 ?, such as less than about 5 ? as measured by atomic force microscopy (AFM), and a compressive stress of less than about 500 MPa in absolute value. In some embodiments smooth tensile silicon films are obtained.Type: ApplicationFiled: May 23, 2012Publication date: November 28, 2013Inventors: Alice HOLLISTER, Sirish REDDY, Keith FOX, Mandyam SRIRAM, Joe WOMACK
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Patent number: 8524612Abstract: Embodiments related to depositing thin conformal films using plasma-activated conformal film deposition (CFD) processes are described herein. In one example, a method of processing a substrate includes, applying photoresist to the substrate, exposing the photoresist to light via a stepper, patterning the resist with a pattern and transferring the pattern to the substrate, selectively removing photoresist from the substrate, placing the substrate into a process station, and, in the process station, in a first phase, generating radicals off of the substrate and adsorbing the radicals to the substrate to form active species, in a first purge phase, purging the process station, in a second phase, supplying a reactive plasma to the surface, the reactive plasma configured to react with the active species and generate the film, and in a second purge phase, purging the process station.Type: GrantFiled: January 21, 2011Date of Patent: September 3, 2013Assignee: Novellus Systems, Inc.Inventors: Ming Li, Hu Kang, Mandyam Sriram, Adrien LaVoie
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Patent number: 8479683Abstract: A method of forming a boron nitride or boron carbon nitride dielectric produces a conformal layer without loading effect. The dielectric layer is formed by chemical vapor deposition (CVD) of a boron-containing film on a substrate, at least a portion of the deposition being conducted without plasma, and then exposing the deposited boron-containing film to a plasma. The CVD component dominates the deposition process, producing a conformal film without loading effect. The dielectric is ashable, and can be removed with a hydrogen plasma without impacting surrounding materials. The dielectric has a much lower wet etch rate compared to other front end spacer or hard mask materials such as silicon oxide or silicon nitride, and has a relatively low dielectric constant, much lower then silicon nitride.Type: GrantFiled: September 13, 2012Date of Patent: July 9, 2013Assignee: Novellus Systems, Inc.Inventors: George Andrew Antonelli, Mandyam Sriram, Vishwanathan Rangarajan, Pramod Subramonium
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Publication number: 20130157466Abstract: The embodiments herein relate to plasma-enhanced chemical vapor deposition methods and apparatus for depositing silicon nitride on a substrate. The disclosed methods provide silicon nitride films having wet etch rates (e.g., in dilute hydrofluoric acid or hot phosphoric acid) suitable for certain applications such as vertical memory devices. Further, the methods provide silicon nitride films having defined levels of internal stress suitable for the applications in question. These silicon nitride film characteristics can be set or tuned by controlling, for example, the composition and flow rates of the precursors, as well as the RF power supplied to the plasma and the pressure in the reactor. In certain embodiments, a boron-containing precursor is added.Type: ApplicationFiled: February 13, 2013Publication date: June 20, 2013Inventors: Keith Fox, Dong Niu, Joseph L. Womack, Mandyam Sriram, George Andrew Antonelli, Bart J. van Schravendijk, Jennifer O'Loughlin
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Publication number: 20130040447Abstract: Disclosed herein are methods of doping a patterned substrate in a reaction chamber. The methods may include forming a first conformal film layer which has a dopant source including a dopant, and driving some of the dopant into the substrate to form a conformal doping profile. In some embodiments, forming the first film layer may include introducing a dopant precursor into the reaction chamber, adsorbing the dopant precursor under conditions whereby it forms an adsorption-limited layer, and reacting the adsorbed dopant precursor to form the dopant source. Also disclosed herein are apparatuses for doping a substrate which may include a reaction chamber, a gas inlet, and a controller having machine readable code including instructions for operating the gas inlet to introduce dopant precursor into the reaction chamber so that it is adsorbed, and instructions for reacting the adsorbed dopant precursor to form a film layer containing a dopant source.Type: ApplicationFiled: September 7, 2012Publication date: February 14, 2013Inventors: Shankar Swaminathan, Mandyam Sriram, Bart van Schravendijk, Pramod Subramonium, Adrien La Voie
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Patent number: 8362571Abstract: Transistor architectures and fabrication processes generate channel strain without adversely impacting the efficiency of the transistor fabrication process while preserving the material quality and enhancing the performance of the resulting transistor. Transistor strain is generated is PMOS devices using a highly compressive post-salicide amorphous carbon capping layer applied as a blanket over on at least the source and drain regions. The stress from this capping layer is uniaxially transferred to the PMOS channel through the source-drain regions to create compressive strain in PMOS channel.Type: GrantFiled: January 28, 2011Date of Patent: January 29, 2013Assignee: Novellus Systems, Inc.Inventors: Qingguo Wu, James S. Sims, Mandyam Sriram, Seshasayee Varadarajan, Haiying Fu, Pramod Subramonium, Jon Henri, Sirish Reddy
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Publication number: 20130008378Abstract: A method of forming a boron nitride or boron carbon nitride dielectric produces a conformal layer without loading effect. The dielectric layer is formed by chemical vapor deposition (CVD) of a boron-containing film on a substrate, at least a portion of the deposition being conducted without plasma, and then exposing the deposited boron-containing film to a plasma. The CVD component dominates the deposition process, producing a conformal film without loading effect. The dielectric is ashable, and can be removed with a hydrogen plasma without impacting surrounding materials. The dielectric has a much lower wet etch rate compared to other front end spacer or hard mask materials such as silicon oxide or silicon nitride, and has a relatively low dielectric constant, much lower then silicon nitride.Type: ApplicationFiled: September 13, 2012Publication date: January 10, 2013Inventors: George Andrew Antonelli, Mandyam Sriram, Vishwanathan Rangarajan, Pramod Subramonium
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Patent number: 8317923Abstract: Protective self aligned buffer (PSAB) layers are layers of material that are selectively formed at the surface of metal layers in a partially fabricated semiconductor device. In a Damascene interconnect, PSAB layer typically resides at an interface between the metal layer and a dielectric diffusion barrier layer. PSAB layers promote improved adhesion between a metal layer and an adjacent dielectric diffusion barrier layer. Further, PSAB layers can protect metal surfaces from inadvertent oxidation during fabrication process. A PSAB layer may be formed entirely within the top portion of a metal layer, by, for example, chemically converting metal surface to a thin layer of metal silicide. Thickness of PSAB layers, and, consequently resistance of interconnects can be controlled by partially passivating metal surface prior to formation of PSAB layer. Such passivation can be accomplished by controllably treating metal surface with a nitrogen-containing compound to convert metal to metal nitride.Type: GrantFiled: April 16, 2010Date of Patent: November 27, 2012Assignee: Novellus Systems, Inc.Inventors: Kaushik Chattopadhyay, Bart van Schravendijk, Yongsik Yu, Mandyam Sriram
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Patent number: 8288292Abstract: A method of forming a boron nitride or boron carbon nitride dielectric produces a conformal layer without loading effect. The dielectric layer is formed by chemical vapor deposition (CVD) of a boron-containing film on a substrate, at least a portion of the deposition being conducted without plasma, and then exposing the deposited boron-containing film to a plasma. The CVD component dominates the deposition process, producing a conformal film without loading effect. The dielectric is ashable, and can be removed with a hydrogen plasma without impacting surrounding materials. The dielectric has a much lower wet etch rate compared to other front end spacer or hard mask materials such as silicon oxide or silicon nitride, and has a relatively low dielectric constant, much lower than silicon nitride.Type: GrantFiled: March 30, 2010Date of Patent: October 16, 2012Assignee: Novellus Systems, Inc.Inventors: George Andrew Antonelli, Mandyam Sriram, Vishwanathan Rangarajan, Pramod Subramonium
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Patent number: 8217513Abstract: Embodiments related to the cleaning of interface surfaces in a semiconductor wafer fabrication process via remote plasma processing are disclosed herein. For example, in one disclosed embodiment, a semiconductor processing apparatus includes a processing chamber, a load lock coupled to the processing chamber via a transfer port, a wafer pedestal disposed in the load lock and configured to support a wafer in the load lock, a remote plasma source configured to provide a remote plasma to the load lock, and an ion filter disposed between the remote plasma source and the wafer pedestal.Type: GrantFiled: February 2, 2011Date of Patent: July 10, 2012Assignee: Novellus Systems, Inc.Inventors: George Andrew Antonelli, Jennifer O'Loughlin, Tony Xavier, Mandyam Sriram, Bart van Schravendijk, Vishwanathan Rangarajan, Seshasayee Varadarajan, Bryan L. Buckalew
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Publication number: 20120142172Abstract: Smooth silicon and silicon germanium films are deposited by plasma enhanced chemical vapor deposition (PECVD). The films are characterized by roughness (Ra) of less than about 4 ?. In some embodiments, smooth silicon films are undoped and doped polycrystalline silicon films. The dopants can include boron, phosphorus, and arsenic. In some embodiments the smooth polycrystalline silicon films are also highly conductive. For example, boron-doped polycrystalline silicon films having resistivity of less than about 0.015 Ohm cm and Ra of less than about 4 ? can be deposited by PECVD. In some embodiments smooth silicon films are incorporated into stacks of alternating layers of doped and undoped polysilicon, or into stacks of alternating layers of silicon oxide and doped polysilicon employed in memory devices. Smooth films can be deposited using a process gas having a low concentration of silicon-containing precursor and/or a process gas comprising a silicon-containing precursor and H2.Type: ApplicationFiled: December 7, 2011Publication date: June 7, 2012Inventors: Keith FOX, Mandyam SRIRAM, Bart VAN SCHRAVENDIJK, Jennifer O'LOUGHLIN, Joe WOMACK
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Publication number: 20120077349Abstract: Embodiments related to depositing thin conformal films using plasma-activated conformal film deposition (CFD) processes are described herein. In one example, a method of processing a substrate includes, applying photoresist to the substrate, exposing the photoresist to light via a stepper, patterning the resist with a pattern and transferring the pattern to the substrate, selectively removing photoresist from the substrate, placing the substrate into a process station, and, in the process station, in a first phase, generating radicals off of the substrate and adsorbing the radicals to the substrate to form active species, in a first purge phase, purging the process station, in a second phase, supplying a reactive plasma to the surface, the reactive plasma configured to react with the active species and generate the film, and in a second purge phase, purging the process station.Type: ApplicationFiled: January 21, 2011Publication date: March 29, 2012Inventors: Ming Li, Hu Kang, Mandyam Sriram, Adrien LaVoie
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Publication number: 20120028454Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by intermittent delivery of dopant species to the film between the cycles of adsorption and reaction.Type: ApplicationFiled: September 23, 2011Publication date: February 2, 2012Inventors: Shankar Swaminathan, Jon Henri, Dennis M. Hausmann, Pramod Subramonium, Mandyam Sriram, Vishwanathan Rangarajan, Kirthi K. Kattige, Bart J. van Schravendijk, Andrew J. McKerrow
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Patent number: 8101531Abstract: Methods and hardware for depositing thin conformal films using plasma-activated conformal film deposition (CFD) processes are described herein. In one example, a method for forming a thin conformal film comprises, in a first phase, generating precursor radicals off of a surface of the substrate and adsorbing the precursor radicals to the surface to form surface active species; in a first purge phase, purging residual precursor from the process station; in a second phase, supplying a reactive plasma to the surface, the reactive plasma configured to react with the surface active species and generate the thin conformal film; and in a second purge phase, purging residual reactant from the process station.Type: GrantFiled: September 23, 2010Date of Patent: January 24, 2012Assignee: Novellus Systems, Inc.Inventors: Ming Li, Hu Kang, Mandyam Sriram, Adrien LaVoie
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Publication number: 20120009802Abstract: Methods of depositing a film on a substrate surface include surface mediated reactions in which a film is grown over one or more cycles of reactant adsorption and reaction. In one aspect, the method is characterized by intermittent delivery of dopant species to the film between the cycles of adsorption and reaction.Type: ApplicationFiled: September 1, 2011Publication date: January 12, 2012Inventors: Adrien LaVoie, Mandyam Sriram