Patents by Inventor Manfred Kotek

Manfred Kotek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6833584
    Abstract: A trench power semiconductor component is described which has an edge cell in which an edge trench is provided. The edge trench, at least on an outer side wall, has a thicker insulating layer than an insulating layer of trenches of the cell array. This simple configuration provides a high dielectric strength and is economical to produce.
    Type: Grant
    Filed: June 10, 2002
    Date of Patent: December 21, 2004
    Assignee: Infineon Technologies AG
    Inventors: Ralf Henninger, Franz Hirler, Manfred Kotek, Joost Larik, Markus Zundel
  • Patent number: 6720616
    Abstract: A trench MOS-transistor includes a body region strengthened by an implantation area that faces the drain region to increase the avalanche resistance.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: April 13, 2004
    Assignee: Infineon Technologies AG
    Inventors: Franz Hirler, Manfred Kotek, Joost Larik, Frank Pfirsch
  • Patent number: 6528355
    Abstract: A method for fabricating a trench MOS transistor includes the step of at least partly filling the trench with a conductive material which is isolated from the inner surface of the trench by an insulating layer. The insulating layer has a layer thickness that is larger in the region of the lower end of the trench than at the upper end of the trench.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: March 4, 2003
    Assignee: Infineon Technologies AG
    Inventors: Franz Hirler, Manfred Kotek, Joost Larik
  • Publication number: 20020185680
    Abstract: A trench power semiconductor component is described which has an edge cell in which an edge trench is provided. The edge trench, at least on an outer side wall, has a thicker insulating layer than an insulating layer of trenches of the cell array. This simple configuration provides a high dielectric strength and is economical to produce.
    Type: Application
    Filed: June 10, 2002
    Publication date: December 12, 2002
    Inventors: Ralf Henninger, Franz Hirler, Manfred Kotek, Joost Larik, Markus Zundel
  • Publication number: 20020093050
    Abstract: A trench MOS-transistor includes a body region strengthened by an implantation area that faces the drain region to increase the avalanche resistance.
    Type: Application
    Filed: December 26, 2001
    Publication date: July 18, 2002
    Inventors: Franz Hirler, Manfred Kotek, Joost Larik, Frank Pfirsch
  • Publication number: 20020094635
    Abstract: A method for fabricating a trench MOS transistor includes the step of at least partly filling the trench with a conductive material which is isolated from the inner surface of the trench by an insulating layer. The insulating layer has a layer thickness that is larger in the region of the lower end of the trench than at the upper end of the trench.
    Type: Application
    Filed: January 28, 2002
    Publication date: July 18, 2002
    Inventors: Franz Hirler, Manfred Kotek, Joost Larik