Abstract: A write line circuit includes a power supply node configured to carry a power supply voltage level, a reference node configured to carry a reference voltage level, an output node, first and second switching devices coupled in series between the output node and the power supply node, and a third switching device directly coupled to each of the output node and the reference node. The first switching device is configured to selectively couple the output node to the second switching device responsive to a first data signal, the second switching device is configured to selectively couple the first switching device to the power supply node responsive to a second data signal, and the third switching device is configured to selectively couple the output node to the reference node responsive to the first data signal.

Abstract: A telecommunications service provider's real time analysis system analyzes communications data to detect potentially fraudulent communications data, where the analysis is performed in real time in the routing path of the communications data. The communications data may include calls (e.g., SS7, VoIP, etc. based calls) and messages (e.g., SMS, MMS, etc.). The real time analysis system rejects potentially fraudulent communications data and non-fraudulent communications data in order to be used in real time in the routing path of the communications data. A rejection by the real time analysis system may cause non-fraudulent communications data to still be sent to the intended destination of the communications data. The real time analysis system can be in the routing path of the communications data without further routing non-fraudulent communications data traffic to the next appropriate hop in the routing path.

Abstract: Various circuit board embodiments are disclosed. In one aspect, an apparatus is provided that includes a circuit board and a first phase change material pocket positioned on or in the circuit board and contacting a surface of the circuit board.

Abstract: A processing unit preemptively cools selected compute units prior to initiating execution of a wavefront at the selected compute units. A scheduler of the processing unit identifies that a wavefront is to be executed at a selected subset of compute units of the processing unit. In response, the processing unit's temperature control subsystem activates one or more cooling elements to reduce the temperature of the subset of compute units, prior to the scheduler initiating execution of the wavefront. By preemptively cooling the compute units, the temperature control subsystem increases the difference between the initial temperature of the compute units and a thermal throttling threshold that triggers performance-impacting temperature control measures, such as the reduction of a compute unit clock frequency.

Abstract: A write line circuit includes a power supply node configured to carry a power supply voltage level, a reference node configured to carry a reference voltage level, a first input node configured to receive a first data signal, a second input node configured to receive a second data signal, a third input node configured to receive a control signal, and an output node. The write line circuit is configured to, responsive to the first data signal, the second data signal, and the control signal, either output one of the power supply voltage level or the reference voltage level on the output node, or float the output node.

Abstract: A telecommunications service provider's real time analysis system analyzes communications data to detect potentially fraudulent communications data, where the analysis is performed in real time in the routing path of the communications data. The communications data may include calls (e.g., SS7, VoIP, etc. based calls) and messages (e.g., SMS, MMS, etc.). The real time analysis system rejects potentially fraudulent communications data and non-fraudulent communications data in order to be used in real time in the routing path of the communications data. A rejection by the real time analysis system may cause non-fraudulent communications data to still be sent to the intended destination of the communications data. The real time analysis system can be in the routing path of the communications data without further routing non-fraudulent communications data traffic to the next appropriate hop in the routing path.

Abstract: A method and apparatus for managing power in a thermal couple aware system includes determining a candidate configuration mapping based upon one or more criteria, the candidate configuration mapping being a mapping of performance for a candidate configuration of processor sockets in the thermal couple aware system. The candidate configuration mapping is evaluated by comparing the candidate configuration mapping to a stored configuration. If the evaluated candidate configuration mapping provides a better metric than the stored configuration, the stored configuration is updated with the evaluated candidate configuration mapping, and programming instructions are executed in accordance with the candidate configuration mapping if no other configuration mappings are to be determined.

Abstract: A telecommunications service provider's real time analysis system analyzes communications data to detect potentially fraudulent communications data, where the analysis is performed in real time in the routing path of the communications data. The communications data may include calls (e.g., SS7, VoIP, etc. based calls) and messages (e.g., SMS, MMS, etc.). The real time analysis system rejects potentially fraudulent communications data and non-fraudulent communications data in order to be used in real time in the routing path of the communications data. A rejection by the real time analysis system may cause non-fraudulent communications data to still be sent to the intended destination of the communications data. The real time analysis system can be in the routing path of the communications data without further routing non-fraudulent communications data traffic to the next appropriate hop in the routing path.

Abstract: A plurality of thermal electric cooler (TEC) elements are formed in a TEC grid structure. Control logic dynamically varies a supply current supplied to each TEC element (or group of TEC elements) in the TEC grid based on changes in power density respectively associated with areas cooled by each of the TEC elements or group of TEC elements.

Abstract: A semiconductor memory device comprising a plurality of memory cells configured to store digital data and an input multiplexer configured to enable the selection of a particular memory cell from the plurality of memory cells. The semiconductor memory device further comprises a read/write driver circuit configured to read data from the selected memory cell and write data to the selected memory cell, and a write logic block configured to provide logical control to the read/write driver circuit for writing data to the selected of memory cell. The read/write driver circuit may be coupled to the read/write input multiplexer by a data line and an inverted data line and the read and the write operations to the selected memory cell occur over the same data line and inverted data line.

Abstract: A telecommunications service provider's real time analysis system analyzes communications data to detect potentially fraudulent communications data, where the analysis is performed in real time in the routing path of the communications data. The communications data may include calls (e.g., SS7, VoIP, etc. based calls) and messages (e.g., SMS, MMS, etc.). The real time analysis system rejects potentially fraudulent communications data and non-fraudulent communications data in order to be used in real time in the routing path of the communications data. A rejection by the real time analysis system may cause non-fraudulent communications data to still be sent to the intended destination of the communications data. The real time analysis system can be in the routing path of the communications data without further routing non-fraudulent communications data traffic to the next appropriate hop in the routing path.

Abstract: A telecommunications service provider's real time analysis system analyzes communications data to detect potentially fraudulent communications data, where the analysis is performed in real time in the routing path of the communications data. The communications data may include calls (e.g., SS7, VoIP, etc. based calls) and messages (e.g., SMS, MMS, etc.). The real time analysis system rejects potentially fraudulent communications data and non-fraudulent communications data in order to be used in real time in the routing path of the communications data. A rejection by the real time analysis system may cause non-fraudulent communications data to still be sent to the intended destination of the communications data. The real time analysis system can be in the routing path of the communications data without further routing non-fraudulent communications data traffic to the next appropriate hop in the routing path.

Abstract: A telecommunications service provider's real time analysis system analyzes communications data to detect potentially fraudulent communications data, where the analysis is performed in real time in the routing path of the communications data. The communications data may include calls (e.g., SS7, VoIP, etc. based calls) and messages (e.g., SMS, MMS, etc.). The real time analysis system rejects potentially fraudulent communications data and non-fraudulent communications data in order to be used in real time in the routing path of the communications data. A rejection by the real time analysis system may cause non-fraudulent communications data to still be sent to the intended destination of the communications data. The real time analysis system can be in the routing path of the communications data without further routing non-fraudulent communications data traffic to the next appropriate hop in the routing path.

Abstract: A write line circuit includes a power supply node configured to carry a power supply voltage level, a reference node configured to carry a reference voltage level, a first input node configured to receive a first data signal, a second input node configured to receive a second data signal, a third input node configured to receive a control signal, and an output node. The write line circuit is configured to, responsive to the first data signal, the second data signal, and the control signal, either output one of the power supply voltage level or the reference voltage level on the output node, or float the output node.

Abstract: A semiconductor memory device comprising a plurality of memory cells configured to store digital data and an input multiplexer configured to enable the selection of a particular memory cell from the plurality of memory cells. The semiconductor memory device further comprises a read/write driver circuit configured to read data from the selected memory cell and write data to the selected memory cell, and a write logic block configured to provide logical control to the read/write driver circuit for writing data to the selected of memory cell. The read/write driver circuit may be coupled to the read/write input multiplexer by a data line and an inverted data line and the read and the write operations to the selected memory cell occur over the same data line and inverted data line.