Patents by Inventor Manish Goel

Manish Goel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240334072
    Abstract: A method of performing image signal processing includes: determining whether at least one neighbor pixel is available for each of a plurality of current pixels in a current block, wherein each of the plurality of current pixels has a current pixel value; estimating a predict pixel value for each of the plurality of current pixels in the current block based on a pixel value of the at least one neighbor pixel corresponding to each of the plurality of current pixels, using at least one of a plurality of predefined prediction modes; determining a difference metric between the predict pixel value and the current pixel value for each of the plurality of current pixels; and obtaining a processed pixel value for each of the plurality of current pixels based on the difference metric.
    Type: Application
    Filed: May 25, 2023
    Publication date: October 3, 2024
    Inventors: MANISH GOEL, GIRISH KALYANASUNDARAM, PUNEET PANDEY, MANJIT HOTA
  • Patent number: 12059977
    Abstract: A method for activating a lock in a vehicle includes capturing an image of an interior of a vehicle, the image comprising an occupant on a seat of the vehicle, detecting a weight value of the occupant on a respective seat of the vehicle, processing the image for determining whether the occupant is a human or an object or an animal, processing, in response to the determination that the occupant is the human, the image for determining a parameter of the human, and activating a lock based on the parameter, or the weight value and the parameter.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: August 13, 2024
    Assignee: HL KLEMOVE CORP.
    Inventors: Manish Goel, Gaurav Sharma, Alok Miglani
  • Patent number: 12050495
    Abstract: Methods and apparatus for creating a physically unclonable function for SRAM are disclosed. An example method includes decreasing a supply voltage of a memory array to a first voltage level, the first voltage level being below a normal operating voltage associated with the memory array, reading a first value of a bit cell after the supply voltage has been at the first voltage level, and determining a function based on the first value of the bit cell and a second value, the second value stored in the bit cell when the memory array is operating at a voltage level above the first voltage level, the function to represent an identification of a circuit including the memory array.
    Type: Grant
    Filed: December 22, 2020
    Date of Patent: July 30, 2024
    Assignee: Texas Instruments Incorporated
    Inventors: Clive Bittlestone, Joyce Kwong, Manish Goel
  • Patent number: 11604869
    Abstract: A method for providing authentication using an image sensor of an electronic device including: receiving, by the electronic device, a plurality of frames from the image sensor of the electronic device, wherein each frame includes a plurality of Optical Black (OB) pixels; determining, by the electronic device, a set of optimal OB pixels from the plurality of frames; and generating, by the electronic device, a unique key based on the set of optimal OB pixels for the authentication.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: March 14, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Manish Goel, Angel Mary Lourdu, Ayush Goel
  • Patent number: 11601139
    Abstract: Methods, apparatus, systems and articles of manufacture to determine and apply polarity-based error correction code are disclosed. In some examples, the methods and apparatus create an array by setting a first set of bit locations of a code word to have a first value and setting a second set of bit locations of the code word to have a second value different from the first value. In some examples, when the array satisfies a parity check, the methods and apparatus determine that bit locations having the first value from the array form a polarity-based error correction code.
    Type: Grant
    Filed: November 12, 2019
    Date of Patent: March 7, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Manish Goel, Yuming Zhu
  • Patent number: 11593637
    Abstract: A method, an electronic device, and computer readable medium are provided. The method includes receiving an input into a neural network that includes a kernel. The method also includes generating, during a convolution operation of the neural network, multiple panel matrices based on different portions of the input. The method additionally includes successively combining each of the multiple panel matrices with the kernel to generate an output. Generating the multiple panel matrices can include mapping elements within a moving window of the input onto columns of an indexing matrix, where a size of the window corresponds to the size of the kernel.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: February 28, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chenchi Luo, Yuming Zhu, Hyejung Kim, John Seokjun Lee, Manish Goel
  • Patent number: 11580399
    Abstract: An electronic device, method, and computer readable medium for 3D association of detected objects are provided. The electronic device includes a memory and at least one processor coupled to the memory. The at least one processor configured to convolve an input to a neural network with a basis kernel to generate a convolution result, scale the convolution result by a scalar to create a scaled convolution result, and combine the scaled convolution result with one or more of a plurality of scaled convolution results to generate an output feature map.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: February 14, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chenchi Luo, Manish Goel, David Liu
  • Publication number: 20220161688
    Abstract: The present invention relates to techniques for activating a lock in a vehicle. Said techniques discuss capturing an image of an interior of the vehicle, the image comprising an occupant on a seat of the vehicle, detecting a weight value of the occupant on a respective seat of the vehicle, processing the image for determining whether the occupant is a human or an object or an animal. It further discusses in response to the determination that the occupant is the human processing the image for determining a parameter of the human, and activating a lock based on the parameter, or the weight value and the parameter.
    Type: Application
    Filed: November 22, 2021
    Publication date: May 26, 2022
    Inventors: Manish Goel, Gaurav Sharma, Alok Miglani
  • Patent number: 11341085
    Abstract: Methods and apparatus for a low energy accelerator processor architecture with short parallel instruction word. An integrated circuit includes a system bus having a data width N, where N is a positive integer; a central processor unit coupled to the system bus and configured to execute instructions retrieved from a memory coupled to the system bus; and a low energy accelerator processor coupled to the system bus and configured to execute instruction words retrieved from a low energy accelerator code memory, the low energy accelerator processor having a plurality of execution units including a load store unit, a load coefficient unit, a multiply unit, and a butterfly/adder ALU unit, each of the execution units configured to perform operations responsive to op-codes decoded from the retrieved instruction words, wherein the width of the instruction words is equal to the data width N. Additional methods and apparatus are disclosed.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: May 24, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Srinivas Lingam, Seok-Jun Lee, Johann Zipperer, Manish Goel
  • Publication number: 20210157898
    Abstract: Accordingly, the embodiments herein provide a method for providing authentication using at least one image sensor of an electronic device. The method includes receiving, by the electronic device, a plurality of frames from the at least one image sensor of the electronic device, where each frame includes a plurality of Optical Black (OB) pixels. Further, the method includes determining, by the electronic device, at least one set of optimal OB pixels from the plurality of frames. Further, the method includes generating, by the electronic device, at least one unique key based on the at least one set of optimal OB pixels for the authentication.
    Type: Application
    Filed: November 25, 2020
    Publication date: May 27, 2021
    Inventors: Manish GOEL, Angel Mary LOURDU, Ayush GOEL
  • Patent number: 11016842
    Abstract: In described examples, data are stored in a destructive read non-volatile memory (DRNVM). The DRNVM includes an array of DRNVM cells organized as rows of data. The rows of data are subdivided into columns of code word symbols. Each column of code word symbols is encoded to store an error correction code symbol for each column of code word symbols.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: May 25, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yuming Zhu, Manish Goel, Sai Zhang
  • Patent number: 10991117
    Abstract: A method of performing loop closure detection is described. The method comprises detecting a movement of a device having a camera; and adaptively disabling or enabling, using a processor of the device, a loop closure detection of the device based upon the detected movement of the device.
    Type: Grant
    Filed: December 23, 2018
    Date of Patent: April 27, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Siddharth K. Advani, Manish Goel, Sourabh Ravindran
  • Publication number: 20210109579
    Abstract: Methods and apparatus for creating a physically unclonable function for SRAM are disclosed. An example method includes decreasing a supply voltage of a memory array to a first voltage level, the first voltage level being below a normal operating voltage associated with the memory array, reading a first value of a bit cell after the supply voltage has been at the first voltage level, and determining a function based on the first value of the bit cell and a second value, the second value stored in the bit cell when the memory array is operating at a voltage level above the first voltage level, the function to represent an identification of a circuit including the memory array.
    Type: Application
    Filed: December 22, 2020
    Publication date: April 15, 2021
    Inventors: Clive Bittlestone, Joyce Kwong, Manish Goel
  • Patent number: 10949646
    Abstract: A method of performing an iterative bundle adjustment for an imaging device is described. The method comprising implementing a plurality of functions in performing a bundle adjustment. Predetermined functions of the plurality of functions may be started using a processor for a second iteration in parallel with a first iteration of the plurality of functions. A result of the predetermined functions started during the first iteration may be used in a second iteration. An output of the bundle adjustment may then be generated for successive iterations.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: March 16, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Manish Goel, Yuming Zhu
  • Patent number: 10877531
    Abstract: Methods and apparatus for creating a physically unclonable function for SRAM are disclosed. An example method includes decreasing a supply voltage of a memory array to a first voltage level, the first voltage level being below a normal operating voltage associated with the memory array, reading a first value of a bit cell after the supply voltage has been at the first voltage level, and determining a function based on the first value of the bit cell and a second value, the second value stored in the bit cell when the memory array is operating at a voltage level above the first voltage level, the function to represent an identification of a circuit including the memory array.
    Type: Grant
    Filed: August 3, 2015
    Date of Patent: December 29, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Clive Bittlestone, Joyce Kwong, Manish Goel
  • Publication number: 20200349439
    Abstract: An electronic device, method, and computer readable medium for 3D association of detected objects are provided. The electronic device includes a memory and at least one processor coupled to the memory. The at least one processor configured to convolve an input to a neural network with a basis kernel to generate a convolution result, scale the convolution result by a scalar to create a scaled convolution result, and combine the scaled convolution result with one or more of a plurality of scaled convolution results to generate an output feature map.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 5, 2020
    Inventors: Chenchi Luo, Manish Goel, David Liu
  • Publication number: 20200349426
    Abstract: A method, an electronic device, and computer readable medium are provided. The method includes receiving an input into a neural network that includes a kernel. The method also includes generating, during a convolution operation of the neural network, multiple panel matrices based on different portions of the input. The method additionally includes successively combining each of the multiple panel matrices with the kernel to generate an output. Generating the multiple panel matrices can include mapping elements within a moving window of the input onto columns of an indexing matrix, where a size of the window corresponds to the size of the kernel.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 5, 2020
    Inventors: Chenchi Luo, Yuming Zhu, Hyejung Kim, John Seokjun Lee, Manish Goel
  • Publication number: 20200349341
    Abstract: A method of performing an iterative bundle adjustment for an imaging device is described. The method comprising implementing a plurality of functions in performing a bundle adjustment. Predetermined functions of the plurality of functions may be started using a processor for a second iteration in parallel with a first iteration of the plurality of functions. A result of the predetermined functions started during the first iteration may be used in a second iteration. An output of the bundle adjustment may then be generated for successive iterations.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 5, 2020
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Manish Goel, Yuming Zhu
  • Publication number: 20200334197
    Abstract: Methods and apparatus for a low energy accelerator processor architecture with short parallel instruction word. An integrated circuit includes a system bus having a data width N, where N is a positive integer; a central processor unit coupled to the system bus and configured to execute instructions retrieved from a memory coupled to the system bus; and a low energy accelerator processor coupled to the system bus and configured to execute instruction words retrieved from a low energy accelerator code memory, the low energy accelerator processor having a plurality of execution units including a load store unit, a load coefficient unit, a multiply unit, and a butterfly/adder ALU unit, each of the execution units configured to perform operations responsive to op-codes decoded from the retrieved instruction words, wherein the width of the instruction words is equal to the data width N. Additional methods and apparatus are disclosed.
    Type: Application
    Filed: July 6, 2020
    Publication date: October 22, 2020
    Inventors: Srinivas Lingam, Seok-Jun Lee, Johann Zipperer, Manish Goel
  • Patent number: 10796407
    Abstract: An electronic device, method, and computer readable medium for foveated storage and processing are provided. The electronic device includes a memory, and a processor coupled to the memory. The processor performs head tracking and eye tracking; generates a foveated image from an original image based on the head tracking and the eye tracking; and stores the foveated image using one of: a tile-based method or a frame-based method.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: October 6, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Manish Goel, Akila Subramaniam, Hideo Tamama, Jeffrey Tang, Seok-Jun Lee