Abstract: The present disclosure relates to a formulation and a process for the removal of inorganic impurities from waste water. The formulation consists of a blend of at least one alkali metal aluminate, at least one cationic organic coagulant and optionally at least one alkalinating agent in pre-determined proportions. The process for decontamination using the afore-stated formulation includes steps such as admixing, settling, microfiltration and optionally acidification, ultrafiltration and reverse osmosis. The disclosure further provides an apparatus for the removal of inorganic impurities from waste water.

Abstract: A method for etching an etch layer formed on a front side of a wafer and a wafer etching apparatus are provided. The wafer etching apparatus includes a first flow channel, a temperature-regulating module, and a second flow channel. The first flow channel is configured to carry a preheated/precooled liquid for controlling a temperature of a wafer. The temperature-regulating module is coupled to the first flow channel. The temperature-regulating module is configured to control a temperature of the liquid in the first flow channel. The second flow channel is configured to carry an etchant for etching an etch layer formed on a front side of the wafer. The method includes: controlling the temperature of the wafer by using the preheated/precooled liquid; and etching the etch layer with the etchant.

Abstract: Methods of and systems for removing organic substance from condensate generated from an industrial evaporation process are provided. The condensate comprises water and the organic substance. The methods and systems provide solutions related to enthalpy recovery of industrial evaporation processes such as, for example, sugar cane juice evaporation processes, dairy evaporation processes, coffee processing evaporation processes, fruit juice evaporation processes, soup evaporation processes, and chemical industry evaporation processes.

Abstract: In some embodiments, the present disclosure relates to a resistive random access memory (RRAM) memory circuit. The memory circuit has a word-line decoder operably coupled to a first RRAM device and a second RRAM device by a word-line. A bit-line decoder is coupled to the first RRAM device by a first bit-line and to the second RRAM device by a second bit-line. A bias element is configured to apply a first non-zero bias voltage to the second bit-line concurrent to the bit-line decoder applying a non-zero voltage to the first bit-line.

Abstract: The present disclosure relates to an integrated circuit, which includes a semiconductor substrate and an interconnect structure disposed over the semiconductor substrate. The interconnect structure includes a lower metal layer, an intermediate metal layer disposed over the lower metal layer, and an upper metal layer disposed over the intermediate metal layer. An upper surface of the lower metal layer and a lower surface of the intermediate metal layer are spaced vertically apart by a first distance. A resistive random access memory (RRAM) cell is arranged between the lower metal layer and the upper metal layer. The RRAM cell includes a bottom electrode and a top electrode which are separated by a data storage layer having a variable resistance. The data storage layer vertically spans a second distance that is greater than the first distance.

Abstract: The present disclosure relates to a method and apparatus for performing a read operation of an RRAM cell, which applies a non-zero bias voltage to unselected bit-lines and select-lines to increase a read current window without damaging corresponding access transistors. In some embodiments, the method may be performed by activating a word-line coupled to a row of RRAM cells comprising a selected RRAM device by applying a first read voltage to the word-line. A second read voltage is applied to a bit-line coupled to a first electrode of the selected RRAM device. One or more non-zero bias voltages are applied to bit-lines and select-lines coupled to RRAM cells, within the row of RRAM cells, having unselected RRAM devices.

Abstract: The present invention relates to a process for manufacturing an ophthalmic formulation of a carbonic anhydrase inhibitor, hydroxyl ethyl cellulose (HEC), and a beta-adrenergic antagonist for use in the treatment of ocular hypertension and glaucoma wherein the ophthalmic pharmaceutical formulation is devoid of benzalkonium chloride or any other preservatives. The present process for manufacturing is simpler, cost effective process to prepare the pharmaceutical ophthalmic formulation in a single tank, without the use of additional tanks that can be sterile filtered.

Abstract: The present disclosure relates to a method and apparatus for performing a read operation of an RRAM cell, which applies a non-zero bias voltage to unselected bit-lines and select-lines to increase a read current window without damaging corresponding access transistors. In some embodiments, the method may be performed by activating a word-line coupled to a row of RRAM cells comprising a selected RRAM device by applying a first read voltage to the word-line. A second read voltage is applied to a bit-line coupled to a first electrode of the selected RRAM device. One or more non-zero bias voltages are applied to bit-lines and select-lines coupled to RRAM cells, within the row of RRAM cells, having unselected RRAM devices.

Abstract: The present disclosure relates to an integrated circuit, which includes a semiconductor substrate and an interconnect structure disposed over the semiconductor substrate. The interconnect structure includes a lower metal layer, an intermediate metal layer disposed over the lower metal layer, and an upper metal layer disposed over the intermediate metal layer. An upper surface of the lower metal layer and a lower surface of the intermediate metal layer are spaced vertically apart by a first distance. A resistive random access memory (RRAM) cell is arranged between the lower metal layer and the upper metal layer. The RRAM cell includes a bottom electrode and a top electrode which are separated by a data storage layer having a variable resistance. The data storage layer vertically spans a second distance that is greater than the first distance.

Abstract: The present disclosure relates to a formulation and a process for the removal of inorganic impurities from waste water. The formulation consists of a blend of at least one alkali metal aluminate, at least one cationic organic coagulant and optionally at least one alkalinating agent in pre-determined proportions. The process for decontamination using the afore-stated formulation includes steps such as admixing, settling, microfiltration and optionally acidification, ultrafiltration and reverse osmosis. The disclosure further provides an apparatus for the removal of inorganic impurities from waste water.

Abstract: The present disclosure relates to an integrated circuit, which includes a semiconductor substrate and an interconnect structure disposed over the semiconductor substrate. The interconnect structure includes a lower metal layer, an intermediate metal layer disposed over the lower metal layer, and an upper metal layer disposed over the intermediate metal layer. An upper surface of the lower metal layer and a lower surface of the intermediate metal layer are spaced vertically apart by a first distance. A resistive random access memory (RRAM) cell is arranged between the lower metal layer and the upper metal layer. The RRAM cell includes a bottom electrode and a top electrode which are separated by a data storage layer having a variable resistance. The data storage layer vertically spans a second distance that is greater than the first distance.

Abstract: A method for etching an etch layer formed on a front side of a wafer and a wafer etching apparatus are provided. The wafer etching apparatus includes a first flow channel, a temperature-regulating module, and a second flow channel. The first flow channel is configured to carry a preheated/precooled liquid for controlling a temperature of a wafer. The temperature-regulating module is coupled to the first flow channel. The temperature-regulating module is configured to control a temperature of the liquid in the first flow channel. The second flow channel is configured to carry an etchant for etching an etch layer formed on a front side of the wafer. The method includes: controlling the temperature of the wafer by using the preheated/precooled liquid; and etching the etch layer with the etchant.

Abstract: The present invention relates to a process for manufacturing an ophthalmic formulation of a carbonic anhydrase inhibitor, hydroxyl ethyl cellulose (HEC), and a beta-adrenergic antagonist for use in the treatment of ocular hypertension and glaucoma wherein the ophthalmic pharmaceutical formulation is devoid of benzalkonium chloride or any other preservatives. The present process for manufacturing is simpler, cost effective process to prepare the pharmaceutical ophthalmic formulation in a single tank, without the use of additional tanks that can be sterile filtered.

Abstract: An apparatus including a memory, a first circuit and a second circuit. The memory may be divided into eight banks. Each bank may store a portion of a three-dimensional (3D) color correction lookup table. The first circuit may be configured to address the memory in response to an index of an input point. The second circuit may be configured to arrange outputs of the eight banks for color interpolation.