Patents by Inventor Manish Sharma

Manish Sharma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240329114
    Abstract: An integrated circuit on a production die comprises a device under test (DUT) cell array formed in a fill region on the production die, the DUT cell array comprising a plurality of DUT transistor structures configured for voltage contrast (VC) detection of electrical opens on the production die. The DUT transistor structures comprise one or more vias that are not located on power lines or signal lines, such that the DUT transistor structures are not connected to each other or to the electrically functioning transistors. A guard ring buffer is formed at a transition between the active transistor region and the DUT cell array.
    Type: Application
    Filed: March 30, 2023
    Publication date: October 3, 2024
    Inventors: Sairam Subramanian, Amit Paliwal, Xiao Wen, Dipto Thakurta, Manish Sharma, Daniel Murray
  • Patent number: 12106257
    Abstract: The present invention provides a data processing system and method for operating an enterprise application to execute one or more tasks including a pick-pack-ship task. The invention includes generating a graphical user interface with one or more data points providing one or more item data, one or more lot data for the item data, and one or more handling unit data for the lot data to generate a pick-pack ship projection on the interface based on Artificial intelligence processing of a historical dataset.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: October 1, 2024
    Inventors: Subhash Makhija, Manish Sharma, Abhinit Parelkar, Mowlali Pinjari, Ankita Deshpande, Naveen Kumar Gajji, Ashutosh Chahar, Aleemuddin Syed, Kavita Shamrao Borkar
  • Patent number: 12086139
    Abstract: Various examples of improving an in-memory graph query engine using a persisted storage component are provided. The method includes updating data stored in an in-memory graph query engine and, based on updating the data, converting the data to a plain text form that may be more efficiently stored in the persistent storage component. The method further includes updates to additional in-memory graph query engines from the persistent storage component such that in-memory data stored in the graph query engines is synchronized.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: September 10, 2024
    Assignee: Microsoft Technology Licensing, LLC.
    Inventors: Manish Sharma, Oliver Drew Leonard Towers, Jayanta Mondal, Siddhesh Dilip Vethe, John Robert Pao
  • Patent number: 12059977
    Abstract: A method for activating a lock in a vehicle includes capturing an image of an interior of a vehicle, the image comprising an occupant on a seat of the vehicle, detecting a weight value of the occupant on a respective seat of the vehicle, processing the image for determining whether the occupant is a human or an object or an animal, processing, in response to the determination that the occupant is the human, the image for determining a parameter of the human, and activating a lock based on the parameter, or the weight value and the parameter.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: August 13, 2024
    Assignee: HL KLEMOVE CORP.
    Inventors: Manish Goel, Gaurav Sharma, Alok Miglani
  • Publication number: 20240265092
    Abstract: Cloud storage systems and methods are described for providing event-based user state synchronization among the various cloud elements. A global user directory is maintained on a remote cloud storage system. The global user directory includes a plurality of global user definitions associated with a plurality of user accounts, where each of the user accounts has access to at least one of a remote file system (RFS) hosted by the remote cloud storage system and a local file system (LFS) hosted by a local cloud storage system. As global user definition are altered on the remote cloud storage system, user events are generated and communicated to the local cloud storage system, where they are applied to synchronize the local user definitions with the global user definitions. The invention facilitates centralized control of user definitions, near real-time event delivery to local cloud storage systems, and separation of authentication processes from customers' active directory services.
    Type: Application
    Filed: January 8, 2024
    Publication date: August 8, 2024
    Inventors: Shishir Sharma, Debjit Bhattacharjee, Amrit Jassal, Kalpesh Patel, Deepak Mehta, Przemek Grzedzielski, Sachin Shetty, Krzysztof Gardo, Daniil Iaitskov, Harikesavan Krishnan, Manish Marathe
  • Patent number: 12056000
    Abstract: In some implementations, a device may obtain a log file that includes a plurality of log entries. The device may identify a sequence of log entries, of the plurality of log entries, that are associated with a resource. The device may process the sequence of log entries to generate a sequence of log templates. The device may process the sequence of log templates to identify an anomaly associated with the sequence of log templates. The device may determine, based on the anomaly associated with the sequence of log templates, an anomaly associated with the sequence of log entries. The device may perform, based on the anomaly associated with the sequence of log entries, one or more actions.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: August 6, 2024
    Assignee: Juniper Networks, Inc.
    Inventors: Jerry Kawata, Manish Talwar, Avanthi Boyapati, Ajay Kachrani, Gert Grammel, Manjunath Ramappa Tahasildar, Harshit Sharma
  • Publication number: 20240250668
    Abstract: According to an embodiment, a digital circuit includes an OR gate and a flip-flop. The OR gate includes a first input and a second input. The first input of the OR gate is coupled to a control signal, and the second input of the OR gate is coupled to an uncovered functional combination logic of the digital circuit. The first input of the OR gate is configured to be pulled low by the control signal in response to setting the digital circuit in a configuration to test the uncovered functional combination logic. The flip-flop includes a reset pin or a set pin coupled to the output of the OR gate. The output of the flip-flop is configured to be observed during a testing of the uncovered functional combination logic to detect defects in the digital circuit.
    Type: Application
    Filed: January 24, 2023
    Publication date: July 25, 2024
    Inventors: Venkata Narayanan Srinivasan, Umesh Chandra Srivastava, Shiv Kumar Vats, Manish Sharma
  • Publication number: 20240231455
    Abstract: Apparatus and methods for implementing an adaptive Dynamic Temperature Range (DTR) control mechanism to extend dynamic temperature range. A DTR control manager is provided to initiate retrain/recalibrate high-speed IO (input-output) links without link reset and extend the dynamic temperature range to the entire operating range based on thermal and other conditions. The DTR control manager ensures optimized retraining/recalibration of the link, which is based on system level parameters (like ambient temperature, fan speed, thermal zone of the devices etc.) and other environmental conditions. In some embodiments the mechanism or algorithm of the DTR control manager can be implemented in a BMC (Baseboard Management controller) or the like and hence enables the adaptive DTR solution in an operating system (OS) agnostic and seamless manner.
    Type: Application
    Filed: September 1, 2021
    Publication date: July 11, 2024
    Inventors: Manish SHARMA, Vikas MISHRA, Richard Marian THOMAIYAR, Vikram BODIREDDY, Ashraf JAVEED, Satish MUTHIYALU
  • Publication number: 20240218563
    Abstract: Compositions comprising Group V/III nanowires, and methods of making such nanowires are described. Some compositions comprise one or more core-shell nanowires comprising a core and a first shell surrounding or substantially surrounding the core. The core is formed from GaAs(1?y)Sby, where y=about 0.03-0.07 and the first shell is formed from GaAs(1?x)SbxN, where x=0.27-0.34. The nanowires have an average emission maximum of 1.4-1.7 ?m. Some nanowires further comprise a second shell surrounding or substantially surrounding the first shell. The second shell is formed from a Group V/III material such as Ga1?mAlmAs, where m=0-0.2. Some nanowires have the structure GaAs(0.93-0.97)Sb(0.03-0.07)/GaAS(0.66-0.73)Sb(0.27-0.34)N/Ga(0.8-1)Al(0-0.2)As.
    Type: Application
    Filed: January 29, 2024
    Publication date: July 4, 2024
    Applicant: North Carolina A&T State University
    Inventors: Shanthi Iyer, Jia Li, Prithviraj Deshmukh, Manish Sharma
  • Patent number: 12013442
    Abstract: Embodiments of the present disclosure relate to in-line detection of electrical fails on integrated circuits. One embodiment is an apparatus including a device region with integrated circuits and a test region for in-line failure detection of the integrated circuits using an in-line voltage contrast test, the apparatus comprising: a substrate including a first area for the device region and a second different area for the test region; metal layers formed over both areas; wherein the integrated circuits are formed from first sections of the layers; and wherein a second section of an upper metal layer of the layers is segmented into test segments, each test segment to exhibit a predefined response during the in-line voltage contrast test depending on whether the test segment is shorted, or not, to the substrate and/or the second section of a gate layer of the layer. Other embodiments may be disclosed and/or claimed.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: June 18, 2024
    Assignee: Intel Corporation
    Inventors: Enlan Yuan, David Sanchez, Amit Paliwal, Manish Sharma, Sairam Subramanian, Sagar Suthram
  • Patent number: 12007850
    Abstract: A method for performing data backup includes: receiving a backup request specifying a file where the file is stored in a shared storage. Additionally, in response to the backup request: retrieving, by a primary data node, properties of the file; determining, by the primary data node, resource availability for plurality of secondary data nodes where the primary data node and the plurality of secondary data nodes is operatively connected to the shared storage and a backup storage; logically dividing, by the primary data node, the file into a plurality of segments using at least the properties of the file; and coordinating, by the primary data node, the backup of the file using the plurality of segments and the resource availability of the plurality of secondary data nodes.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: June 11, 2024
    Assignee: DELL PRODUCTS L.P.
    Inventors: Sunil Yadav, Shelesh Chopra, Aaditya Rakesh Bansal, Manish Sharma
  • Patent number: 12001973
    Abstract: A computing system may include a model training engine configured to train a supervised learning model with a training set comprising training probability distributions computed for training dies through a local phase of a volume diagnosis procedure. The computing system may also include a volume diagnosis adjustment engine configured to access a diagnosis report for a given circuit die that has failed scan testing and compute, through the local phase of the volume diagnosis procedure, a probability distribution for the given circuit die from the diagnosis report. The volume diagnosis adjustment engine may also adjust the probability distribution into an adjusted probability distribution using the supervised learning model and provide the adjusted probability distribution for the given circuit die as an input to a global phase of the volume diagnosis procedure to determine a global root cause distribution for multiple circuit dies that have failed the scan testing.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: June 4, 2024
    Assignee: Siemens Industry Software Inc.
    Inventors: Gaurav Veda, Wu-Tung Cheng, Manish Sharma, Huaxing Tang, Yue Tian
  • Publication number: 20240152813
    Abstract: Machine learning (ML) processes ranks data instances to determine when to adjust parameters of a machine learning model. Data instances are ranked by receiving data instances. Further, ranked instances are determined based on the data instances and a machine learning model. A metric is determined based on the ranked instances. An adjusted machine learning model is generated by adjusting one or more parameters of the machine learning model based on the metric.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 9, 2024
    Inventors: Xiang GAO, Hursh NAIK, Vincent LIN, Manish SHARMA
  • Patent number: 11947424
    Abstract: Embodiments of the invention relate to generating backups of applications. The user or administrator that monitors the backup is notified of those files and/or folders that have not been backed up in the most recent backup. Further, embodiments of the invention enable alerts to be initiated when a particular file or folder has not been backed up over multiple backups or over a predetermined period. As a result, the user or administrator can have a better understanding of the protection and lack of protection that the present backups are providing.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: April 2, 2024
    Assignee: Dell Products L.P.
    Inventors: Shelesh Chopra, Sunil Yadav, Manish Sharma, Aaditya Bansal
  • Publication number: 20240105453
    Abstract: Techniques are provided herein to form semiconductor devices that include one or more gate cuts having a very high aspect ratio (e.g., an aspect ratio of 5:1 or greater, such as 10:1). In an example, a semiconductor device includes a conductive material that is part of a transistor gate structure around or otherwise on a semiconductor region. The semiconductor region can be, for example, a fin of semiconductor material that extends between a source region and a drain region, or one or more nanowires or nanoribbons of semiconductor material that extend between a source region and a drain region. The gate structure may be interrupted between two transistors with a gate cut that extends through an entire thickness of the gate structure. A particular plasma etching process may be performed to form the gate cut with a very high height-to-width aspect ratio so as to enable densely integrated devices.
    Type: Application
    Filed: September 27, 2022
    Publication date: March 28, 2024
    Applicant: Intel Corporation
    Inventors: Reza Bayati, Matthew J. Prince, Alison V. Davis, Ramy Ghostine, Piyush M. Sinha, Oleg Golonzka, Swapnadip Ghosh, Manish Sharma
  • Patent number: 11941374
    Abstract: The present invention generally relates to system, method and graphical user interface for executing one or more tasks in dynamic data driven enterprise application. The invention includes creation of rules on a rule creation interface by one or more syntax from a rule creation syntax data library. The invention provides machine learning models driven rule engine for executing the tasks.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: March 26, 2024
    Assignee: NB Ventures, Inc.
    Inventors: Subhash Makhija, Saratendu Sethi, Huzaifa Matawala, Manish Sharma, Shivendra Singh Malik, Srishti Kush
  • Patent number: 11921586
    Abstract: A method for performing a data backup process on a cluster includes: obtaining a backup generation request for virtual machines; in response to obtaining the backup generation request: generating a first set of backup groupings based on the backup generation request where each of the first set of backup groupings includes at least one of the virtual machines; issuing a disable migration command to a plurality of production hosts where each of the plurality of production hosts is associated with at least one of the virtual machines; identifying, after the issuing, a virtual machine of the virtual machines that is migrating; removing, based on the identifying, the virtual machine from the first set of backup groupings to obtain a second set of backup groupings where the virtual machine is placed in an excluded group after the removing; and backing up the second set of backup groupings.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: March 5, 2024
    Assignee: DELL PRODUCTS L.P.
    Inventors: Sunil Yadav, Shelesh Chopra, Aaditya Rakesh Bansal, Manish Sharma
  • Patent number: 11919965
    Abstract: B-cell maturation antigen (BCMA) is expressed on malignant plasma cells. The present invention provides methods for treating multiple myeloma using bispecific antibodies (bsAbs) that bind to both BCMA and CD3 and activate T cells via the CD3 complex in the presence of BCMA-expressing tumor cells. In certain embodiments, the bispecific antigen-binding molecules of the present invention are capable of inhibiting the growth of tumors expressing BCMA.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: March 5, 2024
    Assignee: Regeneron Pharmaceuticals, Inc.
    Inventors: Israel Lowy, David Sternberg, Manish Sharma, Lieve Adriaens
  • Publication number: 20240070371
    Abstract: This application discloses a computing system to identify suspected defects in a manufactured integrated circuit, which correspond to electrical failures detected by a test applied to the manufactured integrated circuit. The computing system can utilize the suspected defects in the manufactured integrated circuit to cluster features in a physical layout design describing the manufactured integrated circuit. Each cluster of the features corresponds to a candidate for a physical root cause of the suspected defects in the manufactured integrated circuit. The computing system can detect a physical root cause of the electrical failures in the manufactured integrated circuit based on the clusters of the features. A physical failure analysis process includes an inspection of the manufactured integrated circuit to confirm the physical root cause of the electrical failures in the manufactured integrated circuit corresponds to a systemic manufacturing fault in the manufactured integrated circuit.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Inventors: Xiaoyuan Qi, Fan Jiang, Gaurav Veda, Manish Sharma, Wu-Tung Cheng
  • Publication number: 20240068694
    Abstract: Appropriate ventilation for a building space while maintaining building comfort includes tracking one or more interior environmental conditions within the building space and one or more exterior environmental conditions outside of the building space during operation of the HVAC system. An environmental model for the building space is learned over time based at least in part on these tracked environmental conditions, where the environmental model predicts an environmental state of the building space in response to operation of the HVAC system under various interior and exterior environmental conditions. A maximum allowed ventilation rate that can be achieved without causing the HVAC system to compromise on any of one or more comfort conditions of the building space is predicted using the environmental model. The outdoor air ventilation damper of the HVAC system is then controlled to provide an appropriate ventilation up to or at the predicted maximum allowed ventilation rate.
    Type: Application
    Filed: October 31, 2023
    Publication date: February 29, 2024
    Inventors: Bhavesh Gupta, Manish Sharma, Prabhat Ranjan