Patents by Inventor Manoj Mehrotra

Manoj Mehrotra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6352900
    Abstract: A method for controlled oxide growth on transistor gates. A first film (40) is formed on a semiconductor substrate (10). The film is implanted with a first species and patterned to form a transistor gate (45) . The transistor gate (45) and the semiconductor substrate (10) is implanted with a second species and the transistor gate (45) oxidized to produce an oxide film (80) on the side surface of the transistor gate (45).
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: March 5, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Manoj Mehrotra, Jerry Che-Jen Hu, Amitava Chatterjee, Mark S. Rodder
  • Patent number: 6258644
    Abstract: A mixed voltage CMOS process for high reliability and high performance core transistors and input-output transistors with reduced mask steps. A gate stack (30) is formed over the silicon substrate (10). Ion implantation is performed of a first species and a second species to produce the doping profiles (70, 80, 90, 100) in the input-output transistors.
    Type: Grant
    Filed: February 8, 2000
    Date of Patent: July 10, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Mark S. Rodder, Manoj Mehrotra, Mahalingam Nandakumar
  • Patent number: 5493134
    Abstract: A bidirectional semiconductor switching device includes a semiconductor substrate having first and second device terminals on opposite faces thereof, a thyristor in the substrate for providing regenerative conduction in a first direction, between the first device terminal and the second device terminal, and an insulated-gate bipolar junction transistor (IGBT) in the substrate for providing nonregenerative conduction in a second opposite direction, between the second device terminal and the first device terminal. In particular, the switching device includes first and second adjacent trenches therein at a face and respective first and second insulated-gate field effect transistors (IGFETs) in the trenches for providing gate-controlled turn-on and turn-off of the thyristor and the IGBT, by being electrically connected in series therewith.
    Type: Grant
    Filed: November 14, 1994
    Date of Patent: February 20, 1996
    Assignee: North Carolina State University
    Inventors: Manoj Mehrotra, Bantval J. Baliga
  • Patent number: 5365102
    Abstract: A trench MOS Schottky barrier rectifier includes a semiconductor substrate having first and second faces, a cathode region of first conductivity type at the first face and a drift region of first conductivity type on the cathode region, extending to the second face. First and second trenches are formed in the drift region at the second face and define a mesa of first conductivity type therebetween. The mesa can be rectangular or circular in shape or of stripe geometry. Insulating regions are defined on the sidewalls of the trenches, adjacent the mesa, and an anode electrode is formed on the insulating regions, and on the top of the mesa at the second face. The anode electrode forms a Schottky rectifying contact with the mesa.
    Type: Grant
    Filed: July 6, 1993
    Date of Patent: November 15, 1994
    Assignee: North Carolina State University
    Inventors: Manoj Mehrotra, Bantval J. Baliga