Abstract: Methods, devices, and systems for rendering primitives in a frame. During a visibility pass, state packets are processed to determine a register state, and the register state is stored in a memory device. During a rendering pass, the state packets are discarded and the register state is read from the memory device. In some implementations, a graphics pipeline is configured during the visibility pass based on the register state determined by processing the state packets, and the graphics pipeline is configured during the rendering pass based on the register state read from the memory device. In some implementations, replay control packets, draw packets, and the state packets, from a packet stream, are processed during the visibility pass; the draw packets are modified based on visibility information determined during the visibility pass; and the replay control packets and draw packets are processed, during the rendering pass.

Abstract: An electronic device may maintain a list of possible locations for the electronic device and a list of possible activities for the electronic device. The electronic device may gather sensor data and determine the location and the activity for the electronic device based on the sensor data. In response to detecting a change in the location and/or activity, the electronic device may obtain additional sensor data using at least one sensor that was previously turned off. Using the additional sensor data, the electronic device may make a determination to present content to the user. In response to detecting the change in the location and/or activity, the electronic device may increase a sampling rate (and power consumption) of at least one sensor.

Abstract: A system includes a processing unit such as a GPU that itself includes a command processor configured to receive instructions for execution from a software application. A processor pipeline coupled to the processing unit includes a set of parallel processing units for executing the instructions in sets. A set manager is coupled to one or more of the processor pipeline and the command processor. The set manager includes at least one table for storing a set start time, a set end time, and a set execution time. The set manager determines an execution time for one or more sets of instructions of a first window of sets of instructions submitted to the processor pipeline. Based on the execution time of the one or more sets of instructions, a set limit is determined and applied to one or more sets of instructions of a second window subsequent to the first window.

Abstract: In example implementations, an apparatus is provided. The apparatus includes a plurality of microphones to record background sounds, a noise cancellation component to generate an inverted signal to negate the background sounds from an output signal, a memory to store sound patterns associated with known events, a speaker to output the output signal, and a processor. The processor is to compare a background sound of the background sounds to sound patterns stored in the memory, detect an event when the background sound matches a sound pattern and is coming from behind a user, and execute a corrective action to the output signal in response to the event being detected and the background sound coming from behind the user.

Abstract: A method of packet attribute confirmation includes receiving, at a command processor of a parallel processor, a command packet including a received packet attribute, such as a packet size, of the command packet. The command processor compares the received packet attribute of the command packet relative to an expected packet attribute of the command packet. The command processor passes one or more commands to a prefetch parser such that a summed total size of the one or more commands is equal to the received packet size of the command packet. The command processor passes, based at least on determining a match between the received packet size and the expected packet size, the received command packet to the prefetch parser. Otherwise, the command processor passes, based at least on determining a mismatch between the received packet size and the expected packet size, one or more no-operation instructions to the prefetch parser.

Abstract: An apparatus may identify each object of a set of objects included in a first location, wherein the set of objects includes at least one IoT device and at least one other object. The apparatus may determine a first set of attributes for the at least one IoT device. The apparatus may store registration information associated with the at least one IoT device, the registration information including a first identifier associated with the at least one IoT device and including the first set of attributes for the at least one IoT device. The apparatus may obtain an input. The apparatus may determine whether the input corresponds to the at least one IoT device based on the registration information associated with the at least one IoT device. The apparatus may control the at least one IoT device when the input corresponds to the at least one IoT device.

Abstract: An apparatus for optimizing a computational network is configure to receive an input at a first processing component. The first processing component may include at least a first programmable processing component and a second programmable processing component. The first programmable processing component is configured to compute a first nonlinear function and the second programmable processing component is configured to compute a second nonlinear function which is different than the second nonlinear function. The computational network which may be a recurrent neural network such as a long short-term memory may be operated to generate an inference based at least in part on outputs of the first programmable processing component and the second programmable processing component.

Abstract: Examples of machine learning model training are described herein. In some examples, a method may include training, on an apparatus, an encoder machine learning model or a context machine learning model. In some examples, the method may include training the encoder machine learning model or the context machine learning model using negative samples in a latent space from emote devices and a ground truth.

Abstract: Methods and systems are disclosed for inline suspension of an accelerated processing unit (APU). Techniques include receiving a packet, including a mode of operation and commands to be executed by the APU; suspending execution of commands received in previous packets when the mode of operation is a suspension initiation mode; and executing, by the APU, the commands in the received packet. The execution of the suspended commands is restored when the mode of operation in a subsequently received packet is a suspension conclusion mode.

Abstract: Examples of methods for controlling machine learning model structures are described herein. In some examples, a method includes controlling a machine learning model structure. In some examples, the machine learning model structure may be controlled based on an environmental condition. In some examples, the machine learning model structure may be controlled to control apparatus power consumption associated with a processing load of the machine learning model structure.

Abstract: A method of processing asynchronous event-driven input samples of a continuous time signal, includes calculating a convolutional output directly from the event-driven input samples. The convolutional output is based on an asynchronous pulse modulated (APM) encoding pulse. The method further includes interpolating output between events.

Abstract: In example implementations, a device is provided. The device includes a microphone, an event generator, a keyword detector, and a digital signal processor. The digital signal processor is in communication with the keyword detector. The microphone is to receive an audio signal. The event generator generates a pattern of events from the audio signal. The keyword detector detects a keyword based on the pattern of events generated by the event generator. In response to the keyword being detected, the digital signal processor is activated to analyze subsequent audio streams.

Abstract: A method of packet attribute confirmation includes receiving, at a command processor of a parallel processor, a command packet including a received packet attribute, such as a packet size, of the command packet. The command processor compares the received packet attribute of the command packet relative to an expected packet attribute of the command packet. The command processor passes one or more commands to a prefetch parser such that a summed total size of the one or more commands is equal to the received packet size of the command packet. The command processor passes, based at least on determining a match between the received packet size and the expected packet size, the received command packet to the prefetch parser. Otherwise, the command processor passes, based at least on determining a mismatch between the received packet size and the expected packet size, one or more no-operation instructions to the prefetch parser.

Abstract: Systems, apparatuses, and methods for enabling indirect chaining of command buffers are disclosed. A system includes at least first and second processors and a memory. The first processor generates a plurality of command buffers and stores the plurality of command buffers in the memory. The first processor also generates and stores, in the memory, a table with entries specifying addresses of the plurality of command buffers and an order in which to process the command buffers. The first processor conveys an indirect buffer packet to the second processor, where the indirect buffer packet specifies a location and a size of the table in the memory. The second processor retrieves an initial entry from the table, processes a first command buffer at the address specified in the initial entry, and then returns to the table for the next entry upon completing processing of the first command buffer.

Abstract: Systems, apparatuses, and methods for enabling indirect chaining of command buffers are disclosed. A system includes at least first and second processors and a memory. The first processor generates a plurality of command buffers and stores the plurality of command buffers in the memory. The first processor also generates and stores, in the memory, a table with entries specifying addresses of the plurality of command buffers and an order in which to process the command buffers. The first processor conveys an indirect buffer packet to the second processor, where the indirect buffer packet specifies a location and a size of the table in the memory. The second processor retrieves an initial entry from the table, processes a first command buffer at the address specified in the initial entry, and then returns to the table for the next entry upon completing processing of the first command buffer.

Abstract: A system includes a processing unit such as a GPU that itself includes a command processor configured to receive instructions for execution from a software application. A processor pipeline coupled to the processing unit includes a set of parallel processing units for executing the instructions in sets. A set manager is coupled to one or more of the processor pipeline and the command processor. The set manager includes at least one table for storing a set start time, a set end time, and a set execution time. The set manager determines an execution time for one or more sets of instructions of a first window of sets of instructions submitted to the processor pipeline. Based on the execution time of the one or more sets of instructions, a set limit is determined and applied to one or more sets of instructions of a second window subsequent to the first window.

Abstract: An apparatus may identify each object of a set of objects included in a first location, wherein the set of objects includes at least one IoT device and at least one other object. The apparatus may determine a first set of attributes for the at least one IoT device. The apparatus may store registration information associated with the at least one IoT device, the registration information including a first identifier associated with the at least one IoT device and including the first set of attributes for the at least one IoT device. The apparatus may obtain an input. The apparatus may determine whether the input corresponds to the at least one IoT device based on the registration information associated with the at least one IoT device. The apparatus may control the at least one IoT device when the input corresponds to the at least one IoT device.

Abstract: An integrated circuit is configured to compute multiply-accumulate (MAC) operations in convolutional neural networks. The integrated circuit includes a lookup table (LUT) configured to store multiple values. The integrated circuit also includes a compute unit. The compute unit is composed of an accumulator. The compute unit also includes a first multiplier configured to receive a first value of a padded input feature and a first weight of a filter kernel. The compute unit also includes a first selector. The first selector is configured to select an input to supply to the accumulator between an output from the first multiplier and an output from the LUT.

Abstract: An apparatus for optimizing a computational network is configure to receive an input at a first processing component. The first processing component may include at least a first programmable processing component and a second programmable processing component. The first programmable processing component is configured to compute a first nonlinear function and the second programmable processing component is configured to compute a second nonlinear function which is different than the second nonlinear function. The computational network which may be a recurrent neural network such as a long short-term memory may be operated to generate an inference based at least in part on outputs of the first programmable processing component and the second programmable processing component.

Abstract: An apparatus for operating a computational network, such as a long short term memory, is configured to compute in a first cell, an input for a cell of a next layer based on a prior hidden state and a current input. A memory state may be computed for the first cell based on a prior memory state, the prior hidden state, and the current input. The first cell outputs the computed input to the next layer cell, which may also receive a second prior memory state, a second prior hidden state. In turn, the next layer cell computes an input for a subsequent layer cell based on the second prior hidden state and the input supplied by the first cell in parallel with the first cell computing a hidden state and a memory state to be supplied to a subsequent cell in the same layer.