Abstract: A method includes bonding a first package component and a second package component to an interposer. The first package component includes a core device die, and the second package component includes a memory die. An Independent Passive Device (IPD) die is bonded directly to the interposer. The IPD die is electrically connected to the first package component through a first conductive path in the interposer. A package substrate is bonded to the interposer die. The package substrate is on an opposing side of the interposer than the first package component and the second package component.

Abstract: A package structure and a method of forming the same are provided. The package structure includes a package substrate, an interposer substrate, and a semiconductor device. The interposer substrate is disposed over the package substrate, wherein the interposer substrate has a bottom surface facing the package substrate and a first cavity formed on the bottom surface. The semiconductor device is disposed in the first cavity. The package substrate has a top surface facing the interposer substrate and a second cavity formed on the top surface, wherein the second cavity is configured to accommodate the semiconductor device.

Abstract: A chip package is provided. The chip package includes a substrate structure including: a redistribution structure having a conductive pad; and an insulating layer under the redistribution structure. The chip package includes a first chip over the redistribution structure. The chip package includes a second chip under the substrate structure. A top portion of the second chip extends into the insulating layer from a bottom surface of the insulating layer, the bottom surface faces away from the first chip, and a portion of the insulating layer is between the second chip and the redistribution structure. The chip package includes a first molding layer over the redistribution structure and the first chip. A first sidewall of the first molding layer and a second sidewall of the redistribution structure are substantially level with each other.

Abstract: A semiconductor device includes: a metal thin film disposed on a semiconductor substrate; and first and second contact structures disposed on the metal thin film, wherein the first and second contact structures are laterally spaced from each other by a dummy layer that comprises at least one polishing resistance material.

Abstract: A method includes forming a redistribution structure over a carrier, the redistribution structure having conductive features on a surface of the redistribution structure distal the carrier; forming a conductive pillar over the surface of the redistribution structure; attaching a die to the surface of the redistribution structure adjacent to the conductive pillar, where die connectors of the die are electrically coupled to the conductive features of the redistribution structure; and attaching a pre-made substrate to the conductive pillar through a conductive joint, where the conductive joint is on the conductive pillar and comprises a different material from the conductive pillar, where the conductive joint and the conductive pillar electrically couple the redistribution structure to the pre-made substrate.

Abstract: A method includes forming a redistribution structure, which formation process includes forming a plurality of dielectric layers over a carrier, forming a plurality of redistribution lines extending into the plurality of dielectric layers, and forming a reinforcing patch over the carrier. The method further includes bonding a package component to the redistribution structure, with the package component having a peripheral region overlapping a portion of the reinforcing patch. And de-bonding the redistribution structure and the first package component from the carrier.

Abstract: An integrated circuit package integrates a photonic die (oDie) and an electronic die (eDie). More specifically, the integrated circuit package may include a plurality of redistribution layers communicatively coupled to at least one of the oDie and/or the eDie, where molded material at least partially surrounds the at least one of the oDie and/or the eDie.

Abstract: A chip package is provided. The chip package includes a substrate structure. The substrate structure includes a redistribution structure having a conductive pad. The substrate structure includes a first insulating layer under the redistribution structure. The substrate structure includes a conductive via structure passing through the first insulating layer. The conductive via structure is under and electrically connected with the conductive pad. The substrate structure includes a second insulating layer disposed between the redistribution structure and the first insulating layer. The chip package includes a first chip over the redistribution structure and electrically connected to the conductive via structure through the redistribution structure. The chip package includes a second chip under the substrate structure.

Abstract: A liquid cooling system includes a cold plate thermally coupled to a heat-generating electronic component, a heat removal unit fluidly coupled to the cold plate, and a valve fluidly coupled to the cold plate and the heat removal unit. The cold plate has an internal fluid pathway. The heat removal unit delivers the cooling fluid to the cold plate, receives heated cooling fluid from the cold plate, and removes heat from the heated cooling fluid. When the valve is in a first orientation, the cold plate and the heat removal unit are fluidly coupled in a first configuration and the cooling fluid flows through the internal fluid pathway in a first direction. When the valve is in a second orientation, the cold plate and the heat removal unit are fluidly coupled in a second configuration and the cooling fluid flows through the internal fluid pathway in a second direction.

Abstract: A heart valve prosthesis device includes a stent and leaflets. The stent includes an annular part and guide parts. A first end of the annular part includes cell sections arranged in sequence in a circumferential direction of the annular part. The guide parts are arranged at intervals in the circumferential direction of the annular part, one side of each guide part is connected to a corresponding cell section, and the other side gradually tapers to an end where a retrieval cell is provided for a pulling wire to pass through. Each guide part includes a first region being the retrieval cell, a second region aligned with the first region and configured as a central region, and a third region and a fourth region distributed on two sides of the central region in the circumferential direction of the annular part.

Abstract: A semiconductor device includes: a metal thin film disposed on a semiconductor substrate; and first and second contact structures disposed on the metal thin film, wherein the first and second contact structures are laterally spaced from each other by a dummy layer that comprises at least one polishing resistance material.

Abstract: A method includes: forming a first interposer die, wherein the first interposer die comprises a first substrate and a first redistribution layer (RDL) over the first substrate; bonding the first interposer die to a second RDL; encapsulating the second RDL and the first interposer die with a first encapsulating layer; thinning the first interpose die to expose the first RDL; and bonding a first semiconductor die to the first RDL.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least a circuit substrate, a semiconductor die and a filling material. The circuit substrate has a first surface, a second surface opposite to the first surface and a cavity concave from the first surface. The circuit substrate includes a dielectric material and a metal floor plate embedded in the dielectric material and located below the cavity. A location of the metal floor plate corresponds to a location of the cavity. The metal floor plate is electrically floating and isolated by the dielectric material. The semiconductor die is disposed in the cavity and electrically connected with the circuit substrate. The filling material is disposed between the semiconductor die and the circuit substrate. The filling material fills the cavity and encapsulates the semiconductor die to attach the semiconductor die and the circuit substrate.

Abstract: A system includes a rack of servers and a fluid circuit for cooling the rack of servers. The fluid circuit includes one or more cooling modules, a heat-exchanging module, and a pump. The one or more cooling modules are thermally connected to a conduit for flowing a coolant therethrough. Each cooling module includes a heat-exchanger thermally connected to the conduit and a chiller fluidly coupled to the heat-exchanger. The heat-exchanging module is fluidly connected to an outlet of the conduit. The pump is configured to drive the coolant from the heat-exchanging module to each server in the rack of servers.

Abstract: A closed-loop liquid cooling system includes a liquid coolant conduit, a cold plate, a pump and a heat exchanger. The liquid coolant conduit is in proximity to a heat-generating electrical component. The liquid coolant conduit allows circulation of a liquid coolant to extract heat therefrom. The liquid coolant conduit includes an inner portion that surrounds and contains the liquid coolant, and an outer portion configured to prevent or inhibit leakage of the liquid coolant from the inner portion and also detect any leakage from the inner portion. The cold plate is in thermal communication with the liquid coolant. The pump is configured to transport the liquid coolant in the liquid coolant conduit. The heat exchanger is coupled to the liquid coolant conduit to extract heat therefrom.

Abstract: A method for forming a package structure is provided. The method includes disposing a semiconductor die over a carrier substrate, wherein a removable film is formed over the semiconductor die, disposing a first stacked die package structure over the carrier substrate, wherein a top surface of the removable film is higher than a top surface of the first stacked die package structure, and removing the removable film to expose a top surface of the semiconductor die, wherein a top surface of the semiconductor die is lower than the top surface of the first stacked die package structure.

Abstract: Provided is a semiconductor device including a substrate, a channel layer, a gate structure, a first doped region, a second doped region, a third doped region and a channel cap layer. The channel layer is located on the substrate. The channel layer has a trench. The gate structure is disposed in the trench. The first doped region and the second doped region are located in the channel layer on two sides of the gate structure. The third doped region is located in the substrate below the channel layer. The channel cap layer is located between the gate structure and the first doped region, between the gate structure and the second doped region, and between the gate structure and the channel layer. An energy band gap of the channel cap layer is larger than an energy band gap of the channel layer.

Abstract: A heart valve prosthesis device includes a stent and leaflets. The stent includes an annular part and guide parts. A first end of the annular part includes cell sections arranged in sequence in a circumferential direction of the annular part. The guide parts are arranged at intervals in the circumferential direction of the annular part, one side of each guide part is connected to a corresponding cell section, and the other side gradually tapers to an end where a retrieval cell is provided for a pulling wire to pass through. Each guide part includes a first region being the retrieval cell, a second region aligned with the first region and configured as a central region, and a third region and a fourth region distributed on two sides of the central region in the circumferential direction of the annular part.

Abstract: A package structure and a method of forming the same are provided. The package structure includes a package substrate, a semiconductor chip disposed over the package substrate, and an integrated device located below and bonded to the lower surface of the semiconductor chip. The semiconductor chip has a lower surface facing the package substrate and is electrically connected to the package substrate through conductive structures. The integrated device is laterally surrounded by the conductive structures, and the integrated device and the conductive structures are located within boundaries of the semiconductor chip when viewed in a direction perpendicular to the lower surface of the semiconductor chip.

Abstract: A bendable sheath and a delivery system using the bendable sheath. The bendable sheath comprises a tube body (3). The tube body (3) comprises a distal end and a proximal end. A tube wall of the tube body (3) is connected to a pull wire (8). One end of the pull wire (8) extends towards the proximal end of the tube body (3), and the other end is connected to the tube body (3) near the distal end of the tube body (3). The pull wire (8) comprises at least a section thereof disposed freely outside the tube body (3) and near the distal end of the tube body (3). The pull wire (8) in the bendable sheath comprises the section disposed freely outside the sheath tube body (3) and, when pulled, the section is disposed so as to facilitate the application of force. The section moves relative to the tube body (3), such that a force application point is adaptively changed.