Abstract: A matchless plasma source is described. The matchless plasma source includes a controller that is coupled to a direct current (DC) voltage source of an agile DC rail to control a shape of an amplified square waveform that is generated at an output of a half-bridge transistor circuit. The matchless plasma source further includes the half-bridge transistor circuit used to generate the amplified square waveform to power an electrode, such as an antenna, of a plasma chamber. The matchless plasma source also includes a reactive circuit between the half-bridge transistor circuit and the electrode. The reactive circuit has a high-quality factor to negate a reactance of the electrode. There is no radio frequency (RF) match and an RF cable that couples the matchless plasma source to the electrode.

Abstract: A direct drive circuit for providing RF power to a component of a substrate processing system includes a clock generator to generate a clock signal at a first frequency, a gate driver to receive the clock signal and a half bridge circuit. The half bridge circuit includes a first switch with a control terminal connected to the gate driver, a first terminal and a second terminal; a second switch with a control terminal connected to the gate driver, a first terminal connected to the second terminal of the first switch and an output node, and a second terminal; a first DC supply to supply a first voltage to the first terminal of the first switch; and a second DC supply to supply a second voltage to the second terminal of the second switch. The first and the second voltages have opposite polarities and are approximately equal in magnitude.

Abstract: A direct drive circuit for providing RF power to a component of a substrate processing system includes a clock generator to generate a clock signal at a first frequency, a gate driver to receive the clock signal and a half bridge circuit. The half bridge circuit includes a first switch with a control terminal connected to the gate driver, a first terminal and a second terminal; a second switch with a control terminal connected to the gate driver, a first terminal connected to the second terminal of the first switch and an output node, and a second terminal; a first DC supply to supply a first voltage potential to the first terminal of the first switch; and a second DC supply to supply a second voltage potential to the second terminal of the second switch. The first voltage potential and the second voltage potential have opposite polarity and are approximately equal in magnitude.

Abstract: A direct drive circuit for providing RF power to a component of a substrate processing system includes a clock generator to generate a clock signal at a first frequency, a gate driver to receive the clock signal and a half bridge circuit. The half bridge circuit includes a first switch with a control terminal connected to the gate driver, a first terminal and a second terminal; a second switch with a control terminal connected to the gate driver, a first terminal connected to the second terminal of the first switch and an output node, and a second terminal; a first DC supply to supply a first voltage potential to the first terminal of the first switch; and a second DC supply to supply a second voltage potential to the second terminal of the second switch. The first voltage potential and the second voltage potential have opposite polarity and are approximately equal in magnitude.

Abstract: A plasma processing chamber and methods for operating the chamber are provided. An exemplary chamber includes an electrostatic chuck for receiving a substrate and a dielectric window connected to a top portion of the chamber. An inner side of dielectric window faces a plasma processing region that is above the electrostatic chuck and an outer side of the dielectric window is exterior to the plasma processing region. Inner and outer coils are disposed above the outer side of the dielectric window, and the inner and outer coils are connected to a first RF power source. A powered grid is disposed between the outer side of dielectric window and the inner and outer coils. The powered grid is connected to a second RF power source that is independent from the first RF power source.

Abstract: Frequency tuning for a matchless plasma source is described. To perform the frequency tuning, current is measured at an output of an amplification circuit of the matchless plasma source after a change in a frequency of operation of the matchless plasma source. Upon determining that the current has increased with the change in the frequency of operation, the frequency of operation is further changed until the current has decreased. When the current has decreased, the changed frequency of operation is further modified to be an operational frequency. When the matchless plasma source operates at the operational frequency, the current at the output of the amplification circuit is maximized.

Abstract: A matchless plasma source is described. The matchless plasma source includes a controller that is coupled to a direct current (DC) voltage source of an agile DC rail to control a shape of an amplified square waveform that is generated at an output of a half-bridge transistor circuit. The matchless plasma source further includes the half-bridge transistor circuit used to generate the amplified square waveform to power an electrode, such as an antenna, of a plasma chamber. The matchless plasma source also includes a reactive circuit between the half-bridge transistor circuit and the electrode. The reactive circuit has a high-quality factor to negate a reactance of the electrode. There is no radio frequency (RF) match and an RF cable that couples the matchless plasma source to the electrode.

Abstract: A plasma processing system for generating plasma to process a wafer. The plasma processing system includes a set of top coils for initiating the plasma, a set of side coils for affecting distribution of the plasma, and a chamber structure for containing the plasma. The chamber structure includes a chamber wall and a dielectric member. The dielectric member includes a top, a vertical wall, and a flange. The top is connected through the vertical wall to the flange, and is connected through the vertical wall and the flange to the chamber wall. The set of top coils is disposed above the top. The set of side coils surrounds the vertical wall. A vertical inner surface of the vertical wall is configured to be exposed to the plasma. The inner diameter of the vertical wall is smaller than the inner diameter of the chamber wall.

Abstract: A substrate processing tool for processing a substrate includes a processing chamber including a substrate support. First and second coils are arranged outside of the processing chamber. Each of the first and second coils includes first and second conductors. A coil driving circuit drives current through the coils to generate plasma in the processing chamber. A coil reversing circuit is configured to selectively reverse a polarity of current flowing through the first and second conductors of the first coil. The coil reversing circuit includes an H-bridge circuit.

Abstract: A matchless plasma source is described. The matchless plasma source includes a controller that is coupled to a direct current (DC) voltage source of an agile DC rail to control a shape of an amplified square waveform that is generated at an output of a half-bridge transistor circuit. The matchless plasma source further includes the half-bridge transistor circuit used to generate the amplified square waveform to power an electrode, such as an antenna, of a plasma chamber. The matchless plasma source also includes a reactive circuit between the half-bridge transistor circuit and the electrode. The reactive circuit has a high-quality factor to negate a reactance of the electrode. There is no radio frequency (RF) match and an RF cable that couples the matchless plasma source to the electrode.

Abstract: A matchless plasma source is described. The matchless plasma source includes a controller that is coupled to a direct current (DC) voltage source of an agile DC rail to control a shape of an amplified square waveform that is generated at an output of a half-bridge transistor circuit. The matchless plasma source further includes the half-bridge transistor circuit used to generate the amplified square waveform to power an electrode, such as an antenna, of a plasma chamber. The matchless plasma source also includes a reactive circuit between the half-bridge transistor circuit and the electrode. The reactive circuit has a high-quality factor to negate a reactance of the electrode. There is no radio frequency (RF) match and an RF cable that couples the matchless plasma source to the electrode.

Abstract: Apparatuses, systems, and techniques for characterizing asymmetry effects caused by cathode designs, ESC designs, cable routing, and process chamber geometries are provided. Such apparatuses, systems, and techniques may include, for example, a rotatable RF probe assembly in physical contact to a conductive plate disposed on a surface of a pedestal.

Abstract: A radiofrequency (RF) filter includes an inductive element having multiple coil sections collectively forming an undivided coil of a cable of twisted magnetic wires. At least two adjacent coil sections have different turn pitches. The cable of twisted magnetic wires includes two wires per channel and is configured for at least one channel. The cable of twisted magnetic wires at a first end of the inductive element is configured for connection to an electrical component that is to receive power from a power supply. The cable of twisted magnetic wires at a second end of the inductive element is configured for connection to the power supply. Terminating capacitive elements are electrically connected between a reference ground potential and a respective wire of the cable of twisted magnetic wires at respective locations between the second end of the inductive element and the power supply.

Abstract: A voltage sensor for a substrate processing system is provided. The voltage sensor includes a terminal, a first channel, and a second channel. The terminal connects to a pickup device of a substrate support in the substrate processing system. The first channel is configured to detect, at the pickup device, first radio frequency voltages in a first voltage range. The first channel includes a first voltage divider. The first voltage divider is connected to the terminal and is configured to output a first reduced voltage representative of a detected one of the first radio frequency voltages. The second channel is configured to detect, at the pickup device, second radio frequency voltages in a second voltage range. The second channel includes a second voltage divider. The second voltage divider is connected to the terminal and is configured to output a second reduced voltage representative of a detected one of the second radio frequency voltages. The second voltage range is different than the first voltage range.

Abstract: A substrate processing system includes a processing chamber including a substrate support to support a substrate. A coil is arranged around the processing chamber. A first RF source provides first RF power at a first magnitude and a first frequency. A first pulsing circuit applies a duty cycle to the first RF source. A tuning circuit receives an output of the first pulsing circuit, includes a first variable capacitor, and has an output in communication with the coil to generate plasma in the processing chamber. A controller includes a data acquisition module to generate feedback. A feedback control module controls at least one of the first frequency and the first variable capacitor based on the feedback and a gain value. The controller selects the gain value based on at least one of the first frequency and the duty cycle.

Abstract: A voltage sensor of a substrate processing system including a multi-divider circuit, a clamping circuit and first and second outputs. The multi-divider circuit receives a RF signal indicative of a RF voltage at a substrate. The multi-divider circuit includes dividers of respective channels and outputting first and second reduced voltages based on the received RF signal. The reduced voltages are less than the RF voltage. The clamping circuit clamps the first reduced voltage to a first predetermined voltage when the RF voltage is greater than a second predetermined voltage or the first reduced voltage is greater than a third predetermined voltage. While the received RF signal is in first and second voltage ranges, the first and second outputs output output signals based respectively on the first and second reduced voltages. The first predetermined voltage is based on a maximum value of the first voltage range.

Abstract: A match circuit includes the following: a power input circuit coupled to an RF source; an inner coil input circuit coupled between the power input circuit and an input terminal of an inner coil, the inner coil input circuit including an inductor and a capacitor coupled in series to the inductor, the inductor connecting to the power input circuit, and the capacitor connecting to the input terminal of the inner coil, a first node being defined between the power input circuit and the inner coil input circuit; an inner coil output circuit coupled between an output terminal of the inner coil and ground, the inner coil output circuit defining a direct pass-through connection to ground; an outer coil input circuit coupled between the first node and an input terminal of an outer coil; and an outer coil output circuit coupled between an output terminal of the outer coil and ground.

Abstract: A plasma processing chamber and methods for operating the chamber are provided. An exemplary chamber includes an electrostatic chuck for receiving a substrate and a dielectric window connected to a top portion of the chamber. An inner side of dielectric window faces a plasma processing region that is above the electrostatic chuck and an outer side of the dielectric window is exterior to the plasma processing region. Inner and outer coils are disposed above the outer side of the dielectric window, and the inner and outer coils are connected to a first RF power source. A powered grid is disposed between the outer side of dielectric window and the inner and outer coils. The powered grid is connected to a second RF power source that is independent from the first RF power source.

Abstract: A cathode assembly for use in a plasma processing chamber is provided. A metal bowl that is grounded is provided. An insulator of a sealed porous or sealed honeycomb dielectric ceramic with an equivalent dielectric constant k<7 is on top of the metal bowl. An electrostatic chuck (ESC) is on top of the insulator, wherein the insulator electrically insulates the metal bowl from the ESC.

Abstract: A plasma processing chamber and methods for operating the chamber are provided. An exemplary chamber includes an electrostatic chuck for receiving a substrate and a dielectric window connected to a top portion of the chamber. An inner side of dielectric window faces a plasma processing region that is above the electrostatic chuck and an outer side of the dielectric window is exterior to the plasma processing region. Inner and outer coils are disposed above the outer side of the dielectric window, and the inner and outer coils are connected to a first RF power source. A powered grid is disposed between the outer side of dielectric window and the inner and outer coils. The powered grid is connected to a second RF power source that is independent from the first RF power source.