Patents by Inventor Marc Alan Mangrum

Marc Alan Mangrum has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230369182
    Abstract: Methods and system for flip chip alignment for substrate and leadframe applications are disclosed and may include placing a semiconductor die on bond fingers of a metal leadframe, wherein at least two of the bond fingers comprise one or more recessed self-alignment features. A reflow process may be performed on the semiconductor die and leadframe, thereby melting solder bumps on the semiconductor die such that a solder bump may be pulled into each of the recessed self-alignment features and aligning the solder bumps on the semiconductor die to the bond fingers. The recessed self-alignment features may be formed utilizing a chemical etch process or a stamping process. A surface of the recessed self-alignment features or the bond fingers of the metal leadframe may be roughened. A solder paste may be formed in the recessed self-alignment features prior to placing the semiconductor die on the bond fingers of the metal leadframe.
    Type: Application
    Filed: May 22, 2023
    Publication date: November 16, 2023
    Inventor: Marc Alan Mangrum
  • Publication number: 20230335883
    Abstract: A method for forming packaged electronic device structure includes providing a conductive leadframe. The leadframe can include a die pad and a plurality of conductive leads. The method can include coupling an electronic device to the plurality of conductive leads. The method can include providing an antenna structure, which can include a conductive pillar structure and an elongated conductive beam structure. The method can include providing a package body encapsulating the electronic device, at least portions of each conductive lead, and at least portions of the die pad. In an example, the conductive pillar structure can extend from the first package body surface to the second package body surface, the elongated conductive beam structure can be disposed adjoining the first package body surface and can be electrically connected to the conductive pillar structure, and a portion of the elongated conductive beam structure can be exposed outside of the package body.
    Type: Application
    Filed: April 28, 2023
    Publication date: October 19, 2023
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Marc Alan MANGRUM, Hyung Jun CHO, Byong Jin KIM, Gi Jeong KIM, Jae Min BAE, Seung Mo KIM, Young Ju LEE
  • Patent number: 11677135
    Abstract: A method for forming packaged electronic device structure includes providing a conductive leadframe. The leadframe can include a die pad with a first major surface and a second major surface opposite to the first major surface, and a plurality of conductive leads. The method can include coupling an electronic device to the plurality of conductive leads. The method can include providing an antenna structure, which can include a conductive pillar structure and an elongated conductive beam structure. The method can include providing a package body encapsulating the electronic device, at least portions of each conductive lead, and at least portions of the die pad.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: June 13, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Marc Alan Mangrum, Hyung Jun Cho, Byong Jin Kim, Gi Jeong Kim, Jae Min Bae, Seung Mo Kim, Young Ju Lee
  • Patent number: 11658099
    Abstract: Methods and system for flip chip alignment for substrate and leadframe applications are disclosed and may include placing a semiconductor die on bond fingers of a metal leadframe, wherein at least two of the bond fingers comprise one or more recessed self-alignment features. A reflow process may be performed on the semiconductor die and leadframe, thereby melting solder bumps on the semiconductor die such that a solder bump may be pulled into each of the recessed self-alignment features and aligning the solder bumps on the semiconductor die to the bond fingers. The recessed self-alignment features may be formed utilizing a chemical etch process or a stamping process. A surface of the recessed self-alignment features or the bond fingers of the metal leadframe may be roughened. A solder paste may be formed in the recessed self-alignment features prior to placing the semiconductor die on the bond fingers of the metal leadframe.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: May 23, 2023
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventor: Marc Alan Mangrum
  • Publication number: 20210265247
    Abstract: Methods and system for flip chip alignment for substrate and leadframe applications are disclosed and may include placing a semiconductor die on bond fingers of a metal leadframe, wherein at least two of the bond fingers comprise one or more recessed self-alignment features. A reflow process may be performed on the semiconductor die and leadframe, thereby melting solder bumps on the semiconductor die such that a solder bump may be pulled into each of the recessed self-alignment features and aligning the solder bumps on the semiconductor die to the bond fingers. The recessed self-alignment features may be formed utilizing a chemical etch process or a stamping process. A surface of the recessed self-alignment features or the bond fingers of the metal leadframe may be roughened. A solder paste may be formed in the recessed self-alignment features prior to placing the semiconductor die on the bond fingers of the metal leadframe.
    Type: Application
    Filed: December 7, 2020
    Publication date: August 26, 2021
    Inventor: Marc Alan Mangrum
  • Publication number: 20210151854
    Abstract: A method for forming packaged electronic device structure includes providing a conductive leadframe. The leadframe can include a die pad with a first major surface and a second major surface opposite to the first major surface, and a plurality of conductive leads. The method can include coupling an electronic device to the plurality of conductive leads. The method can include providing an antenna structure, which can include a conductive pillar structure and an elongated conductive beam structure. The method can include providing a package body encapsulating the electronic device, at least portions of each conductive lead, and at least portions of the die pad.
    Type: Application
    Filed: January 27, 2021
    Publication date: May 20, 2021
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Marc Alan MANGRUM, Hyung Jun CHO, Byong Jin KIM, Gi Jeong KIM, Jae Min BAE, Seung Mo KIM, Young Ju LEE
  • Patent number: 10923800
    Abstract: A packaged electronic device includes an integrated antenna as part of a conductive leadframe. The conductive leadframe includes a die paddle have an elongated conductive beam structure configured as a transmission line, and a ground plane structure disposed surrounding the die paddle. The ground plane includes a gap where the transmission line extends to an edge of the packaged electronic device. In one embodiment, selected leads within the leadframe are configured with conductive connective structures as ground pins, source pins, and/or wave guides. In an alternate embodiment, a portion of the integrated antenna is embedded and partially exposed within the body of the packaged electronic device.
    Type: Grant
    Filed: January 12, 2020
    Date of Patent: February 16, 2021
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventor: Marc Alan Mangrum
  • Patent number: 10861776
    Abstract: Methods and system for flip chip alignment for substrate and leadframe applications are disclosed and may include placing a semiconductor die on bond fingers of a metal leadframe, wherein at least two of the bond fingers comprise one or more recessed self-alignment features. A reflow process may be performed on the semiconductor die and leadframe, thereby melting solder bumps on the semiconductor die such that a solder bump may be pulled into each of the recessed self-alignment features and aligning the solder bumps on the semiconductor die to the bond fingers. The recessed self-alignment features may be formed utilizing a chemical etch process or a stamping process. A surface of the recessed self-alignment features or the bond fingers of the metal leadframe may be roughened. A solder paste may be formed in the recessed self-alignment features prior to placing the semiconductor die on the bond fingers of the metal leadframe.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: December 8, 2020
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventor: Marc Alan Mangrum
  • Patent number: 10861798
    Abstract: Methods for an embedded vibration management system are disclosed and may include fabricating a semiconductor package that supports vibration management by forming an array of vibration absorbing structures, placing the array proximate to a leadframe comprising two-legged supported leads, placing a semiconductor device above the leadframe, and encapsulating the semiconductor device and the leadframe. Each vibration absorbing structure may comprise a mass element formed on a material with lower density than that of the mass element. The array may be placed on a top, a bottom, or both surfaces of the leadframe. Sections of the array may be placed symmetrically with respect to the semiconductor device. The vibration absorbing structures may be cubic in shape and may be enclosed in an encapsulating material. The two-legged supported leads may be formed by bending metal strips with holes. The vibration absorbing structures may be exposed to the exterior of the semiconductor package.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: December 8, 2020
    Assignee: Amkor Technology, Inc.
    Inventors: Bora Baloglu, Adrian Arcedera, Marc Alan Mangrum, Russell Shumway
  • Publication number: 20200153082
    Abstract: A packaged electronic device includes an integrated antenna as part of a conductive leadframe. The conductive leadframe includes a die paddle have an elongated conductive beam structure configured as a transmission line, and a ground plane structure disposed surrounding the die paddle. The ground plane includes a gap where the transmission line extends to an edge of the packaged electronic device. In one embodiment, selected leads within the leadframe are configured with conductive connective structures as ground pins, source pins, and/or wave guides. In an alternate embodiment, a portion of the integrated antenna is embedded and partially exposed within the body of the packaged electronic device.
    Type: Application
    Filed: January 12, 2020
    Publication date: May 14, 2020
    Applicant: Amkor Technology, Inc.
    Inventor: Marc Alan MANGRUM
  • Patent number: 10566680
    Abstract: A packaged electronic device includes an integrated antenna as part of a conductive leadframe. The conductive leadframe includes a die paddle have an elongated conductive beam structure configured as a transmission line, and a ground plane structure disposed surrounding the die paddle. The ground plane includes a gap where the transmission line extends to an edge of the packaged electronic device. In one embodiment, selected leads within the leadframe are configured with conductive connective structures as ground pins, source pins, and/or wave guides. In an alternate embodiment, a portion of the integrated antenna is embedded and partially exposed within the body of the packaged electronic device.
    Type: Grant
    Filed: March 3, 2018
    Date of Patent: February 18, 2020
    Assignee: Amkor Technology, Inc.
    Inventor: Marc Alan Mangrum
  • Patent number: 10490487
    Abstract: An electronic device structure includes a leadframe with a die pad and a lead. A semiconductor die is mounted adjacent to the die pad. A clip having a clip tail section is attached to the lead. The clip further has a clip top section attached to the clip tail section, and the clip top section is attached to a die top side of the semiconductor die with a conductive material. The clip further has an opening disposed to extend through the clip top section. In one embodiment, after a reflow step the conductive material forms a conductive fillet at least partially covering sidewall surfaces of the opening, and has a height within the opening with respect to a bottom surface of the clip top section. The opening and the conductive fillet provide an improved approach to monitoring coverage of the conductive material between the clip top section and the die top side of the semiconductor die.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: November 26, 2019
    Assignee: Amkor Technology, Inc.
    Inventor: Marc Alan Mangrum
  • Publication number: 20190122964
    Abstract: An electronic device structure includes a leadframe with a die pad and a lead. A semiconductor die is mounted adjacent to the die pad. A clip having a clip tail section is attached to the lead. The clip further has a clip top section attached to the clip tail section, and the clip top section is attached to a die top side of the semiconductor die with a conductive material. The clip further has an opening disposed to extend through the clip top section. In one embodiment, after a reflow step the conductive material forms a conductive fillet at least partially covering sidewall surfaces of the opening, and has a height within the opening with respect to a bottom surface of the clip top section. The opening and the conductive fillet provide an improved approach to monitoring coverage of the conductive material between the clip top section and the die top side of the semiconductor die.
    Type: Application
    Filed: December 21, 2018
    Publication date: April 25, 2019
    Applicant: Amkor Technology, Inc.
    Inventor: Marc Alan Mangrum
  • Patent number: 10211128
    Abstract: An electronic device structure includes a leadframe with a die pad and a lead. A semiconductor die is mounted adjacent to the die pad. A clip having a clip tail section is attached to the lead. The clip further has a clip top section attached to the clip tail section, and the clip top section is attached to a die top side of the semiconductor die with a conductive material. The clip further has an opening disposed to extend through the clip top section. In one embodiment, after a reflow step the conductive material forms a conductive fillet at least partially covering sidewall surfaces of the opening, and has a height within the opening with respect to a bottom surface of the clip top section. The opening and the conductive fillet provide an improved approach to monitoring coverage of the conductive material between the clip top section and the die top side of the semiconductor die.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: February 19, 2019
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventor: Marc Alan Mangrum
  • Publication number: 20190043789
    Abstract: Methods and system for flip chip alignment for substrate and leadframe applications are disclosed and may include placing a semiconductor die on bond fingers of a metal leadframe, wherein at least two of the bond fingers comprise one or more recessed self-alignment features. A reflow process may be performed on the semiconductor die and leadframe, thereby melting solder bumps on the semiconductor die such that a solder bump may be pulled into each of the recessed self-alignment features and aligning the solder bumps on the semiconductor die to the bond fingers. The recessed self-alignment features may be formed utilizing a chemical etch process or a stamping process. A surface of the recessed self-alignment features or the bond fingers of the metal leadframe may be roughened. A solder paste may be formed in the recessed self-alignment features prior to placing the semiconductor die on the bond fingers of the metal leadframe.
    Type: Application
    Filed: July 23, 2018
    Publication date: February 7, 2019
    Inventor: Marc Alan Mangrum
  • Publication number: 20180374800
    Abstract: Methods for an embedded vibration management system are disclosed and may include fabricating a semiconductor package that supports vibration management by forming an array of vibration absorbing structures, placing the array proximate to a leadframe comprising two-legged supported leads, placing a semiconductor device above the leadframe, and encapsulating the semiconductor device and the leadframe. Each vibration absorbing structure may comprise a mass element formed on a material with lower density than that of the mass element. The array may be placed on a top, a bottom, or both surfaces of the leadframe. Sections of the array may be placed symmetrically with respect to the semiconductor device. The vibration absorbing structures may be cubic in shape and may be enclosed in an encapsulating material. The two-legged supported leads may be formed by bending metal strips with holes. The vibration absorbing structures may be exposed to the exterior of the semiconductor package.
    Type: Application
    Filed: July 24, 2018
    Publication date: December 27, 2018
    Inventors: Bora Baloglu, Adrian Arcedera, Marc Alan Mangrum, Russell Shumway
  • Publication number: 20180350726
    Abstract: An electronic device structure includes a leadframe with a die pad and a lead. A semiconductor die is mounted adjacent to the die pad. A clip having a clip tail section is attached to the lead. The clip further has a clip top section attached to the clip tail section, and the clip top section is attached to a die top side of the semiconductor die with a conductive material. The clip further has an opening disposed to extend through the clip top section. In one embodiment, after a reflow step the conductive material forms a conductive fillet at least partially covering sidewall surfaces of the opening, and has a height within the opening with respect to a bottom surface of the clip top section. The opening and the conductive fillet provide an improved approach to monitoring coverage of the conductive material between the clip top section and the die top side of the semiconductor die.
    Type: Application
    Filed: June 6, 2017
    Publication date: December 6, 2018
    Applicant: Amkor Technology, Inc.
    Inventor: Marc Alan Mangrum
  • Patent number: 10032699
    Abstract: Methods and system for flip chip alignment for substrate and leadframe applications are disclosed and may include placing a semiconductor die on bond fingers of a metal leadframe, wherein at least two of the bond fingers comprise one or more recessed self-alignment features. A reflow process may be performed on the semiconductor die and leadframe, thereby melting solder bumps on the semiconductor die such that a solder bump may be pulled into each of the recessed self-alignment features and aligning the solder bumps on the semiconductor die to the bond fingers. The recessed self-alignment features may be formed utilizing a chemical etch process or a stamping process. A surface of the recessed self-alignment features or the bond fingers of the metal leadframe may be roughened. A solder paste may be formed in the recessed self-alignment features prior to placing the semiconductor die on the bond fingers of the metal leadframe.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: July 24, 2018
    Assignee: Amkor Technology, Inc.
    Inventor: Marc Alan Mangrum
  • Patent number: 10032726
    Abstract: Methods for an embedded vibration management system are disclosed and may include fabricating a semiconductor package that supports vibration management by forming an array of vibration absorbing structures, placing the array proximate to a leadframe comprising two-legged supported leads, placing a semiconductor device above the leadframe, and encapsulating the semiconductor device and the leadframe. Each vibration absorbing structure may comprise a mass element formed on a material with lower density than that of the mass element. The array may be placed on a top, a bottom, or both surfaces of the leadframe. Sections of the array may be placed symmetrically with respect to the semiconductor device. The vibration absorbing structures may be cubic in shape and may be enclosed in an encapsulating material. The two-legged supported leads may be formed by bending metal strips with holes. The vibration absorbing structures may be exposed to the exterior of the semiconductor package.
    Type: Grant
    Filed: November 1, 2013
    Date of Patent: July 24, 2018
    Assignee: Amkor Technology, Inc.
    Inventors: Bora Baloglu, Adrian Arcedera, Marc Alan Mangrum, Russell Shumway
  • Publication number: 20180191055
    Abstract: A packaged electronic device includes an integrated antenna as part of a conductive leadframe. The conductive leadframe includes a die paddle have an elongated conductive beam structure configured as a transmission line, and a ground plane structure disposed surrounding the die paddle. The ground plane includes a gap where the transmission line extends to an edge of the packaged electronic device. In one embodiment, selected leads within the leadframe are configured with conductive connective structures as ground pins, source pins, and/or wave guides. In an alternate embodiment, a portion of the integrated antenna is embedded and partially exposed within the body of the packaged electronic device.
    Type: Application
    Filed: March 3, 2018
    Publication date: July 5, 2018
    Applicant: Amkor Technology, Inc.
    Inventor: Marc Alan MANGRUM