Patents by Inventor Marc E. Robinson

Marc E. Robinson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9824999
    Abstract: A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a coating of a conformal between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on a die attach area of a surface of the die, or on a die mount region of a surface of the support, or on both a die attach area of a surface of the die and on a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: November 21, 2017
    Assignee: Invensas Corporation
    Inventors: Scott Jay Crane, Simon J. S. McElrea, Scott McGrath, Weiping Pan, De Ann Eileen Melcher, Marc E. Robinson
  • Publication number: 20160218088
    Abstract: Stacked die assemblies are electrically connected to connection sites on any support, without electrical connection to any interposed substrate or leadframe, and without solder.
    Type: Application
    Filed: March 31, 2016
    Publication date: July 28, 2016
    Inventors: Simon J. S. McElrea, Marc E. Robinson, Lawrence Douglas Andrews, JR.
  • Publication number: 20160104689
    Abstract: A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a coating of a conformal between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on a die attach area of a surface of the die, or on a die mount region of a surface of the support, or on both a die attach area of a surface of the die and on a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
    Type: Application
    Filed: December 15, 2015
    Publication date: April 14, 2016
    Inventors: Scott Jay Crane, Simon J. S. McElrea, Scott McGrath, Weiping Pan, De Ann Eileen Melcher, Marc E. Robinson
  • Patent number: 9305862
    Abstract: Stacked die assemblies are electrically connected to connection sites on any support, without electrical connection to any interposed substrate or leadframe, and without solder.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: April 5, 2016
    Assignee: Invensas Corporation
    Inventors: Simon J. S. McElrea, Marc E. Robinson, Lawrence Douglas Andrews, Jr.
  • Patent number: 9252116
    Abstract: A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a coating of a conformal between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on a die attach area of a surface of the die, or on a die mount region of a surface of the support, or on both a die attach area of a surface of the die and on a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: February 2, 2016
    Assignee: Invensas Corporation
    Inventors: Scott Jay Crane, Simon J. S. McElrea, Scott McGrath, Weiping Pan, De Ann Eileen Melcher, Marc E. Robinson
  • Publication number: 20140213020
    Abstract: A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a coating of a conformal between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on a die attach area of a surface of the die, or on a die mount region of a surface of the support, or on both a die attach area of a surface of the die and on a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
    Type: Application
    Filed: April 1, 2014
    Publication date: July 31, 2014
    Applicant: Invensas Corporation
    Inventors: Scott Jay Crane, Simon J. S. McElrea, Scott McGrath, Weiping Pan, De Ann Eileen Melcher, Marc E. Robinson
  • Patent number: 8729690
    Abstract: Metal rerouting interconnects at one or more sides of a die or multiple die segments can form edge bonding pads for electrical connection. Insulation can be applied to surfaces of the die or multiple die segments after optional thinning and singulation, and openings can be made in the insulation to the electrical connection pads. After being placed atop one another in a stack, vertically adjacent die or die segments can be electrically interconnected using a flexible bond wire or bond ribbon attached to an electrical connection pad exposed within such opening, the bond wire or ribbon protruding horizontally, and an electrically conductive polymer, or epoxy, filaments or lines can be applied to the stack.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: May 20, 2014
    Assignee: Invensas Corporation
    Inventors: Al Vindasius, Marc E. Robinson, Larry Jacobsen, Donald Almen
  • Patent number: 8723332
    Abstract: In die stack assembly configurations successive die in the stack are offset at a die edge at which die pads are situated, and the die are interconnected by electrically conductive traces. In some embodiments the electrically conductive traces are formed of an electrically conductive polymer. An electrically insulative conformal coating is provided having openings at die pads that are electrically connected.
    Type: Grant
    Filed: May 20, 2008
    Date of Patent: May 13, 2014
    Assignee: Invensas Corporation
    Inventors: Simon J. S. McElrea, Lawrence Douglas Andrews, Jr., Scott McGrath, Terrence Caskey, Scott Jay Crane, Marc E. Robinson, Loreto Cantillep
  • Patent number: 8704379
    Abstract: A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a conformal coating between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on either or both a die attach area of a surface of the die, or a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: April 22, 2014
    Assignee: Invensas Corporation
    Inventors: Scott Jay Crane, Simon J. S. McElrea, Scott McGrath, Weiping Pan, DeAnn Eileen Melcher, Marc E. Robinson
  • Patent number: 8629543
    Abstract: In die stack assembly configurations successive die in the stack are offset at a die edge at which die pads are situated, and the die are interconnected by electrically conductive traces. In some embodiments the electrically conductive traces are formed of an electrically conductive polymer. An electrically insulative conformal coating is provided having openings at die pads that are electrically connected.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: January 14, 2014
    Assignee: Invensas Corporation
    Inventors: Simon J. S. McElrea, Lawrence Douglas Andrews, Jr., Scott McGrath, Terrence Caskey, Scott Jay Crane, Marc E. Robinson, Loreto Cantillep
  • Publication number: 20130099392
    Abstract: Stacked die assemblies are electrically connected to connection sites on any support, without electrical connection to any interposed substrate or leadframe, and without solder.
    Type: Application
    Filed: April 25, 2012
    Publication date: April 25, 2013
    Applicant: VERTICAL CIRCUITS, INC.
    Inventors: Simon J. S. McElrea, Marc E. Robinson, Lawrence Douglas Andrews, JR.
  • Patent number: 8357999
    Abstract: The present invention provides an apparatus for vertically interconnecting semiconductor die, integrated circuit die, or multiple die segments. Metal rerouting interconnects which extend to one or more sides of the die or segment can be optionally added to the die or multi die segment to provide edge bonding pads upon the surface of the die for external electrical connection points. After the metal rerouting interconnect has been added to the die on the wafer, the wafer is optionally thinned and each die or multiple die segment is singulated from the wafer by cutting or other appropriate singulation method. After the die or multiple die segments are singulated or cut from the wafer, insulation is applied to all surfaces of the die or multiple die segments, openings are made in the insulation above the desired electrical connection pads, and the die or multiple die segments are placed on top of one another to form a stack.
    Type: Grant
    Filed: May 3, 2007
    Date of Patent: January 22, 2013
    Assignee: Vertical Circuits (Assignment for the Benefit of Creditors), LLC
    Inventors: Marc E. Robinson, Alfons Vindasius, Donald Almen, Larry Jacobsen
  • Patent number: 8178978
    Abstract: Stacked die assemblies are electrically connected to connection sites on any support, without electrical connection to any interposed substrate or leadframe, and without solder.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: May 15, 2012
    Assignee: Vertical Circuits, Inc.
    Inventors: Simon J. S. McElrea, Marc E. Robinson, Lawrence Douglas Andrews, Jr.
  • Publication number: 20110037159
    Abstract: In die stack assembly configurations successive die in the stack are offset at a die edge at which die pads are situated, and the die are interconnected by electrically conductive traces. In some embodiments the electrically conductive traces are formed of an electrically conductive polymer. An electrically insulative conformal coating is provided having openings at die pads that are electrically connected.
    Type: Application
    Filed: October 27, 2010
    Publication date: February 17, 2011
    Applicant: Vertical Circuits, Inc.
    Inventors: Simon J. S. McElrea, Lawrence Douglas Andrews, JR., Scott McGrath, Terrence Caskey, Scott Jay Crane, Marc E. Robinson, Loreto Cantillep
  • Publication number: 20100117224
    Abstract: A sensor die in a sensor device includes a conformal dielectric coating over at least a die sidewall adjacent an interconnect edge and, in some devices, a conformal dielectric coating over at least part of the active area of the front side of the die. The sensor die can be connected to circuitry in a support by an electrically conductive material that is applicable in a flowable form, such as a curable electrically conductive polymer, which is applied onto or adjacent the dielectric coating on the die sidewall, and which is cured to complete connection between interconnect pads on the die and exposed sites on the support circuitry. In some devices, a coating over the active area of the sensor die provides mechanical and chemical protection for underlying structures in and on the die. In an image sensor device, for example, the coating over the image sensor array on the die is substantially optically transparent.
    Type: Application
    Filed: December 15, 2009
    Publication date: May 13, 2010
    Applicant: Vertical Circuits, Inc.
    Inventors: Simon J. S. McElrea, Marc E. Robinson
  • Publication number: 20100052087
    Abstract: An image sensor die includes a conformal dielectric coating over at least a die sidewall adjacent an interconnect edge and, in some embodiments, a conformal dielectric coating over the image array area of the front side of the die. The die can be connected to circuitry in a support by an electrically conductive material that is applicable in a flowable form, such as a curable electrically conductive polymer, which is applied onto or adjacent the dielectric coating on the die sidewall, and which is cured to complete connection between interconnect pads on the die and exposed sites on the support circuitry. The coating over the image array area, at least, is substantially transparent to visible light, and provides mechanical and chemical protection for underlying structures in and on the image sensor.
    Type: Application
    Filed: August 28, 2009
    Publication date: March 4, 2010
    Applicant: Vertical Circuits, Inc.
    Inventors: Simon J. S. McElrea, Marc E. Robinson
  • Publication number: 20090230528
    Abstract: Stacked die assemblies are electrically connected to connection sites on any support, without electrical connection to any interposed substrate or leadframe, and without solder.
    Type: Application
    Filed: March 12, 2009
    Publication date: September 17, 2009
    Applicant: VERTICAL CIRCUITS, INC.
    Inventors: Simon J. S. McElrea, Marc E. Robinson, Lawrence Douglas Andrews, JR.
  • Patent number: 7535109
    Abstract: The present invention provides an apparatus for vertically interconnecting semiconductor die, integrated circuit die, or multiple die segments. Metal rerouting interconnects which extend to one or more sides of the die or segment can be optionally added to the die or multi die segment to provide edge bonding pads upon the surface of the die for external electrical connection points. After the metal rerouting interconnect has been added to the die on the wafer, the wafer is optionally thinned and each die or multiple die segment is singulated from the wafer by cutting or other appropriate singulation method. After the die or multiple die segments are singulated or cut from the wafer, insulation is applied to all surfaces of the die or multiple die segments, openings are made in the insulation above the desired electrical connection pads, and the die or multiple die segments are placed on top of one another to form a stack.
    Type: Grant
    Filed: May 3, 2007
    Date of Patent: May 19, 2009
    Assignee: Vertical Circuits, Inc.
    Inventors: Marc E. Robinson, Alfons Vindasius, Donald Almen, Larry Jacobsen
  • Publication number: 20090102038
    Abstract: A die prepared for stacking in a chip scale stacked die assembly, having interconnect sites in an area inward from a die edge and interconnect pads near at least one die edge. Second-level interconnection of the stacked die assembly can be made by way of connections between a first die in the assembly and circuitry on a support; and interconnection between die in the stack can be made by way of connection of z-interconnects with bonds pads in the die attach side of the support near or at one or more die edges. Methods for preparing the die include processes carried out to an advanced stage at the wafer level or at the die array level.
    Type: Application
    Filed: October 15, 2008
    Publication date: April 23, 2009
    Applicant: VERTICAL CIRCUITS, INC.
    Inventors: SIMON J.S. MCELREA, Marc E. Robinson, Lawrence Douglas Andrews, JR., Terrence Caskey, Scott McGrath, Yong Du, Al Vindasius
  • Publication number: 20090065916
    Abstract: A conformal coating on a semiconductor die provides adhesion between the die and a support. No additional adhesive is necessary to affix the die on the support. The conformal coating protects the die during assembly, and serves to electrically insulate the die from electrically conductive parts that the die may contact. The conformal coating may be an organic polymer, such as a parylene, for example. Also, a method for adhering a die onto a support, which may optionally be another die, includes providing a coating of a conformal between the die and the support, and heating the coating between the die and the support. The conformal coating may be provided on a die attach area of a surface of the die, or on a die mount region of a surface of the support, or on both a die attach area of a surface of the die and on a die mount region of a surface of the support; and the conformal coating may be provided following placement of the die on the support.
    Type: Application
    Filed: August 27, 2008
    Publication date: March 12, 2009
    Applicant: VERTICAL CIRCUITS, INC.
    Inventors: Scott Jay Crane, Simon J.S. McElrea, Scott McGrath, Weiping Pan, De Ann Melcher, Marc E. Robinson