Patents by Inventor Marc Sulfridge

Marc Sulfridge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160300871
    Abstract: An imaging system may include an image sensor that may be a backside illuminated (BSI) image sensor. The BSI sensor may be bonded to an inactive silicon substrate or bonded to an active silicon substrate like a digital signal processor (DSP). Through-oxide vias (TOVs) may be formed in the image sensor die. A bond pad region may be formed on a light shielding layer to facilitate coupling the light shield to a ground source or other power sources. Color filter housing structures may be formed over active image sensor pixels on the image sensor die. In-pixel grid structures may be integrated with the color filter housing structures to help reduce crosstalk. The light shielding layer may also be formed over reference image sensor pixels on the image sensor die. The TOVs, the in-pixel grid structures, and the light shielding structures may be formed simultaneously.
    Type: Application
    Filed: April 8, 2015
    Publication date: October 13, 2016
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal BORTHAKUR, Marc SULFRIDGE
  • Publication number: 20160233267
    Abstract: Methods for forming backside illuminated (BSI) image sensors having metal redistribution layers (RDL) and solder bumps for high performance connection to external circuitry are provided. In one embodiment, a BSI image sensor with RDL and solder bumps may be formed using a temporary carrier during manufacture that is removed prior to completion of the BSI image sensor. In another embodiment, a BSI image sensor with RDL and solder bumps may be formed using a permanent carrier during manufacture that partially remains in the completed BSI image sensor. A BSI image sensor may be formed before formation of a redistribution layer on the front side of the BSI image sensor. A redistribution layer may, alternatively, be formed on the front side of an image wafer before formation of BSI components such as microlenses and color filters on the back side of the image wafer.
    Type: Application
    Filed: April 19, 2016
    Publication date: August 11, 2016
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal BORTHAKUR, Kevin W. HUTTO, Andrew PERKINS, Marc SULFRIDGE
  • Patent number: 9362330
    Abstract: Methods for forming backside illuminated (BSI) image sensors having metal redistribution layers (RDL) and solder bumps for high performance connection to external circuitry are provided. In one embodiment, a BSI image sensor with RDL and solder bumps may be formed using a temporary carrier during manufacture that is removed prior to completion of the BSI image sensor. In another embodiment, a BSI image sensor with RDL and solder bumps may be formed using a permanent carrier during manufacture that partially remains in the completed BSI image sensor. A BSI image sensor may be formed before formation of a redistribution layer on the front side of the BSI image sensor. A redistribution layer may, alternatively, be formed on the front side of an image wafer before formation of BSI components such as microlenses and color filters on the back side of the image wafer.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: June 7, 2016
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal Borthakur, Kevin W. Hutto, Andrew Perkins, Marc Sulfridge
  • Patent number: 9349767
    Abstract: An imaging system may include an image sensor die stacked on top of a digital signal processor (DSP) die. The image sensor die may be a backside illuminated image sensor die. Through-oxide vias (TOVs) may be formed in the image sensor die and may extend at least partially into in the DSP die to facilitate communications between the image sensor die and the DSP die. Color filter housing structures may be formed over active image sensor pixels on the image sensor die. In-pixel grid structures may be integrated with the color filter housing structures to help reduce crosstalk. Light shielding structures may be formed over reference image sensor pixels on the image sensor die. The TOVs, the in-pixel grid structures, and the light shielding structures may be formed simultaneously. The formation of the color filter housing structures may also be integrated the formation of the TOVs.
    Type: Grant
    Filed: April 16, 2014
    Date of Patent: May 24, 2016
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal Borthakur, Marc Sulfridge, Mitchell J. Mooney
  • Patent number: 9338350
    Abstract: An imaging system may include one or more optical filters that include metallic nanoparticles in a matrix. The metallic nanoparticle optical filters may form a color filter array for an imager in the imaging system. Different metallic nanoparticle optical filters may be formed for each desired color. Properties of the metallic nanoparticles and matrices may be varied to achieve the desired optical filtering properties and pass the desired wavelength bands to the imager. As examples, the type of metal, the size of the nanoparticles, the shape of the nanoparticles, and the type of matrix in which the nanoparticles are formed may all influence the optical properties of the resulting metallic nanoparticle optical film.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: May 10, 2016
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal Borthakur, Brian Vaartstra, Marc Sulfridge
  • Patent number: 9324755
    Abstract: An imaging system may include an image sensor die stacked on top of a digital signal processor (DSP) die. The image sensor die may be a backside illuminated image sensor die. Through-oxide vias (TOVs) may be formed in the image sensor die and may extend at least partially into in the DSP die to facilitate communications between the image sensor die and the DSP die. Bond pad structures may be formed on the surface of the image sensor die and may be coupled to off-chip circuitry via bonding wires soldered to the bad pad structures. Color filter elements may be formed over active image sensor pixels on the image sensor die. Microlens structures may be formed over the color filter elements. An antireflective coating (ARC) liner may be simultaneously formed over the microlens structures and over the bond pad structures to passivate the bond pad structures.
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: April 26, 2016
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal Borthakur, Marc Sulfridge, Mitchell J. Mooney
  • Publication number: 20160111463
    Abstract: An imaging system may include an image sensor die stacked on top of a digital signal processor (DSP) die. Through-oxide vias (TOVs) may be formed in the image sensor die and may extend at least partially into in the DSP die to facilitate communications between the image sensor die and the DSP die. The image sensor die may include light shielding structures for preventing reference photodiodes in the image sensor die from receiving light and in-pixel grid structures for preventing cross-talk between adjacent pixels. The light shielding structure may receive a desired biasing voltage through a corresponding TOV, an integral plug structure, and/or a connection that makes contact directly with a polysilicon gate. The in-pixel grid may have a peripheral contact that receives the desired biasing voltage through a light shield, a conductive strap, a TOV, and/or an aluminum pad.
    Type: Application
    Filed: October 20, 2014
    Publication date: April 21, 2016
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal Borthakur, Marc Sulfridge
  • Patent number: 9293367
    Abstract: Conductive interconnect structures and formation methods using supercritical fluids are disclosed. A method in accordance with one embodiment of the invention includes forming a via in a substrate, with the via having a width and a length generally transverse to the width, and with a length being approximately 100 microns or more. The method can further include disposing a conductive material in the via while the via is exposed to a supercritical fluid. For example, copper can be disposed in the via by introducing a copper-containing precursor into the supercritical fluid and precipitating the copper from the supercritical fluid. Interconnect structures can be formed using this technique in a single generally continuous process, and can produce conductive structures having a generally uniform grain structure across the width of the via.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: March 22, 2016
    Assignee: Micron Technology, Inc.
    Inventor: Marc Sulfridge
  • Patent number: 9293495
    Abstract: An image sensor wafer may be stacked on top of a digital signal processor (DSP) wafer. The image sensor wafer may include multiple image sensor dies, whereas the DSP wafer may include multiple DSP dies. The stacked wafers may be cut along scribe line regions to dice the wafers into individual components. Each image sensor die may include through-oxide vias (TOVs) that extend at least partially into a corresponding DSP die. Scribe line support structures may be formed surrounding the scribe line regions. The scribe line support structures and the TOVs may be formed during the same processing step. The TOVs can also be formed through deep trench isolation structures.
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: March 22, 2016
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal Borthakur, Marc Sulfridge, Mitchell J. Mooney
  • Patent number: 9281241
    Abstract: Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods are disclosed herein. One embodiment, for example, is directed to a method of processing a microelectronic workpiece including a semiconductor substrate having a plurality of microelectronic dies. The method can include forming a first opening in the substrate from a back side of the substrate toward a front side and in alignment with terminals of the dies. The first opening separates an island of substrate material from the substrate. The method can also include depositing an insulating material into at least a portion of the first opening, and then removing the island of substrate material to form a second opening. In several embodiments, the method may include constructing an electrically conductive interconnect in at least a portion of the second opening and in electrical contact with the terminal.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: March 8, 2016
    Assignee: Micron Technology, Inc.
    Inventor: Marc Sulfridge
  • Publication number: 20150350540
    Abstract: An imaging system may include one or more optical filters that include metallic nanoparticles in a matrix. The metallic nanoparticle optical filters may form a color filter array for an imager in the imaging system. Different metallic nanoparticle optical filters may be formed for each desired color. Properties of the metallic nanoparticles and matrices may be varied to achieve the desired optical filtering properties and pass the desired wavelength bands to the imager. As examples, the type of metal, the size of the nanoparticles, the shape of the nanoparticles, and the type of matrix in which the nanoparticles are formed may all influence the optical properties of the resulting metallic nanoparticle optical film.
    Type: Application
    Filed: May 30, 2014
    Publication date: December 3, 2015
    Inventors: Swarnal Borthakur, Brian Vaartstra, Marc Sulfridge
  • Publication number: 20150318322
    Abstract: An image sensor wafer may be stacked on top of a digital signal processor (DSP) wafer. The image sensor wafer may include multiple image sensor dies, whereas the DSP wafer may include multiple DSP dies. The stacked wafers may be cut along scribe line regions to dice the wafers into individual components. Each image sensor die may include through-oxide vias (TOVs) that extend at least partially into a corresponding DSP die. Scribe line support structures may be formed surrounding the scribe line regions. The scribe line support structures and the TOVs may be formed during the same processing step. The TOVs can also be formed through deep trench isolation structures.
    Type: Application
    Filed: May 5, 2014
    Publication date: November 5, 2015
    Inventors: Swarnal Borthakur, Marc Sulfridge, Mitchell J. Mooney
  • Publication number: 20150318323
    Abstract: An imaging system may include an image sensor die stacked on top of a digital signal processor (DSP) die. The image sensor die may be a backside illuminated image sensor die. Through-oxide vias (TOVs) may be formed in the image sensor die and may extend at least partially into in the DSP die to facilitate communications between the image sensor die and the DSP die. Bond pad structures may be formed on the surface of the image sensor die and may be coupled to off-chip circuitry via bonding wires soldered to the bad pad structures. Color filter elements may be formed over active image sensor pixels on the image sensor die. Microlens structures may be formed over the color filter elements. An antireflective coating (ARC) liner may be simultaneously formed over the microlens structures and over the bond pad structures to passivate the bond pad structures.
    Type: Application
    Filed: May 5, 2014
    Publication date: November 5, 2015
    Inventors: Swarnal Borthakur, Marc Sulfridge, Mitchell J. Mooney
  • Publication number: 20150303233
    Abstract: An imaging system may include an image sensor die stacked on top of a digital signal processor (DSP) die. The image sensor die may be a backside illuminated image sensor die. Through-oxide vias (TOVs) may be formed in the image sensor die and may extend at least partially into in the DSP die to facilitate communications between the image sensor die and the DSP die. Color filter housing structures may be formed over active image sensor pixels on the image sensor die. In-pixel grid structures may be integrated with the color filter housing structures to help reduce crosstalk. Light shielding structures may be formed over reference image sensor pixels on the image sensor die. The TOVs, the in-pixel grid structures, and the light shielding structures may be formed simultaneously. The formation of the color filter housing structures may also be integrated the formation of the TOVs.
    Type: Application
    Filed: April 16, 2014
    Publication date: October 22, 2015
    Inventors: Swarnal Borthakur, Marc Sulfridge, Mitchell J. Mooney
  • Publication number: 20150281538
    Abstract: An imaging system may include multiple imaging arrays. One or more of the arrays may be a low-power array that detects trigger events in observed scenes and, in response to the detection of a trigger event, activates one or more primary imaging arrays. One or more of the arrays may be a polarization sensing array, a hyperspectral array, a stacked photodiode array, a wavefront sensing array, a monochrome array, a single color array, a dual color array, or a full color array. In at least one embodiment, image data from a stacked photodiode imaging array may be enhanced using image data from a separate monochrome imaging array. In at least another embodiment, image data from a wavefront sensing array may provide focus detection for a full color array.
    Type: Application
    Filed: March 25, 2014
    Publication date: October 1, 2015
    Inventors: Ulrich Boettiger, Swarnal Borthakur, Marc Sulfridge, Rick Lake
  • Publication number: 20150255502
    Abstract: Several embodiments for semiconductor devices and methods for forming semiconductor devices are disclosed herein. One embodiment is directed to a method for manufacturing a microelectronic imager having a die including an image sensor, an integrated circuit electrically coupled to the image sensor, and electrical connectors electrically coupled to the integrated circuit. The method can comprise covering the electrical connectors with a radiation blocking layer and forming apertures aligned with the electrical connectors through a layer of photo-resist on the radiation blocking layer. The radiation blocking layer is not photoreactive such that it cannot be patterned using radiation. The method further includes etching openings in the radiation blocking layer through the apertures of the photo-resist layer.
    Type: Application
    Filed: May 19, 2015
    Publication date: September 10, 2015
    Inventors: Swarnal Borthakur, Marc Sulfridge
  • Publication number: 20150243699
    Abstract: An imaging system may include an image sensor package with through-oxide via connections between the image sensor die and the digital signal processing die in the image sensor package. The image sensor die and the digital signal processing die may be attached to each other. The through-oxide via may connect a bond pad on the image sensor die with metal routing paths in the image sensor and digital signal processing dies. The through-oxide via may simultaneously couple the image sensor die to the digital signal processing die. The through-oxide via may be formed through a shallow trench isolation structure in the image sensor die. The through-oxide via may be formed through selective etching of the image sensor and digital signal processing dies.
    Type: Application
    Filed: February 27, 2014
    Publication date: August 27, 2015
    Inventors: Swarnal Borthakur, Vladimir Korobov, Marc Sulfridge
  • Patent number: 9064984
    Abstract: Several embodiments for semiconductor devices and methods for forming semiconductor devices are disclosed herein. One embodiment is directed to a method for manufacturing a microelectronic imager having a die including an image sensor, an integrated circuit electrically coupled to the image sensor, and electrical connectors electrically coupled to the integrated circuit. The method can comprise covering the electrical connectors with a radiation blocking layer and forming apertures aligned with the electrical connectors through a layer of photo-resist on the radiation blocking layer. The radiation blocking layer is not photoreactive such that it cannot be patterned using radiation. The method further includes etching openings in the radiation blocking layer through the apertures of the photo-resist layer.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: June 23, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Swarnal Borthakur, Marc Sulfridge
  • Patent number: 9041840
    Abstract: An image sensor unit may have a backside-illuminated imager and an image co-processor stacked together. The image co-processor may be mounted in a cavity in a permanent carrier. The permanent carrier may include fluid channels that allow cooling fluid to flow past the image co-process and past the imager, thereby removing excess heat generated by the image sensor unit during operation.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: May 26, 2015
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Swarnal Borthakur, Scott Churchwell, Ulrich Boettiger, Marc Sulfridge, Andrew Perkins, Rick Lake
  • Patent number: 9024406
    Abstract: An imaging system may include an image sensor package with an image sensor wafer mounted on a carrier wafer, which may be a silicon substrate. A capacitor may be formed in the carrier wafer. Trenches may be etched in a serpentine pattern in the silicon substrate. Conductive plates of the capacitor may be formed at least partially in the trenches. An insulator material may be formed between the capacitor and the silicon substrate. A dielectric layer may be formed between the conductive plates of the capacitor. The image sensor package may be mounted on a printed circuit board via a ball grid array. Conductive vias may electrically couple the capacitor and the image sensor wafer to the printed circuit board.
    Type: Grant
    Filed: September 24, 2013
    Date of Patent: May 5, 2015
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Scott Churchwell, Marc Sulfridge, Swarnal Borthakur