Patents by Inventor Marcel Mitran

Marcel Mitran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9430238
    Abstract: Aspects of the invention relate to executing a run-time-instrumentation EMIT (RIEMIT) instruction. A processor is configured to capture the run-time-instrumentation information of a stream of instructions. The RIEMIT instruction is fetched and executed. It is determined if the current run-time-instrumentation controls are configured to permit capturing and storing of run-time-instrumentation information in a run-time-instrumentation program buffer. If the controls are configured to store run-time-instrumentation instructions, then a RIEMIT instruction specified value is stored as an emit record of a reporting group in the run-time-instrumentation program buffer.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: August 30, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles W. Gainey, Jr., Marcel Mitran, Chung-Lung K. Shum, Kevin A. Stoodley
  • Patent number: 9424035
    Abstract: A Conditional Transaction End (CTEND) instruction is provided that allows a program executing in a nonconstrained transactional execution mode to inspect a storage location that is modified by either another central processing unit or the Input/Output subsystem. Based on the inspected data, transactional execution may be ended or aborted, or the decision to end/abort may be delayed, e.g., until a predefined event occurs. For instance, when the instruction executes, the processor is in a nonconstrained transaction execution mode, and the transaction nesting depth is one at the beginning of the instruction, a second operand of the instruction is inspected, and based on the inspected data, transaction execution may be ended or aborted, or the decision to end/abort may be delayed, e.g., until a predefined event occurs, such as the value of the second operand becomes a prespecified value or a time interval is exceeded.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: August 23, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel
  • Patent number: 9411588
    Abstract: A Conditional Transaction End (CTEND) instruction is provided that allows a program executing in a nonconstrained transactional execution mode to inspect a storage location that is modified by either another central processing unit or the Input/Output subsystem. Based on the inspected data, transactional execution may be ended or aborted, or the decision to end/abort may be delayed, e.g., until a predefined event occurs. For instance, when the instruction executes, the processor is in a nonconstrained transaction execution mode, and the transaction nesting depth is one at the beginning of the instruction, a second operand of the instruction is inspected, and based on the inspected data, transaction execution may be ended or aborted, or the decision to end/abort may be delayed, e.g., until a predefined event occurs, such as the value of the second operand becomes a prespecified value or a time interval is exceeded.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: August 9, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Christian Jacobi, Marcel Mitran, Donald W. Schmidt, Timothy J. Slegel
  • Publication number: 20160210152
    Abstract: Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.
    Type: Application
    Filed: March 29, 2016
    Publication date: July 21, 2016
    Inventors: Steven R. CARLOUGH, Reid T. COPELAND, Charles W. GAINEY, JR., Marcel MITRAN, Eric M. SCHWARZ, Timothy J. SLEGEL
  • Publication number: 20160210151
    Abstract: Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.
    Type: Application
    Filed: March 28, 2016
    Publication date: July 21, 2016
    Inventors: Steven R. CARLOUGH, Reid T. COPELAND, Charles W. GAINEY, JR., Marcel MITRAN, Eric M. SCHWARZ, Timothy J. SLEGEL
  • Publication number: 20160210144
    Abstract: Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.
    Type: Application
    Filed: March 29, 2016
    Publication date: July 21, 2016
    Inventors: Steven R. CARLOUGH, Reid T. COPELAND, Charles W. GAINEY, Jr., Marcel MITRAN, Eric M. SCHWARZ, Timothy J. SLEGEL
  • Publication number: 20160210143
    Abstract: Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.
    Type: Application
    Filed: March 28, 2016
    Publication date: July 21, 2016
    Inventors: Steven R. CARLOUGH, Reid T. COPELAND, Charles W. GAINEY, JR., Marcel MITRAN, Eric M. SCHWARZ, Timothy J. SLEGEL
  • Patent number: 9395989
    Abstract: Aspects relate to executing a run-time-instrumentation EMIT (RIEMIT) instruction. A processor is configured to capture the run-time-instrumentation information of a stream of instructions. The RIEMIT instruction is fetched and executed. It is determined if the current run-time-instrumentation controls are configured to permit capturing and storing of run-time-instrumentation information in a run-time-instrumentation program buffer. If the controls are configured to store run-time-instrumentation instructions, then a RIEMIT instruction specified value is stored as an emit record of a reporting group in the run-time-instrumentation program buffer.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: July 19, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles W. Gainey, Jr., Marcel Mitran, Chung-Lung K. Shum, Kevin A. Stoodley
  • Publication number: 20160203023
    Abstract: A multiple processor core computer system interface assigns instructions to partially functional processor cores based on processing resources available in each partially functional core. Each processor core is labeled as fully functional, partially functional, or non-functional, and an indicator is provided for each partially functional processor core that shows what processing resources are available for a respective core. The indicators can be stored in memory after final test. The interface can monitor cores for changes in available resources and update respective indicators, such as by superseding an existing indicator with or creating a new indicator in read-write memory.
    Type: Application
    Filed: January 13, 2015
    Publication date: July 14, 2016
    Inventors: Marcel Mitran, K. Paul Muller, William J. Rooney, Joran S.C. Siu, David S. Wolpert
  • Patent number: 9367313
    Abstract: The invention relates to implementing run-time instrumentation directed sampling. An aspect of the invention includes a method for implementing run-time instrumentation directed sampling. The method includes fetching a run-time instrumentation next (RINEXT) instruction from an instruction stream. The instruction stream includes the RINEXT instruction followed by a next sequential instruction (NSI) in program order. The method further includes executing the RINEXT instruction by a processor. The executing includes determining whether a current run-time instrumentation state enables setting a sample point for reporting run-time instrumentation information during program execution. Based on the current run-time instrumentation state enabling setting the sample point, the NSI is a sample instruction for causing a run-time instrumentation event.
    Type: Grant
    Filed: March 5, 2013
    Date of Patent: June 14, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Charles W. Gainey, Jr., Marcel Mitran, Chung-Lung K. Shum, Kevin Stoodley
  • Patent number: 9348642
    Abstract: A TRANSACTION BEGIN instruction and a TRANSACTION END instruction are provided. The TRANSACTION BEGIN instruction causes either a constrained or nonconstrained transaction to be initiated, depending on a field of the instruction. A constrained transaction has one or more restrictions associated therewith, while a nonconstrained transaction is not limited in the manner of a constrained transaction. The TRANSACTION END instruction ends the transaction started by the TRANSACTION BEGIN instruction.
    Type: Grant
    Filed: June 15, 2012
    Date of Patent: May 24, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Dan F. Greiner, Christian Jacobi, Marcel Mitran, Timothy J. Slegel
  • Patent number: 9335993
    Abstract: Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: May 10, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven R. Carlough, Reid T. Copeland, Charles W. Gainey, Jr., Marcel Mitran, Eric M. Schwarz, Timothy J. Slegel
  • Patent number: 9335995
    Abstract: Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: May 10, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven R. Carlough, Reid T. Copeland, Charles W. Gainey, Jr., Marcel Mitran, Eric M. Schwarz, Timothy J. Slegel
  • Patent number: 9335994
    Abstract: Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: May 10, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven R. Carlough, Reid T. Copeland, Charles W. Gainey, Jr., Marcel Mitran, Eric M. Schwarz, Timothy J. Slegel
  • Patent number: 9329861
    Abstract: Machine instructions, referred to herein as a long Convert from Zoned instruction (CDZT) and extended Convert from Zoned instruction (CXZT), are provided that read EBCDIC or ASCII data from memory, convert it to the appropriate decimal floating point format, and write it to a target floating point register or floating point register pair. Further, machine instructions, referred to herein as a long Convert to Zoned instruction (CZDT) and extended Convert to Zoned instruction (CZXT), are provided that convert a decimal floating point (DFP) operand in a source floating point register or floating point register pair to EBCDIC or ASCII data and store it to a target memory location.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: May 3, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven R. Carlough, Reid T. Copeland, Charles W. Gainey, Jr., Marcel Mitran, Eric M. Schwarz, Timothy J. Slegel
  • Publication number: 20160092164
    Abstract: Embodiments relate to converting data from a packed decimal format to a decimal floating point format by executing a machine instruction. A method of executing the machine instruction is provided. The method reads data in a packed decimal format from a memory that is communicatively coupled to a processor. The method converts the data in the packed decimal format into a decimal floating point format. The method writes the data converted into the decimal floating point format to one or more target registers of the processor.
    Type: Application
    Filed: July 28, 2015
    Publication date: March 31, 2016
    Inventors: Jonathan D. Bradbury, Steven R. Carlough, Reid T. Copeland, Marcel Mitran
  • Publication number: 20160092163
    Abstract: Embodiments relate to converting data from a decimal floating point format to a packed decimal format by executing a machine instruction. A method of executing the machine instruction is provided. The method reads data in a decimal floating point format from one or more registers of a processor that is communicatively coupled to a memory. The method converts the data in the decimal floating point format into a packed decimal format. The method writes the data converted into the packed decimal format to the memory.
    Type: Application
    Filed: September 30, 2014
    Publication date: March 31, 2016
    Inventors: Jonathan D. Bradbury, Steven R. Carlough, Reid T. Copeland, Marcel Mitran
  • Publication number: 20160092162
    Abstract: Embodiments relate to converting data from a packed decimal format to a decimal floating point format by executing a machine instruction. A method of executing the machine instruction is provided. The method reads data in a packed decimal format from a memory that is communicatively coupled to a processor. The method converts the data in the packed decimal format into a decimal floating point format. The method writes the data converted into the decimal floating point format to one or more target registers of the processor.
    Type: Application
    Filed: September 30, 2014
    Publication date: March 31, 2016
    Inventors: Jonathan D. Bradbury, Steven R. Carlough, Reid T. Copeland, Marcel Mitran
  • Publication number: 20160092165
    Abstract: Embodiments relate to converting data from a decimal floating point format to a packed decimal format by executing a machine instruction. A method of executing the machine instruction is provided. The method reads data in a decimal floating point format from one or more registers of a processor that is communicatively coupled to a memory. The method converts the data in the decimal floating point format into a packed decimal format. The method writes the data converted into the packed decimal format to the memory.
    Type: Application
    Filed: July 28, 2015
    Publication date: March 31, 2016
    Inventors: Jonathan D. Bradbury, Steven R. Carlough, Reid T. Copeland, Marcel Mitran
  • Patent number: 9280448
    Abstract: Aspects relate to enabling and disabling execution of a run-time instrumentation facility. An instruction for execution by the processor in a lesser privileged state is fetched by the processor. It is determined, by the processor, that the run-time instrumentation facility permits execution of the instruction in the lesser-privileged state and that controls associated with the run-time instrumentation facility are valid. The run-time instrumentation facility is disabled based on the instruction being a run-time instrumentation facility off (RIOFF) instruction. The disabling includes updating a bit in a program status word (PSW) of the processor to indicate that run-time instrumentation data should not be captured by the processor. The run-time instrumentation facility is enabled based on the instruction being a run-time instrumentation facility on (RION) instruction. The enabling includes updating the bit in the PSW to indicate that run-time instrumentation data should be captured by the processor.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: March 8, 2016
    Assignee: International Business Machines Corporation
    Inventors: Mark S. Farrell, Charles W. Gainey, Jr., Marcel Mitran, Chung-Lung K. Shum, Timothy J. Slegel, Brian L. Smith, Kevin A. Stoodley