Patents by Inventor Marco Zamprogno

Marco Zamprogno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240049603
    Abstract: A differential piezoelectric actuator-system includes an inductor and driver-circuit having switches for transferring energy between first and second actuators and the inductor, and between a voltage-supply node and the inductor. Control circuitry determines whether a next phase in which to operate the driver-circuit is a first charging-phase or a first recovery-phase. The first charging-phase includes operating the switches in: a first sub-phase to transfer energy from the first actuator to the inductor; a second sub-phase to transfer energy from the voltage supply node to the inductor; and a third sub-phase to transfer energy from the inductor to the second actuator. The first recovery-phase includes operating the switches in: a first sub-phase to transfer energy from the first actuator to the inductor; a second sub-phase to transfer energy from the inductor to the second actuator; and a third sub-phase to transfer energy from the inductor to the voltage supply node.
    Type: Application
    Filed: August 2, 2022
    Publication date: February 8, 2024
    Applicants: STMicroelectronics S.r.l., Politecnico Di Milano
    Inventors: Marco ZAMPROGNO, Raffaele Enrico FURCERI, Matteo GIANOLLO, Giacomo LANGFELDER
  • Publication number: 20240049604
    Abstract: A differential piezoelectric actuator-system includes an inductor and driver-circuit having switches for transferring energy between first and second actuators and the inductor, and between a voltage-supply node and the inductor. Control circuitry determines whether a next phase in which to operate the driver-circuit is a first charging-phase or a first recovery-phase. The first charging-phase includes operating the switches in: a first sub-phase to transfer energy from the first actuator to the inductor; a second sub-phase to transfer energy from the voltage supply node to the inductor; and a third sub-phase to transfer energy from the inductor to the second actuator. The first recovery-phase includes operating the switches in: a first sub-phase to transfer energy from the first actuator to the inductor; a second sub-phase to transfer energy from the inductor to the voltage supply node; and a third sub-phase to transfer energy from the inductor to the second actuator.
    Type: Application
    Filed: July 14, 2023
    Publication date: February 8, 2024
    Applicants: STMicroelectronics S.r.l., Politecnico Di Milano
    Inventors: Marco ZAMPROGNO, Raffaele Enrico FURCERI, Matteo GIANOLLO, Giacomo LANGFELDER
  • Publication number: 20230216405
    Abstract: A DC-DC boost converter includes an inductor coupled between an input voltage and an input node, a diode coupled between the input node and an output node, and an output capacitor coupled between the output node and ground such that an output voltage is formed across the output capacitor. A switch selectively couples the input node to ground in response to a drive signal. Control loop circuitry includes an error amplifier to generate an analog error voltage based upon a comparison of a feedback voltage to a reference voltage, the feedback voltage being indicative of the output voltage, a quantizer to quantize the analog error voltage to produce a digital error signal, and a drive voltage generation circuit to generate the drive signal as having a duty cycle based upon the digital error signal.
    Type: Application
    Filed: December 30, 2021
    Publication date: July 6, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Andrea BARBIERI, Aldo VIDONI, Marco ZAMPROGNO
  • Patent number: 11581892
    Abstract: A method includes pre-charging a parasitic capacitance of a control node that is coupled to a control terminal of first and second transistors that have respective current paths that form a switched current path coupled between a load node and a storage node. Pre-charging the parasitic capacitance includes: making conductive a first auxiliary transistor that has a current path coupled between the storage node and the control node, or making conductive a second auxiliary transistor that has a current path coupled between the load node and the control node. The method further includes, after pre-charging the parasitic capacitance, making the switched current path conductive to couple the load node to the storage node.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: February 14, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventor: Marco Zamprogno
  • Patent number: 11561237
    Abstract: A circuit configured to sense an input analog signal generated by a sensor at a first frequency and to generate an output digital signal indicative of the sensed input analog signal. The circuit includes a conditioning circuit, an ADC, a feedback circuit, and a low-pass filter. The conditioning circuit is configured to receive the input analog signal and to generate a conditioned analog signal. The ADC is configured to provide a converted digital signal based on the conditioned analog signal. The feedback circuit includes a band-pass filter configured to selectively detect a periodic signal at a second frequency higher than the first frequency and to act on the conditioning circuit to counter variations of the periodic signal at the second frequency. The low-pass filter is configured to filter out the periodic signal from the converted digital signal to generate the output digital signal.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: January 24, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventor: Marco Zamprogno
  • Publication number: 20220334378
    Abstract: A MEMS device includes a semiconductor body with a cavity and forming an anchor portion, a tiltable structure elastically suspended over the cavity, first and second support arms to support the tiltable structure, and first and second piezoelectric actuation structures biasable to deform mechanically, generating a rotation of the tiltable structure around a rotation axis. The piezoelectric actuation structures carry first and second piezoelectric displacement sensors. When the tiltable structure rotates around the rotation axis, the displacement sensors are subject to respective mechanical deformations and generate respective sensing signals in phase opposition to each other, indicative of the rotation of the tiltable structure. The sensing signals are configured to be acquired in a differential manner.
    Type: Application
    Filed: April 14, 2022
    Publication date: October 20, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventors: Roberto CARMINATI, Nicolo' BONI, Andrea BARBIERI, Marco ZAMPROGNO, Luca MOLINARI
  • Publication number: 20220329042
    Abstract: An input is coupled to a cathode of a laser diode having its anode coupled to a high-voltage-supply, with a cascoded current mirror having an input and output branches. The input branch is coupled between the high-voltage-supply and a sense resistor coupled to the input. The output branch is coupled between the high-voltage-supply and an output. A sense resistance is coupled between the output and ground, and includes a diode-coupled transistor coupled to the output and a resistor coupled between the diode-coupled transistor and ground. The input branch generates a current proportional to a voltage across the laser diode, and the output branch generates a mirrored current proportional to the current proportional to the voltage across the laser diode. A voltage proportional to the voltage across the laser diode is generated by the mirrored current flowing through the sense resistance. A comparison circuit compares this voltage to a threshold.
    Type: Application
    Filed: June 28, 2022
    Publication date: October 13, 2022
    Applicants: STMicroelectronics S.r.l., POLITECNICO DI MILANO
    Inventors: Marco ZAMPROGNO, Alireza TAJFAR
  • Publication number: 20220302676
    Abstract: A pulsed signal generator generates a pulsed signal having a pulse width configured to be equal to a given fraction of a pulse width of a reference clock. A reference current source outputs current having a reference magnitude, and a comparison current source outputs current having a magnitude that is a function of the reference magnitude and the given fraction. A comparison circuit compares a total current output by one of the reference current source and the comparison current source during pulses of the reference clock to a total current output by the other of the reference current source and the comparison current source during pulses of the pulsed signal equal in number to the pulses of the reference clock in order to determine whether the pulse width of the pulse signal is less than or equal to the given fraction of the pulse width of the reference clock.
    Type: Application
    Filed: June 6, 2022
    Publication date: September 22, 2022
    Applicant: STMicroelectronics S.r.l.
    Inventors: Marco ZAMPROGNO, Alireza TAJFAR
  • Patent number: 11422044
    Abstract: A bridge driver circuit applies a bias voltage across first and second input nodes of a resistive bridge circuit configured to measure a physical property such as pressure or movement. A sensing circuit senses drive current, bias current and common mode current for the bridge driver and sums the sensed currents to generate a source current. The source current is processed to determine a normalized resistance and temperature of the resistive bridge circuit and from which a temperature dependent sensitivity of the resistive bridge circuit is determined. A voltage output at first and second output nodes of the resistive bridge circuit is processed to determine a value of the physical property. This processing further involves applying a temperature correction in response to the determined temperature dependent sensitivity.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: August 23, 2022
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Zamprogno, Andrea Barbieri, Pasquale Flora, Raffaele Enrico Furceri
  • Patent number: 11418007
    Abstract: A level-shifter includes an input node coupled to a laser driver input receiving a trigger signal, the input node receiving a signal indicating generation of a laser drive-pulse. A p-channel transistor has a source coupled to a supply node, a drain coupled to an output node, and a gate coupled to the input node. An n-channel transistor has a drain coupled to the drain of the p-channel transistor, a source coupled to ground, and a gate coupled to the input node. A first switch couples the input node to the output node. Another p-channel transistor has a source coupled to the supply node, a drain coupled to the output node by a second switch, and a gate coupled to the input node. The first switch closes and second switch opens when the signal is low, and the first switch opens and second switch closes when the signal is high.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: August 16, 2022
    Assignees: STMicroelectronics S.r.l., Politecnico Di Milano
    Inventors: Marco Zamprogno, Alireza Tajfar
  • Patent number: 11387625
    Abstract: A pulsed signal generator generates a pulsed signal having a pulse width intended to be equal to a given fraction of a pulse width of a reference clock. A reference current source outputs current having a reference magnitude, and a comparison current source outputs current having a magnitude that is a function of the reference magnitude and the given fraction. A comparison circuit compares a total current output by one of the reference current source and the comparison current source during pulses of the reference clock to a total current output by the other of the reference current source and the comparison current source during pulses of the pulsed signal equal in number to the pulses of the reference clock in order to determine whether the pulse width of the pulse signal is less than or equal to the given fraction of the pulse width of the reference clock.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: July 12, 2022
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Zamprogno, Alireza Tajfar
  • Publication number: 20220065893
    Abstract: A circuit configured to sense an input analog signal generated by a sensor at a first frequency and to generate an output digital signal indicative of the sensed input analog signal. The circuit includes a conditioning circuit, an ADC, a feedback circuit, and a low-pass filter. The conditioning circuit is configured to receive the input analog signal and to generate a conditioned analog signal. The ADC is configured to provide a converted digital signal based on the conditioned analog signal. The feedback circuit includes a band-pass filter configured to selectively detect a periodic signal at a second frequency higher than the first frequency and to act on the conditioning circuit to counter variations of the periodic signal at the second frequency. The low-pass filter is configured to filter out the periodic signal from the converted digital signal to generate the output digital signal.
    Type: Application
    Filed: November 11, 2021
    Publication date: March 3, 2022
    Inventor: Marco Zamprogno
  • Patent number: 11193952
    Abstract: A circuit configured to sense an input analog signal generated by a sensor at a first frequency and to generate an output digital signal indicative of the sensed input analog signal. The circuit includes a conditioning circuit, an ADC, a feedback circuit, and a low-pass filter. The conditioning circuit is configured to receive the input analog signal and to generate a conditioned analog signal. The ADC is configured to provide a converted digital signal based on the conditioned analog signal. The feedback circuit includes a band-pass filter configured to selectively detect a periodic signal at a second frequency higher than the first frequency and to act on the conditioning circuit to counter variations of the periodic signal at the second frequency. The low-pass filter is configured to filter out the periodic signal from the converted digital signal to generate the output digital signal.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: December 7, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventor: Marco Zamprogno
  • Publication number: 20210364375
    Abstract: A bridge driver circuit applies a bias voltage across first and second input nodes of a resistive bridge circuit configured to measure a physical property such as pressure or movement. A sensing circuit senses a bridge current that flows through the resistive bridge circuit in response to the applied bias voltage. A temperature dependent sensitivity of the resistive bridge circuit is determined by processing the sensed bridge current. A voltage output at first and second output nodes of the resistive bridge circuit is processed to determine a value of the physical property. This processing further involves applying a temperature correction in response to the determined temperature dependent sensitivity.
    Type: Application
    Filed: May 19, 2020
    Publication date: November 25, 2021
    Applicant: STMicroelectronics S.r.l.
    Inventors: Marco ZAMPROGNO, Andrea BARBIERI, Pasquale FLORA, Raffaele Enrico FURCERI
  • Patent number: 11146267
    Abstract: A charge recovery driver is for a pair of loads, and includes first and second output nodes coupled to a pair of loads. During an initial phase, the first output node is grounded and the second output node is tied to the supply voltage. During a first phase, the first output node is coupled to the first tank capacitor and the second output node is coupled to the second tank capacitor. During a second phase, the first and second output nodes are coupled to one another. During a third phase, the second output node is coupled to the first tank capacitor and the first output node is coupled to the second tank capacitor. During a fourth phase, the first output node is coupled to the supply voltage and the second output node is coupled to ground. The third, second, and first phases are then repeated in that order.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: October 12, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventors: Franco Consiglieri, Pasquale Flora, Marco Zamprogno
  • Patent number: 11057022
    Abstract: A monostable circuit includes a delay cell with a reference generator generating a reference current based upon a PVT invariant resistance and a threshold voltage, and a delay block with an output capacitor and an output circuit altering an amount of charge stored on the output capacitor as a function of the reference current, in response to an input signal. An inverter has an input coupled to the output circuit. A logic circuit logically combines output of the inverter and the input signal to generate a monostable trigger pulse. The output circuit includes a current source sourcing the reference current to the output capacitor in response to a first logic state of an input signal, and a current sink sinking current from the output capacitor to discharge the output capacitor, in response to a second logic state of the input signal.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: July 6, 2021
    Assignees: STMicroelectronics S.r.l., Politecnico Di Milano
    Inventors: Marco Zamprogno, Alireza Tajfar
  • Patent number: 10897234
    Abstract: A method and apparatus for sensing a common mode feedback current are provided. The common mode feedback current may flow through a common mode resistive divider of a piezoresistive bridge. A first current mirror mirrors the common mode feedback current and provides a first mirrored common mode current. A current aggregation stage receives the first mirrored common mode current and determines a bridge current of the piezoresistive bridge based on the first mirrored common mode feedback current. A second current mirror may be used to mirror the first current mirror before determining the bridge current.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: January 19, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Zamprogno, Simone Zezza, Pasquale Flora
  • Publication number: 20210006034
    Abstract: A level-shifter includes an input node coupled to a laser driver input receiving a trigger signal, the input node receiving a signal indicating generation of a laser drive-pulse. A p-channel transistor has a source coupled to a supply node, a drain coupled to an output node, and a gate coupled to the input node. An n-channel transistor has a drain coupled to the drain of the p-channel transistor, a source coupled to ground, and a gate coupled to the input node. A first switch couples the input node to the output node. Another p-channel transistor has a source coupled to the supply node, a drain coupled to the output node by a second switch, and a gate coupled to the input node. The first switch closes and second switch opens when the signal is low, and the first switch opens and second switch closes when the signal is high.
    Type: Application
    Filed: September 21, 2020
    Publication date: January 7, 2021
    Applicants: STMicroelectronics S.r.l., Politecnico Di Milano
    Inventors: Marco ZAMPROGNO, Alireza TAJFAR
  • Publication number: 20200412344
    Abstract: A monostable circuit includes a delay cell with a reference generator generating a reference current based upon a PVT invariant resistance and a threshold voltage, and a delay block with an output capacitor and an output circuit altering an amount of charge stored on the output capacitor as a function of the reference current, in response to an input signal. An inverter has an input coupled to the output circuit. A logic circuit logically combines output of the inverter and the input signal to generate a monostable trigger pulse. The output circuit includes a current source sourcing the reference current to the output capacitor in response to a first logic state of an input signal, and a current sink sinking current from the output capacitor to discharge the output capacitor, in response to a second logic state of the input signal.
    Type: Application
    Filed: June 27, 2019
    Publication date: December 31, 2020
    Applicants: STMicroelectronics S.r.l., Politecnico Di Milano
    Inventors: Marco ZAMPROGNO, Alireza TAJFAR
  • Publication number: 20200412088
    Abstract: A pulsed signal generator generates a pulsed signal having a pulse width intended to be equal to a given fraction of a pulse width of a reference clock. A reference current source outputs current having a reference magnitude, and a comparison current source outputs current having a magnitude that is a function of the reference magnitude and the given fraction. A comparison circuit compares a total current output by one of the reference current source and the comparison current source during pulses of the reference clock to a total current output by the other of the reference current source and the comparison current source during pulses of the pulsed signal equal in number to the pulses of the reference clock in order to determine whether the pulse width of the pulse signal is less than or equal to the given fraction of the pulse width of the reference clock.
    Type: Application
    Filed: June 27, 2019
    Publication date: December 31, 2020
    Applicants: STMicroelectronics S.r.l., Politecnico Di Milano
    Inventors: Marco ZAMPROGNO, Alireza TAJFAR