Patents by Inventor Margaret A. Szymanowski
Margaret A. Szymanowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10566935Abstract: An embodiment of a Doherty amplifier module includes a substrate, an RF signal splitter, a carrier amplifier die, and a peaking amplifier die. The RF signal splitter divides an input RF signal into first and second input RF signals, and conveys the first and second input RF signals to first and second splitter output terminals. The carrier amplifier die includes one or more first power transistors configured to amplify, along a carrier signal path, the first input RF signal to produce an amplified first RF signal. The peaking amplifier die includes one or more second power transistors configured to amplify, along a peaking signal path, the second input RF signal to produce an amplified second RF signal. The carrier and peaking amplifier die are coupled to the substrate so that the RF signal paths through the carrier and peaking amplifier die extend in substantially different (e.g., orthogonal) directions.Type: GrantFiled: September 20, 2017Date of Patent: February 18, 2020Assignee: NXP USA, Inc.Inventors: Elie A. Maalouf, Margaret A. Szymanowski
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Patent number: 10476442Abstract: A system and method for packaging a semiconductor device that includes a wall to reduce electromagnetic coupling is presented. A semiconductor device has a substrate on which a first circuit and a second circuit are formed proximate to each other. An isolation wall of electrically conductive material is located between the first circuit and the second circuit, the isolation wall being configured to reduce inductive coupling between the first and second circuits during an operation of the semiconductor device. Several types of isolation walls are presented.Type: GrantFiled: September 25, 2018Date of Patent: November 12, 2019Assignee: NXP USA, Inc.Inventors: Margaret A. Szymanowski, Sarmad K. Musa, Fernando A. Santos, Mahesh K. Shah
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Publication number: 20190296693Abstract: An amplifier device includes an input terminal, an output terminal, a first transistor having a control terminal and first and second current-carrying terminals, and a class-J circuit coupled between the second current-carrying terminal of the first transistor and the output terminal and configured to harmonically terminate the first transistor. The class-J circuit may include a first resonator, characterized by a first resonant frequency substantially equal to a second harmonic frequency. The first resonator may be coupled between the second current-carrying terminal and a voltage reference. A shunt inductor that is distinct from the first resonator may be coupled between the second current-carrying terminal and the voltage reference.Type: ApplicationFiled: March 20, 2018Publication date: September 26, 2019Inventors: Maruf AHMED, Margaret A. SZYMANOWSKI, Joseph STAUDINGER
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Patent number: 10269729Abstract: A device (e.g., a Doherty amplifier) housed in an air cavity package includes one or more isolation structures over a surface of a substrate and defining an active circuit area. The device also includes first and second adjacent circuits within the active circuit area, first and second leads coupled to the isolation structure(s) between opposite sides of the package and electrically coupled to the first circuit, third and fourth leads coupled to the isolation structure(s) between the opposite sides of the package and electrically coupled to the second circuit, a first terminal over the first side of the package between the first lead and the third lead, a second terminal over the second side of the package between the second lead and the fourth lead, and an electronic component coupled to the package and electrically coupled to the first terminal, the second terminal, or both the first and second terminals.Type: GrantFiled: May 21, 2018Date of Patent: April 23, 2019Assignee: NXP USA, Inc.Inventors: Shun Meen Kuo, Paul R. Hart, Margaret A. Szymanowski
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Patent number: 10211784Abstract: An amplifier includes first, second, and third inputs to receive an RF signal, first and second amplifiers, and an input phase adjustment circuit coupling the first, second, and third inputs to the first and second amplifiers, the input phase adjustment circuit having first and second outputs coupled to the first and second amplifiers, respectively. The input phase adjustment circuit includes a pair of inputs, where the pair of inputs includes the first and second inputs, for the first output and a pair of phase adjustment paths coupling the pair of inputs to the first output, respectively. The pair of phase adjustment paths are configured to adjust a phase of the RF signal differently for the first output.Type: GrantFiled: November 3, 2016Date of Patent: February 19, 2019Assignee: NXP USA, INC.Inventors: Margaret A. Szymanowski, Ramanujam Srinidhi Embar, Roy Mclaren
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Publication number: 20190028063Abstract: A system and method for packaging a semiconductor device that includes a wall to reduce electromagnetic coupling is presented. A semiconductor device has a substrate on which a first circuit and a second circuit are formed proximate to each other. An isolation wall of electrically conductive material is located between the first circuit and the second circuit, the isolation wall being configured to reduce inductive coupling between the first and second circuits during an operation of the semiconductor device. Several types of isolation walls are presented.Type: ApplicationFiled: September 25, 2018Publication date: January 24, 2019Inventors: Margaret A. Szymanowski, Sarmad K. Musa, Fernando A. Santos, Mahesh K. Shah
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Patent number: 10110170Abstract: A system and method for packaging a semiconductor device that includes a wall to reduce electromagnetic coupling is presented. A semiconductor device has a substrate on which a first circuit and a second circuit are formed proximate to each other. An isolation wall of electrically conductive material is located between the first circuit and the second circuit, the isolation wall being configured to reduce inductive coupling between the first and second circuits during an operation of the semiconductor device. Several types of isolation walls are presented.Type: GrantFiled: September 16, 2016Date of Patent: October 23, 2018Assignee: NXP USA, INC.Inventors: Margaret A. Szymanowski, Sarmad K. Musa, Fernando A. Santos, Mahesh K. Shah
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Publication number: 20180269158Abstract: A device (e.g., a Doherty amplifier) housed in an air cavity package includes one or more isolation structures over a surface of a substrate and defining an active circuit area. The device also includes first and second adjacent circuits within the active circuit area, first and second leads coupled to the isolation structure(s) between opposite sides of the package and electrically coupled to the first circuit, third and fourth leads coupled to the isolation structure(s) between the opposite sides of the package and electrically coupled to the second circuit, a first terminal over the first side of the package between the first lead and the third lead, a second terminal over the second side of the package between the second lead and the fourth lead, and an electronic component coupled to the package and electrically coupled to the first terminal, the second terminal, or both the first and second terminals.Type: ApplicationFiled: May 21, 2018Publication date: September 20, 2018Inventors: Shun Meen Kuo, Paul R. Hart, Margaret A. Szymanowski
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Patent number: 10069462Abstract: A multiple-stage RF amplifier and a packaged amplifier device include driver and final-stage transistors, each having a control terminal, a first current-carrying terminal, and a second current-carrying terminal. The control terminal of the final-stage transistor is electrically coupled to the first current-carrying terminal of the driver transistor. The amplifier further includes an inter-stage circuit coupled between the first current carrying terminal of the driver transistor and a voltage reference node. The inter-stage circuit includes a first inductance, a first capacitor, and a second capacitor. The first inductance and the first capacitor are coupled in series between the first current carrying terminal and the voltage reference node, with an intermediate node between the first inductance and the first capacitor. The second capacitor has a first terminal electrically coupled to the intermediate node and a second terminal electrically coupled to the voltage reference node.Type: GrantFiled: February 27, 2017Date of Patent: September 4, 2018Assignee: NXP USA, INC.Inventors: Seungkee Min, Margaret A. Szymanowski, Henry Andre Christange
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Publication number: 20180248521Abstract: A multiple-stage RF amplifier and a packaged amplifier device include driver and final-stage transistors, each having a control terminal, a first current-carrying terminal, and a second current-carrying terminal. The control terminal of the final-stage transistor is electrically coupled to the first current-carrying terminal of the driver transistor. The amplifier further includes an inter-stage circuit coupled between the first current carrying terminal of the driver transistor and a voltage reference node. The inter-stage circuit includes a first inductance, a first capacitor, and a second capacitor. The first inductance and the first capacitor are coupled in series between the first current carrying terminal and the voltage reference node, with an intermediate node between the first inductance and the first capacitor. The second capacitor has a first terminal electrically coupled to the intermediate node and a second terminal electrically coupled to the voltage reference node.Type: ApplicationFiled: February 27, 2017Publication date: August 30, 2018Inventors: Seungkee Min, Margaret A. Szymanowski, Henry Andre Christange
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Patent number: 9978691Abstract: A device (e.g., a Doherty amplifier) housed in an air cavity package includes one or more isolation structures over a surface of a substrate and defining an active circuit area. The device also includes first and second adjacent circuits within the active circuit area, first and second leads coupled to the isolation structure(s) between opposite sides of the package and electrically coupled to the first circuit, third and fourth leads coupled to the isolation structure(s) between the opposite sides of the package and electrically coupled to the second circuit, a first terminal over the first side of the package between the first lead and the third lead, a second terminal over the second side of the package between the second lead and the fourth lead, and an electronic component coupled to the package and electrically coupled to the first terminal, the second terminal, or both the first and second terminals.Type: GrantFiled: January 14, 2016Date of Patent: May 22, 2018Assignee: NXP USA, INC.Inventors: Shun Meen Kuo, Paul R. Hart, Margaret A. Szymanowski
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Publication number: 20180123520Abstract: An amplifier includes first, second, and third inputs to receive an RF signal, first and second amplifiers, and an input phase adjustment circuit coupling the first, second, and third inputs to the first and second amplifiers, the input phase adjustment circuit having first and second outputs coupled to the first and second amplifiers, respectively. The input phase adjustment circuit includes a pair of inputs, where the pair of inputs includes the first and second inputs, for the first output and a pair of phase adjustment paths coupling the pair of inputs to the first output, respectively. The pair of phase adjustment paths are configured to adjust a phase of the RF signal differently for the first output.Type: ApplicationFiled: November 3, 2016Publication date: May 3, 2018Inventors: Margaret A. Szymanowski, Ramanujam Srinidhi Embar, Roy Mclaren
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Publication number: 20180013391Abstract: An embodiment of a Doherty amplifier module includes a substrate, an RF signal splitter, a carrier amplifier die, and a peaking amplifier die. The RF signal splitter divides an input RF signal into first and second input RF signals, and conveys the first and second input RF signals to first and second splitter output terminals. The carrier amplifier die includes one or more first power transistors configured to amplify, along a carrier signal path, the first input RF signal to produce an amplified first RF signal. The peaking amplifier die includes one or more second power transistors configured to amplify, along a peaking signal path, the second input RF signal to produce an amplified second RF signal. The carrier and peaking amplifier die are coupled to the substrate so that the RF signal paths through the carrier and peaking amplifier die extend in substantially different (e.g., orthogonal) directions.Type: ApplicationFiled: September 20, 2017Publication date: January 11, 2018Inventors: Elie A. Maalouf, Margaret A. Szymanowski
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Patent number: 9774301Abstract: An embodiment of a Doherty amplifier module includes a substrate, an RF signal splitter, a carrier amplifier die, and a peaking amplifier die. The RF signal splitter divides an input RF signal into first and second input RF signals, and conveys the first and second input RF signals to first and second splitter output terminals. The carrier amplifier die includes one or more first power transistors configured to amplify, along a carrier signal path, the first input RF signal to produce an amplified first RF signal. The peaking amplifier die includes one or more second power transistors configured to amplify, along a peaking signal path, the second input RF signal to produce an amplified second RF signal. The carrier and peaking amplifier die are coupled to the substrate so that the RF signal paths through the carrier and peaking amplifier die extend in substantially different (e.g., orthogonal) directions.Type: GrantFiled: May 17, 2016Date of Patent: September 26, 2017Assignee: NXP USA, INC.Inventors: Elie A. Maalouf, Margaret A. Szymanowski
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Patent number: 9673164Abstract: A system and method for packaging a semiconductor device that includes a structure to reduce electromagnetic coupling is presented. The semiconductor device has a substrate on which a first circuit and a second circuit with inputs and outputs are formed proximate to each other. An isolation structure of electrically conductive material is located between components of the first and second circuits, the isolation structure being configured to reduce inductive coupling between those components during an operation of the semiconductor device. The isolation structure may be positioned on or over exterior surfaces of the semiconductor device housing or inside the housing. In one embodiment, the isolation structure includes a first leg extending transverse to the surface of the substrate and a first cross member connected to and projecting from the first leg over the substrate.Type: GrantFiled: April 25, 2014Date of Patent: June 6, 2017Assignee: NXP USA, INC.Inventors: Michael E. Watts, Shun Meen Kuo, Margaret A. Szymanowski
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Patent number: 9647611Abstract: A reconfigurable Doherty power amplifier includes a packaged power splitter device, main and peaking amplifiers, and a combiner circuit. The power splitter device includes a power divider, input terminals coupled to first and second ports of the power divider, and output terminals coupled to third and fourth ports of the power divider. One of the input terminals is coupled to an RF signal input terminal, and the other input terminal is terminated. The power divider receives an input RF signal, and produces main and peaking RF signals at the third and fourth ports of the power divider, respectively. The main and peaking amplifiers amplify the main and peaking RF signals, respectively. The combiner circuit includes a summing node and a phase delay element between outputs of the main and peaking amplifiers. An RF signal output terminal is coupled to the summing node.Type: GrantFiled: October 28, 2015Date of Patent: May 9, 2017Assignee: NXP USA, INC.Inventors: Ramanujam Srinidhi Embar, Joseph Staudinger, Margaret A. Szymanowski
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Publication number: 20170126181Abstract: A reconfigurable Doherty power amplifier includes a packaged power splitter device, main and peaking amplifiers, and a combiner circuit. The power splitter device includes a power divider, input terminals coupled to first and second ports of the power divider, and output terminals coupled to third and fourth ports of the power divider. One of the input terminals is coupled to an RF signal input terminal, and the other input terminal is terminated. The power divider receives an input RF signal, and produces main and peaking RF signals at the third and fourth ports of the power divider, respectively. The main and peaking amplifiers amplify the main and peaking RF signals, respectively. The combiner circuit includes a summing node and a phase delay element between outputs of the main and peaking amplifiers. An RF signal output terminal is coupled to the summing node.Type: ApplicationFiled: October 28, 2015Publication date: May 4, 2017Inventors: Ramanujam Srinidhi EMBAR, Joseph STAUDINGER, Margaret A. SZYMANOWSKI
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Patent number: 9589927Abstract: An embodiment of a packaged RF amplifier device includes a device substrate, a transistor die coupled to the device substrate, and an isolation structure coupled to the transistor die. The transistor die has a top die surface, a bottom die surface, a semiconductor substrate, first and second transistors formed in the semiconductor substrate, a conductive structure at the top die surface and positioned between the first and second transistors, and a low resistance path that extends vertically through the semiconductor substrate between the conductive structure and the bottom die surface. The isolation structure is coupled to the conductive structure and extends into an area above the top die surface between the first and second transistors. The isolation structure may be a wirebond fence, a conductive wall, conductive pillars or vias, or a plated trench that extends vertically upward from the conductive structure. The device may be encapsulated with molding compound.Type: GrantFiled: September 25, 2014Date of Patent: March 7, 2017Assignee: NXP USA, INC.Inventors: Margaret A. Szymanowski, Kimberly J. Foxx, Robert A. Pryor
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Publication number: 20170005621Abstract: A system and method for packaging a semiconductor device that includes a wall to reduce electromagnetic coupling is presented. A semiconductor device has a substrate on which a first circuit and a second circuit are formed proximate to each other. An isolation wall of electrically conductive material is located between the first circuit and the second circuit, the isolation wall being configured to reduce inductive coupling between the first and second circuits during an operation of the semiconductor device. Several types of isolation walls are presented.Type: ApplicationFiled: September 16, 2016Publication date: January 5, 2017Inventors: Margaret A. Szymanowski, Sarmad K. Musa, Fernando A. Santos, Mahesh K. Shah
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Patent number: 9450547Abstract: A system and method for packaging a semiconductor device that includes a wall to reduce electromagnetic coupling is presented. A semiconductor device has a substrate on which a first circuit and a second circuit are formed proximate to each other. An isolation wall of electrically conductive material is located between the first circuit and the second circuit, the isolation wall being configured to reduce inductive coupling between the first and second circuits during an operation of the semiconductor device. Several types of isolation walls are presented.Type: GrantFiled: December 12, 2013Date of Patent: September 20, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Margaret A. Szymanowski, Sarmad K. Musa, Fernando A. Santos, Mahesh K. Shah