Patents by Inventor Maria M. Portuondo
Maria M. Portuondo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100323536Abstract: A computer system architecture in which functionally compatible electronic components are located on modular printed circuit boards. Thus, a type of processor used by the system can be changed by replacing the printed circuit board incorporating the processor. Similarly a type of peripheral bus used can be changed simply by replacing the printed circuit board containing the peripheral controller. High-density connectors connect the circuit boards. Some embodiments of the invention use a single backplane. Other embodiments place peripheral slots on a second, passive backplane.Type: ApplicationFiled: August 10, 2010Publication date: December 23, 2010Applicant: WOLPASS CAPITAL INV., L.L.C.Inventors: Stanford W. Crane, JR., Maria M. Portuondo, Willard Erickson, Maurice Bizzarri
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Patent number: 7803020Abstract: A computer system architecture in which functionally compatible electronic components are located on modular printed circuit boards. Thus, a type of processor used by the system can be changed by replacing the printed circuit board incorporating the processor. Similarly a type of peripheral bus used can be changed simply by replacing the printed circuit board containing the peripheral controller. High-density connectors connect the circuit boards. Some embodiments of the invention use a single backplane. Other embodiments place peripheral slots on a second, passive backplane.Type: GrantFiled: May 14, 2007Date of Patent: September 28, 2010Inventors: Stanford W. Crane, Jr., Maria M. Portuondo, Willard Erickson, Maurice Bizzarri
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Patent number: 7183646Abstract: A semiconductor die carrier may include an insulative substrate; an array of groups of multiple electrically conductive contacts arranged in rows and columns on the insulative substrate, wherein the groups from adjacent rows are staggered as are the groups from adjacent columns, and a portion of each group overlaps into an adjacent row or an adjacent column of the groups of the array; a semiconductor die; and structure for providing electrical connection between the semiconductor die and the conductive contacts.Type: GrantFiled: June 6, 2003Date of Patent: February 27, 2007Assignee: Silicon Bandwidth, Inc.Inventors: Stanford W. Crane, Jr., Maria M. Portuondo
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Patent number: 6977432Abstract: A semiconductor die carrier includes a plurality of electrically insulative side walls; a plurality of electrically conductive leads extending from at least one of the side walls, each of the leads being individually manufactured without use of a lead frame; a semiconductor die positioned such that the electrically conductive leads are disposed at one or more locations around the periphery of the die; and structure for providing electrical connection between the semiconductor die and corresponding ones of the electrically conductive leads.Type: GrantFiled: January 13, 2004Date of Patent: December 20, 2005Assignee: Quantum Leap Packaging, Inc.Inventors: Stanford W. Crane, Jr., Maria M. Portuondo
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Patent number: 6828511Abstract: A semiconductor die carrier includes a plurality of electrically insulative side walls; a plurality of electrically conductive leads extending from at least one of the side walls, each of the leads being individually manufactured without use of a lead frame; a semiconductor die positioned such that the electrically conductive leads are disposed at one or more locations around the periphery of the die; and structure for providing electrical connection between the semiconductor die and corresponding ones of the electrically conductive leads.Type: GrantFiled: September 28, 2001Date of Patent: December 7, 2004Assignee: Silicon Bandwidth Inc.Inventors: Stanford W. Crane, Jr., Maria M. Portuondo
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Publication number: 20040140542Abstract: A semiconductor die carrier includes a plurality of electrically insulative side walls; a plurality of electrically conductive leads extending from at least one of the side walls, each of the leads being individually manufactured without use of a lead frame; a semiconductor die positioned such that the electrically conductive leads are disposed at one or more locations around the periphery of the die; and structure for providing electrical connection between the semiconductor die and corresponding ones of the electrically conductive leads.Type: ApplicationFiled: January 13, 2004Publication date: July 22, 2004Applicant: Silicon Bandwidth, Inc.Inventors: Stanford W. Crane, Maria M. Portuondo
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Publication number: 20040007774Abstract: A semiconductor die carrier may include an insulative substrate; an array of groups of multiple electrically conductive contacts arranged in rows and columns on the insulative substrate, wherein the groups from adjacent rows are staggered as are the groups from adjacent columns, and a portion of each group overlaps into an adjacent row or an adjacent column of the groups of the array; a semiconductor die; and structure for providing electrical connection between the semiconductor die and the conductive contacts.Type: ApplicationFiled: June 6, 2003Publication date: January 15, 2004Applicant: Silicon Bandwidth, Inc.Inventors: Stanford W. Crane, Maria M. Portuondo
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Patent number: 6577003Abstract: A semiconductor die carrier may include an insulative substrate; an array of groups of multiple electrically conductive contacts arranged in rows and columns on the insulative substrate, wherein the groups from adjacent rows are staggered as are the groups from adjacent columns, and a portion of each group overlaps into an adjacent row or an adjacent column of the groups of the array; a semiconductor die; and structure for providing electrical connection between the semiconductor die and the conductive contacts.Type: GrantFiled: August 1, 2000Date of Patent: June 10, 2003Assignee: Silicon Bandwidth, Inc.Inventors: Stanford W. Crane, Jr., Maria M. Portuondo
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Publication number: 20020166040Abstract: A computer system architecture in which functionally compatible electronic components are located on modular printed circuit boards. Thus, a type of processor used by the system can be changed by replacing the printed circuit board incorporating the processor. Similarly a type of peripheral bus used can be changed simply by replacing the printed circuit board containing the peripheral controller. High-density connectors connect the circuit boards. Some embodiments of the invention use a single backplane. Other embodiments place peripheral slots on a second, passive backplane.Type: ApplicationFiled: March 28, 2000Publication date: November 7, 2002Inventors: Stanford W. Crane, Maria M. Portuondo, Willard Erickson, Maurice Bizzarri
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Publication number: 20020053455Abstract: A semiconductor die carrier includes a plurality of electrically insulative side walls; a plurality of electrically conductive leads extending from at least one of the side walls, each of the leads being individually manufactured without use of a lead frame; a semiconductor die positioned such that the electrically conductive leads are disposed at one or more locations around the periphery of the die; and structure for providing electrical connection between the semiconductor die and corresponding ones of the electrically conductive leads.Type: ApplicationFiled: September 28, 2001Publication date: May 9, 2002Applicant: SILICON BANDWIDTH INC.Inventors: Stanford W. Crane, Maria M. Portuondo
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Patent number: 6339191Abstract: A semiconductor die carrier includes a plurality of electrically insulative side walls; a plurality of electrically conductive leads extending from at least one of the side walls, each of the leads being individually manufactured without use of a lead frame; a semiconductor die positioned such that the electrically conductive leads are disposed at one or more locations around the periphery of the die; and structure for providing electrical connection between the semiconductor die and corresponding ones of the electrically conductive leads.Type: GrantFiled: March 11, 1994Date of Patent: January 15, 2002Assignee: Silicon Bandwidth Inc.Inventors: Stanford W. Crane, Jr., Maria M. Portuondo
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Patent number: 6097086Abstract: A semiconductor die carrier may include an insulative substrate; an array of groups of multiple electrically conductive contacts arranged in rows and columns on the insulative substrate, wherein the groups from adjacent rows are staggered as are the groups from adjacent columns, and a portion of each group overlaps into an adjacent row or an adjacent column of the groups of the array; a semiconductor die; and structure for providing electrical connection between the semiconductor die and the conductive contacts. A semiconductor die carrier may also include an insulative substrate; a plurality of leads each having an external portion extending out of the semiconductor die.Type: GrantFiled: February 4, 1999Date of Patent: August 1, 2000Assignee: Silicon Bandwidth, Inc.Inventors: Stanford W. Crane, Jr., Maria M. Portuondo
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Patent number: 6073229Abstract: A computer system architecture in which functionally compatible electronic components are located on modular printed circuit boards. Thus, a type of processor used by the system can be changed by replacing the printed circuit board incorporating the processor. Similarly a type of peripheral bus used can be changed simply by replacing the printed circuit board containing the peripheral controller. High-density connectors connect the circuit boards. Some embodiments of the invention use a single backplane. Other embodiments place peripheral slots on a second, passive backplane.Type: GrantFiled: September 2, 1997Date of Patent: June 6, 2000Assignee: The Panda ProjectInventors: Stanford W. Crane, Jr., Maria M. Portuondo, Willard Erickson, Maurice Bizzarri
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Patent number: 5892280Abstract: A semiconductor die carrier may include an insulative substrate; an array of groups of multiple electrically conductive contacts arranged in rows and columns on the insulative substrate, wherein the groups from adjacent rows are staggered as are the groups from adjacent columns, and a portion of each group overlaps into an adjacent row or an adjacent column of the groups of the array; a semiconductor die; and structure for providing electrical connection between the semiconductor die and the conductive contacts.Type: GrantFiled: September 19, 1997Date of Patent: April 6, 1999Inventors: Stanford W. Crane, Jr., Maria M. Portuondo
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Patent number: 5824950Abstract: A semiconductor die carrier configured to be secured to a printed circuit board includes an insulative package for housing a semiconductor die. The insulative package has a top surface, a bottom surface, and a plurality of side surfaces coupling the top surface and the bottom surface. At least one row of electrically conductive leads extends from at least one of the side surfaces of the insulative package. Each of the leads has a proximal end, at least one horizontal portion extending in a horizontal direction, at least one vertical portion extending in a vertical direction, and a distal end. The distal ends of the leads are configured to be secured to the printed circuit board such that, when the distal ends of the leads are secured to the printed circuit board, at least a portion of the insulative package is located below an upper surface of the printed circuit board.Type: GrantFiled: June 7, 1995Date of Patent: October 20, 1998Assignee: The Panda ProjectInventors: Joseph M. Mosley, Maria M. Portuondo, Drew L. Taylor
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Patent number: 5819403Abstract: A semiconductor die carrier includes a plurality of electrically insulative side walls; a plurality of electrically conductive leads extending from at least one of the side walls, each of the leads being individually manufactured without use of a lead frame; a semiconductor die positioned such that the electrically conductive leads are disposed at one or more locations around the periphery of the die; and structure for providing electrical connection between the semiconductor die and corresponding ones of the electrically conductive leads.Type: GrantFiled: June 5, 1995Date of Patent: October 13, 1998Assignee: The Panda ProjectInventors: Stanford W. Crane, Jr., Maria M. Portuondo
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Patent number: 5821457Abstract: A semiconductor die carrier includes an insulative module; a plurality of electrically conductive leads extending from the insulative module; a semiconductor die housed with the insulative module; and at least one high frequency capacitor secured to the insulative module for facilitating transmission of high frequency signals carried to and from the semiconductor die on the electrically conductive leads.Type: GrantFiled: July 29, 1997Date of Patent: October 13, 1998Assignee: The Panda ProjectInventors: Joseph M. Mosley, Maria M. Portuondo
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Patent number: 5822551Abstract: A computer system includes a first passive backplane having a local bus, a memory bus, and peripheral bus. The computer system includes a first printed circuit board having a microprocessor, and connected to the local bus and to the memory bus. The computer system includes a second printed circuit board having a memory and connected to the memory bus. The computer system also includes a third printed circuit board having a peripheral controller, and connected to the local bus and to the peripheral bus The disclosed computer system further includes a second backplane. The second backplane is connected to the first passive backplane through a connector, where at least one of the local and peripheral buses extends from the first passive backplane to the second backplane through the connector. The computer system also includes a plurality of peripheral slots located on the second backplane and connected to the peripheral bus.Type: GrantFiled: June 12, 1996Date of Patent: October 13, 1998Assignee: The Panda ProjectInventors: Stanford W. Crane, Jr., Maria M. Portuondo, Willard Erickson, Maurice Bizzarri
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Patent number: 5812797Abstract: A computer system architecture in which functionally compatible electronic components are located on modular printed circuit boards. Thus, a type of processor used by the system can be changed by replacing the printed circuit board incorporating the processor. Similarly a type of peripheral bus used can be changed simply by replacing the printed circuit board containing the peripheral controller. High-density connectors connect the circuit boards. Some embodiments of the invention use a single backplane. Other embodiments place peripheral slots on a second, passive backplane.Type: GrantFiled: August 23, 1996Date of Patent: September 22, 1998Assignee: The Panda ProjectInventors: Stanford W. Crane, Jr., Maria M. Portuondo, Willard Erickson, Maurice Bizzarri
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Patent number: 5791947Abstract: An electrically conductive contact beam for use in an electrical interconnect component. The contact beam includes a stabilizing section for securing the contact beam within a support substrate, and a contact section, connected to the stabilizing section, for establishing contact between the contact beam and an electrically conductive contact from another electrical interconnect component. The contact section includes a merge radius section connecting the contact section to the stabilizing section, a flexible section connected to the merge radius section and having an elongated curvature, a contact area, disposed at an end of the curvature opposite the merge radius section, for contacting the conductive contact from the other electrical interconnect component, and a lead-in section, connected to the contact area, for initiating deflection of the contact section upon contact of the lead-in section with a portion of the other electrical interconnect component.Type: GrantFiled: June 7, 1995Date of Patent: August 11, 1998Assignee: The Panda ProjectInventors: Stanford W. Crane, Jr., Maria M. Portuondo