Patents by Inventor Mariappan Parans Paranthaman

Mariappan Parans Paranthaman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120192937
    Abstract: A thin film structure for photovoltaic applications includes a biaxially textured metal substrate; a seed layer epitaxially disposed on the metal substrate; a barrier layer comprising SrTiO3 epitaxially disposed on the seed layer; a cap layer comprising ?-Al2O3 epitaxially disposed on the SrTiO3 barrier layer; and a crystalline silicon layer epitaxially disposed on the cap layer, where the cap layer comprises a volume fraction of biaxial texture of at least about 80% and the crystalline silicon layer does not include a metal silicide phase.
    Type: Application
    Filed: January 28, 2011
    Publication date: August 2, 2012
    Inventors: Mariappan Parans Paranthaman, Sung-Hun Wee, Frederick A. List, III, Claudia Cantoni, Lee Heatherly, JR., Kyunghoon Kim, Thomas R. Fanning, Jon Bornstein
  • Patent number: 8221909
    Abstract: An electronic component that includes a substrate and a phase-separated layer supported on the substrate and a method of forming the same are disclosed. The phase-separated layer includes a first phase comprising lanthanum manganate (LMO) and a second phase selected from a metal oxide (MO), metal nitride (MN), a metal (Me), and combinations thereof. The phase-separated material can be an epitaxial layer and an upper surface of the phase-separated layer can include interfaces between the first phase and the second phase. The phase-separated layer can be supported on a buffer layer comprising a composition selected from the group consisting of IBAD MgO, LMO/IBAD-MgO, homoepi-IBAD MgO and LMO/homoepi-MgO. The electronic component can also include an electronically active layer supported on the phase-separated layer.
    Type: Grant
    Filed: November 17, 2010
    Date of Patent: July 17, 2012
    Assignee: UT-Battelle, LLC
    Inventors: Tolga Aytug, Mariappan Parans Paranthaman, Ozgur Polat
  • Publication number: 20120152337
    Abstract: A hetero-junction device and fabrication method in which phase-separated n-type and p-type semiconductor pillars define vertically-oriented p-n junctions extending above a substrate. Semiconductor materials are selected for the p-type and n-type pillars that are thermodynamically stable and substantially insoluble in one another. An epitaxial deposition process is employed to form the pillars on a nucleation layer and the mutual insolubility drives phase separation of the materials. During the epitaxial deposition process, the orientation is such that the nucleation layer initiates propagation of vertical columns resulting in a substantially ordered, three-dimensional structure throughout the deposited material.
    Type: Application
    Filed: December 21, 2010
    Publication date: June 21, 2012
    Inventors: Tolga Aytug, David K. Christen, Mariappan Parans Paranthaman, Özgur Polat
  • Publication number: 20120082904
    Abstract: Compositions and methods of making are provided for a high energy density aluminum battery. The battery comprises an anode comprising aluminum metal. The battery further comprises a cathode comprising a material capable of intercalating aluminum ions during a discharge cycle and deintercalating the aluminum ions during a charge cycle. The battery further comprises an electrolyte capable of supporting reversible deposition and stripping of aluminum at the anode, and reversible intercalation and deintercalation of aluminum at the cathode.
    Type: Application
    Filed: September 30, 2010
    Publication date: April 5, 2012
    Inventors: Gilbert M. Brown, Mariappan Parans Paranthaman, Sheng Dai, Nancy J. Dudney, Arumugan Manthiram, Timothy J. Mclntyre, Xiago-Guang Sun
  • Publication number: 20120082905
    Abstract: Compositions and methods of making are provided for a high energy density aluminum battery. The battery comprises an anode comprising aluminum metal. The battery further comprises a cathode comprising a material capable of intercalating aluminum or lithium ions during a discharge cycle and deintercalating the aluminum or lithium ions during a charge cycle. The battery further comprises an electrolyte capable of supporting reversible deposition and stripping of aluminum at the anode, and reversible intercalation and deintercalation of aluminum or lithium at the cathode.
    Type: Application
    Filed: September 28, 2011
    Publication date: April 5, 2012
    Inventors: Gilbert M. Brown, Mariappan Parans Paranthaman, Sheng Dai, Nancy J. Dudney, Arumugan Manthiram, Timothy J. McIntyre, Xiago-Guang Sun, Hansan Liu
  • Publication number: 20120035056
    Abstract: A method of making a superconducting article that involves using MOCVD to deposit onto a uniaxially or biaxially textured surface an epitaxial layer that includes a superconducting material such as REBa2Cu3O7 and a secondary phase comprising at least one dopant, the dopant including Nb, Ta and/or V, or combinations thereof.
    Type: Application
    Filed: August 4, 2010
    Publication date: February 9, 2012
    Inventors: TOLGA AYTUG, Mariappan Parans Paranthaman, Victor A. Maroni, Dean J. Miller
  • Patent number: 8088503
    Abstract: A superconducting article includes a substrate having an untextured metal surface; an untextured barrier layer of La2Zr2O7 or Gd2Zr2O7 supported by and in contact with the surface of the substrate; a biaxially textured buffer layer supported by the untextured barrier layer; and a biaxially textured superconducting layer supported by the biaxially textured buffer layer. Moreover, a method of forming a buffer layer on a metal substrate includes the steps of: providing a substrate having an untextured metal surface; coating the surface of the substrate with a barrier layer precursor; converting the precursor to an untextured barrier layer; and depositing a biaxially textured buffer layer above and supported by the untextured barrier layer.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: January 3, 2012
    Assignees: UT-Battelle, LLC, The Regents of the University of California
    Inventors: Mariappan Parans Paranthaman, Srivatsan Sathyamurthy, Tolga Aytug, Paul N Arendt, Liliana Stan, Stephen R Foltyn
  • Publication number: 20110308615
    Abstract: Crystal silicon processes and products (100) are disclosed. In any exemplary embodiment, a biaxially textured metal substrate (110) was fabricated by the Rolling-Assisted Biaxially Textured Substrate (RABiTS) process. Electron beam evaporation was used to grow buffer layers (120) heteroepitaxially on the metal substrate (110) as a buffer layer (120). After growth of the buffer layer (120), a silicon layer was grown using hot wire chemical vapor deposition (HWCVD). The silicon film had the same grain size as the underlying metal substrate (110). In addition, the orientation of these grains matched the orientations of the underlying metal substrate (110).
    Type: Application
    Filed: February 12, 2009
    Publication date: December 22, 2011
    Applicant: ALLIANCE FOR SUSTAINABLE ENERGY, LLC
    Inventors: Charles W. Teplin, Howard M Branz, Lee Heatherly, Mariappan Parans Paranthaman
  • Publication number: 20110160065
    Abstract: An electronic component that includes a substrate and a phase-separated layer supported on the substrate and a method of forming the same are disclosed. The phase-separated layer includes a first phase comprising lanthanum manganate (LMO) and a second phase selected from a metal oxide (MO), metal nitride (MN), a metal (Me), and combinations thereof. The phase-separated material can be an epitaxial layer and an upper surface of the phase-separated layer can include interfaces between the first phase and the second phase. The phase-separated layer can be supported on a buffer layer comprising a composition selected from the group consisting of IBAD MgO, LMO/IBAD-MgO, homoepi-IBAD MgO and LMO/homoepi-MgO. The electronic component can also include an electronically active layer supported on the phase-separated layer.
    Type: Application
    Filed: November 17, 2010
    Publication date: June 30, 2011
    Applicant: UT-Battelle, LLC
    Inventors: Tolga Aytug, Mariappan Parans Paranthaman, Ozgur Polat
  • Publication number: 20110160066
    Abstract: The present invention relates to a method for producing a phase-separated layer useful as a flux pinning substrate for a superconducting film, wherein the method includes subjecting at least a first and a second target material to a sputtering deposition technique in order that a phase-separated layer is deposited epitaxially on a primary substrate containing an ordered surface layer. The invention is also directed to a method for producing a superconducting tape containing pinning defects therein by depositing a superconducting film on a phase-separated layer produced by the method described above.
    Type: Application
    Filed: December 29, 2009
    Publication date: June 30, 2011
    Applicant: UT-BATTELLE, LLC
    Inventors: Tolga Aytug, Mariappan Parans Paranthaman, Ozgur Polat
  • Patent number: 7683010
    Abstract: A laminated conductor includes a metallic substrate having a surface, a biaxially textured buffer layer supported by the surface of the substrate, the biaxially textured buffer layer comprising LZO and a dopant for mitigating metal diffusion through the LZO, and a biaxially textured conductor layer supported by the biaxially textured buffer layer.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: March 23, 2010
    Assignee: UT-Battelle, LLC
    Inventors: Mariappan Parans Paranthaman, Urs Schoop, Amit Goyal, Cornelis Leo Hans Thieme, Darren T. Verebelyi, Martin W. Rupich
  • Patent number: 7553799
    Abstract: A superconducting article includes a substrate having an untextured metal surface; an untextured barrier layer of La2Zr2O7 or Gd2Zr2O7 supported by and in contact with the surface of the substrate; a biaxially textured buffer layer supported by the untextured barrier layer; and a biaxially textured superconducting layer supported by the biaxially textured buffer layer. Moreover, a method of forming a buffer layer on a metal substrate includes the steps of: providing a substrate having an untextured metal surface; coating the surface of the substrate with a barrier layer precursor; converting the precursor to an untextured barrier layer; and depositing a biaxially textured buffer layer above and supported by the untextured barrier layer.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: June 30, 2009
    Assignee: UT-Battelle, LLC
    Inventors: Mariappan Parans Paranthaman, Srivatsan Sathyamurthy, Tolga Aytug, Paul N. Arendt, Liliana Stan, Stephen R. Foltyn
  • Publication number: 20090137401
    Abstract: A superconducting article includes a substrate having an untextured metal surface; an untextured barrier layer of La2Zr2O7 or Gd2Zr2O7 supported by and in contact with the surface of the substrate; a biaxially textured buffer layer supported by the untextured barrier layer; and a biaxially textured superconducting layer supported by the biaxially textured buffer layer. Moreover, a method of forming a buffer layer on a metal substrate includes the steps of: providing a substrate having an untextured metal surface; coating the surface of the substrate with a barrier layer precursor; converting the precursor to an untextured barrier layer; and depositing a biaxially textured buffer layer above and supported by the untextured barrier layer.
    Type: Application
    Filed: January 30, 2009
    Publication date: May 28, 2009
    Applicant: UT-BATTELLE, LLC
    Inventors: Mariappan Parans Paranthaman, Srivatsan Sathyamurthy, Tolga Aytug, Paul N. Arendt, Liliana Stan, Stephen R. Foltyn
  • Patent number: 7258928
    Abstract: A laminated conductor includes a metallic substrate having a surface, a biaxially textured buffer layer supported by the surface of the metallic substrate, the biaxially textured buffer layer comprising Y2O3 and a dopant for blocking cation diffusion through the Y2O3, and a biaxially textured conductor layer supported by the biaxially textured buffer layer.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: August 21, 2007
    Assignees: UT-Battelle, LLC, American Superconductor
    Inventors: Mariappan Parans Paranthaman, Urs Schoop, Amit Goyal, Cornelis Leo Hans Thieme, Darren T. Verebelyi, Martin W. Rupich