Abstract: A method forms an integrated circuit structure, using a manufacturing device, to have kerf regions and external contacts, and to have conductive structures in the kerf regions. The method also forms an underfill material on a surface of the integrated circuit structure, using the manufacturing device, that contacts the kerf regions and the external contacts. The underfill material comprises electrically attracted filler particles that affect the coefficient of thermal expansion and elastic modulus of the underfill material. When forming the underfill material, the method applies an electrical charge to the conductive structures and the external contacts.

Abstract: Underfill flow guide structures and methods of using the same are provided with a module. In particular the underfill flow guide structures are integrated with a substrate and are configured to prevent air entrapment from occurring during capillary underfill processes.

Abstract: Underfill flow guide structures and methods of using the same are provided with a module. In particular the underfill flow guide structures are integrated with a substrate and are configured to prevent air entrapment from occurring during capillary underfill processes.

Abstract: Embodiments of the invention provide a semiconductor chip having a passivation layer extending along a surface of a semiconductor substrate to an edge of the semiconductor substrate, and methods for their formation. One aspect of the invention provides a semiconductor chip comprising: a semiconductor substrate; a passivation layer including a photosensitive polyimide disposed along a surface of the semiconductor substrate and extending to at least one edge of the semiconductor substrate; and a channel extending through the passivation layer to the surface of the semiconductor substrate.

Abstract: A structure and method for producing the same is disclosed. The structure includes an organic passivation layer with solids suspended therein. Preferential etch to remove a portion of the organic material and expose portions of such solids creates enhanced surface roughness, which provides a significant advantage with respect to adhesion of that passivation layer to the packaging underfill material.

Abstract: Underfill flow guide structures and methods of using the same are provided with a module. In particular the underfill flow guide structures are integrated with a substrate and are configured to prevent air entrapment from occurring during capillary underfill processes.

Abstract: A method, mold and apparatus for encapsulating and underfilling an integrated circuit chip assembly. The mold has a first portion and a second portion with the first portion having first and second cavities and at least one channel interconnecting the first and second cavities. The first cavity is adapted to enclose the integrated circuit chip on the substrate. A clamping force is applied to the first and second portions of the mold to clamp the substrate between them with the integrated circuit chip located in the first cavity. Vents exhaust air from the first cavity. Encapsulant is injected into the first cavity of the first portion at a location in the first portion remote from the point of connection of the channel such that encapsulant flows around and underneath the integrated circuit chip and through the channel into the second cavity to thereby underfill and encapsulate the integrated circuit assembly.

Abstract: A method, mold and apparatus for encapsulating and underfilling an integrated circuit chip assembly. The mold has a first portion and a second portion with the first portion having first and second cavities and at least one channel interconnecting said first and second cavities. The first cavity is adapted to enclose said integrated circuit chip on said substrate. A clamping force is applied to the first and second portions of the mold to clamp the substrate between them with the integrated circuit chip located in the first cavity. Vents exhaust air from the first cavity. Encapsulant is injected into the first cavity of the first portion at a location in the first portion remote from the point of connection of the channel such that encapsulant flows around and underneath the integrated circuit chip and through the channel into the second cavity to thereby underfill and encapsulate the integrated circuit assembly.

Abstract: A method, mold and apparatus for encapsulating and underfilling an integrated circuit chip assembly. The mold has a first portion and a second portion with the first portion having first and second cavities and at least one channel interconnecting said first and second cavities. The first cavity is adapted to enclose said integrated circuit chip on said substrate. A clamping force is applied to the first and second portions of the mold to clamp the substrate between them with the integrated circuit chip located in the first cavity. Vents exhaust air from the first cavity. Encapsulant is injected into the first cavity of the first portion at a location in the first portion remote from the point of connection of the channel such that encapsulant flows around and underneath the integrated circuit chip and through the channel into the second cavity to thereby underfill and encapsulate the integrated circuit assembly.

Abstract: A method, mold and apparatus for encapsulating and underfilling an integrated circuit chip assembly. The mold has a first portion and a second portion with the first portion having first and second cavities and at least one channel interconnecting said first and second cavities. The first cavity is adapted to enclose said integrated circuit chip on said substrate. A clamping force is applied to the first and second portions of the mold to clamp the substrate between them with the integrated circuit chip located in the first cavity. Vents exhaust air from the first cavity. Encapsulant is injected into the first cavity of the first portion at a location in the first portion remote from the point of connection of the channel such that encapsulant flows around and underneath the integrated circuit chip and through the channel into the second cavity to thereby underfill and encapsulate the integrated circuit assembly.

Abstract: There is provided a method, mold and apparatus for encapsulating and underfilling an integrated circuit chip assembly including an integrated circuit chip mounted on a substrate in a standoff relationship. The mold has a first portion and a second portion with the first portion having first and second cavities and at least one channel interconnecting said first and second cavities. The first cavity is adapted to enclose said integrated circuit chip on said substrate. Means, e.g., a clamp, applies a clamping force to the first and the second portions of the mold to clamp the substrate between the first and second portions with the integrated circuit chip located in the first cavity. Vent means exhausts air from the first cavity.

Abstract: There is provided a method, mold and apparatus for encapsulating and underfilling an integrated circuit chip assembly including an integrated circuit chip mounted on a substrate in a standoff relationship. The mold has a first portion and a second portion with the first portion having first and second cavities and at least one channel interconnecting said first and second cavities. The first cavity is adapted to enclose said integrated circuit chip on said substrate. Means, e.g., a clamp, applies a clamping force to the first and the second portions of the mold to clamp the substrate between the first and second portions with the integrated circuit chip located in the first cavity. Vent means exhausts air from the first cavity.