Patents by Inventor Mario I. Wolczko

Mario I. Wolczko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7631024
    Abstract: A method and a system for facilitating garbage collection (GC) operations in a memory-management system that supports both mark-sweep (MS) objects and reference-counted (RC) objects, wherein objects which are frequently modified are classified as MS objects, and objects which are infrequently modified are classified as RC objects. During a marking phase of a GC operation, the system identifies a set of root objects and then marks referents of the root objects. The system then recursively traverses referents of the root objects which are MS objects and while doing so, marks referents of the traversed MS objects. However, if an RC object is encountered during the traversal of an MS object, the system marks the RC object but does not recursively traverse the RC object. In doing so, the system avoids traversing a large number of RC objects which are infrequently modified.
    Type: Grant
    Filed: January 3, 2006
    Date of Patent: December 8, 2009
    Assignee: Sun Microsystems, Inc.
    Inventors: Gregory M. Wright, Mario I. Wolczko, Matthew L. Seidl
  • Publication number: 20090089767
    Abstract: A method for implementing a just-in-time compiler involves obtaining high-level code templates in a high-level programming language, where the high-level programming language is designed for compilation to an intermediate language capable of execution by a virtual machine, and where each high-level code template represents an instruction in the intermediate language. The method further involves compiling the high-level code templates to native code to obtain optimized native code templates, where compiling the high-level code templates is performed, prior to runtime, using an optimizing static compiler designed for runtime use with the virtual machine. The method further involves implementing the just-in-time compiler using the optimized native code templates, where the just-in-time compiler is configured to substitute an optimized native code template when a corresponding instruction in the intermediate language is encountered at runtime.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Laurent Daynes, Bernd J. Mathiske, Gregory M. Wright, Mario I. Wolczko
  • Patent number: 7483930
    Abstract: One embodiment of the present invention provides a system that facilitates identifying roots for a garbage-collection operation in a computer system that supports an object-addressed memory hierarchy. In order to identify roots, the system first looks up an object table entry that corresponds to an object in an object cache, wherein the object table entry contains an evicted bit, which is set when any part of the modified object is evicted from the object cache, and a corresponding physical address for the object in main memory. Next, the system determines if the evicted bit is set in the object table entry, and if so, examines the object corresponding to the object table entry to determine if the object contains references to the target area in the object heap that is being garbage collected. If so, the system uses the references as roots for a subsequent garbage-collection operation of the target area.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: January 27, 2009
    Assignee: Sun Microsystems, Inc.
    Inventors: Gregory M. Wright, Matthew L. Seidl, Mario I. Wolczko
  • Patent number: 7421539
    Abstract: A method for concurrent garbage collection and mutator execution in a computer system includes scanning a first cache line for a non-local bit. The non-local bit is associated with a root object. A done bit associated with the first cache line is set. A second cache line to find a first object that is referenced by the root object is located. A mark bit and the done bit associated with the second cache line are set. The first and second cache lines are scanned for unset done bits. If an unset done bit is detected in either the first or the second cache line, then the cache line associated with the unset done bit is rescanned to determine whether there are any modified object references.
    Type: Grant
    Filed: May 18, 2004
    Date of Patent: September 2, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Matthew L. Seidl, Gregory M. Wright, Mario I. Wolczko
  • Publication number: 20080127072
    Abstract: In general, in one aspect, the invention relates to a computer readable medium comprising executable instructions for verifying generation of an intermediate representation (IR). The generation of the IR is verified by generating the IR from source code and interpreting the IR to obtain an interpretation result. Interpreting the IR includes encountering a method call in the IR, locating an execution unit corresponding to the method call, executing the execution unit to obtain an execution result, replacing a portion of the IR with the execution result to obtain a reduced IR, and obtaining the interpretation result from the reduced IR. Finally, the interpretation result is compared to an expected result of the source code, wherein the generation of the IR is verified if the interpretation result equals the expected result.
    Type: Application
    Filed: September 7, 2006
    Publication date: May 29, 2008
    Applicant: Sun Microsystems, Inc.
    Inventors: Bernd J.W. Mathiske, David M. Ungar, Mario I. Wolczko, Gregory M. Wright, Matthew L. Seidl
  • Patent number: 7340666
    Abstract: A system for improving a memory's error detecting and error correcting capabilities. During operation, the system receives a data-word. Next, the system compresses the data-word into a compressed-word. If the amount of compression is greater than or equal to a compression-threshold, the system applies a strong error-correcting-code to the compressed-word to generate a coded-word. On the other hand, if the amount of compression is less than the compression-threshold, the system applies a weak error-correcting-code to the data-word to generate a coded-word. In either case the size of the coded-word is less than or equal to the size of a storage-word. The system then generates a flag that indicates the type of error-correcting code that was used to generate the coded-word. The system then stores the flag along with the coded-word in the memory.
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: March 4, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Gregory M. Wright, Mario I. Wolczko
  • Patent number: 7325106
    Abstract: A low overhead method for identifying memory leaks is provided. The low overhead method includes a) detecting completion of a garbage collection cycle; and b) identifying a boundary between used objects in memory and free memory space. The steps of a) and b) are repeated and then it is determined if there is an existing memory leak based upon evaluation of boundary identifiers. A computer readable media and a system for identifying memory leaks for an object-oriented application are also provided.
    Type: Grant
    Filed: July 16, 2004
    Date of Patent: January 29, 2008
    Assignee: Sun Microsystems, Inc.
    Inventors: Mikhail A. Dmitriev, Mario I. Wolczko
  • Patent number: 7269705
    Abstract: A method for pre-allocating memory for object-based cache data is provided in which request for an object having an associated property parameter that defines the memory requirements for the object. In response, a table of allocation buckets is searched for a bucket having the associated property parameter that can at least meet the memory requirements for the requested object. If an object identifier (OID), having a previously allocated physical address in main memory, is identified in the table of allocation buckets then the identified OID is assigned to the object. The object is stored in the object cache with the assigned OID, and the OID is removed from the bucket. Also included is a table of allocation buckets in a computer system in which each of a plurality of buckets is capable of holding object identifiers (OIDs).
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: September 11, 2007
    Inventors: Matthew L. Seidl, Gregory M. Wright, Mario I. Wolczko
  • Patent number: 7249225
    Abstract: One embodiment of the present invention provides a system that supports read-only objects within an object-addressed memory hierarchy. During operation, the system receives a request to access an object, wherein the request includes an object identifier for the object that is used to reference the object within the object-addressed memory hierarchy. In response to this request, the system uses the object identifier to retrieve an object table entry associated with the object. If the request is a write request, the system examines a read-only indicator within the object table entry. If this read-only indicator specifies that the object is a read-only object, the system performs a corrective action to deal with the fact that the write request is directed to a read-only object.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: July 24, 2007
    Assignee: Sun Microsystems, Inc
    Inventors: Matthew L. Seidl, Gregory M. Wright, Mario I. Wolczko
  • Patent number: 7246141
    Abstract: One embodiment of the present invention facilitates skewing a bi-directional object layout to provide good cache behavior. During operation, the system receives a request to access an object. This request includes an object identifier and an object offset that specifies the offset of a target field within the object, wherein the object has a bi-directional layout that locates scalar fields at positive offsets and reference fields at negative offsets, so that a reference field can be immediately identified from its object offset. Next, the system determines a skew value for a cache line containing the object, wherein data within the cache line is shifted based upon the skew value, so that reference fields with small negative offsets are likely to be located in the same cache line as scalar fields with small positive offsets. Next, the system uses the skew value in accessing the object.
    Type: Grant
    Filed: January 2, 2003
    Date of Patent: July 17, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Mario I. Wolczko, Matthew L. Seidl, Gregory M. Wright
  • Patent number: 7171540
    Abstract: One embodiment of the present invention provides an object-addressed memory hierarchy that is able to access objects stored outside of main memory. During operation, the system receives a request to access an object, wherein the request includes an object identifier for the object that is used to reference the object within the object-addressed memory hierarchy. Next, the system uses the object identifier to retrieve an object table entry associated with the object. The system then examines a valid bit within the object table entry. If the valid bit indicates the object is located in main memory, the system uses a physical address in the object table entry to access the object in main memory. On the other hand, if the valid bit indicates that the object is not located in main memory, the system relocates the object into memory from a location outside of memory, and then accesses the object in main memory.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: January 30, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Matthew L. Seidl, Gregory M. Wright, Mario I. Wolczko
  • Patent number: 7167956
    Abstract: One embodiment of the present invention provides a system that avoids inconsistencies between multiple translators in an object-addressed memory hierarchy. This object-addressed memory hierarchy includes an object cache, which supports references to object cache lines based on object identifiers instead of physical addresses. During operation, the system receives a read-to-share (RTS) signal for an object cache line, wherein the RTS signal is received from a requesting processor as part of a cache-coherence operation. If no processor owns the object cache line, the system causes the requesting processor to become the owner of the object cache line instead of merely holding a copy the object cache line in the shared state.
    Type: Grant
    Filed: May 3, 2004
    Date of Patent: January 23, 2007
    Assignee: Sun Microsystems, Inc.
    Inventors: Gregory M. Wright, Mario I. Wolczko
  • Patent number: 7036112
    Abstract: One embodiment of the present invention provides a system that facilitates implementing multi-mode specification-driven disassembler. During operation, the disassembler receives a machine-code version of a computer program. In order to disassemble a specific machine-code instruction from this machine-code version, the system compares the machine-code instruction against a set of instruction templates for assembly code instructions to identify a set of matching templates. Next, the system selects a matching template from the set of matching templates based on the state of a mode variable, which indicates a specificity mode for the disassembler. The system then disassembles the machine-code instruction using the operand fields defined by the matching template to produce a corresponding assembly code instruction.
    Type: Grant
    Filed: August 16, 2002
    Date of Patent: April 25, 2006
    Assignee: SUN Microsystems, Inc.
    Inventors: David M. Ungar, Mario I. Wolczko, Bernd J. W. Mathiske
  • Patent number: 6993761
    Abstract: One embodiment of the present invention provides a system for verifying type safety of an application snapshot. This application snapshot includes a state of an executing program that is moved from a first computing device to a second computing device across a network in order to continue execution on the second computing device. The system operates by receiving the application snapshot from the first computing device on the second computing device, wherein the application snapshot includes a subprogram, an operand stack, and a point of execution. The system then examines the application snapshot to identify one or more subprograms and the point of execution within the subprograms. Next, the system examines the subprogram to determine an expected structure of the operand stack at the point of execution.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: January 31, 2006
    Assignee: SUN Microsystems, Inc.
    Inventors: Grzegorz J. Czajkowski, Mario I. Wolczko
  • Patent number: 6950838
    Abstract: A computer system providing hardware states for garbage collection including a plurality of processors, an object cache operatively connected to at least one of the plurality of processors, and a warden operatively connected to the object cache, wherein the warden broadcasts a non-local command to the object cache whenever the tagged cache line is evicted and crosses the garbage collection boundary and the modified-reference bit in the tagged cache line is set.
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: September 27, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Gregory M. Wright, Mario I. Wolczko, Matthew L. Seidl
  • Patent number: 6934827
    Abstract: One embodiment of the present invention provides a system that facilitates avoiding collisions between cache lines containing objects and cache lines containing corresponding object table entries. During operation, the system receives an object identifier for an object, wherein the object identifier is used to address the object in an object-addressed memory hierarchy. The system then applies a mapping function to the object identifier to compute an address for a corresponding object table entry associated with the object, wherein the mapping function ensures that a cache line containing the object table entry does not collide with a cache line containing the object.
    Type: Grant
    Filed: March 13, 2003
    Date of Patent: August 23, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Gregory M. Wright, Mario I. Wolczko, Matthew L. Seidl
  • Patent number: 6931504
    Abstract: One embodiment of the present invention provides a system that facilitates relocating an object in a computer system that provides an object-addressed memory hierarchy. During operation, the system receives a new address specifying to where the object is to be relocated in main memory. The system then retrieves an object table entry associated with the object. This object table entry contains a current address for the object, which is used to translate an object identifier for the object into a corresponding physical address for the object in main memory. Next, the system clears an evicted indicator from the object table entry, wherein the evicted indicator is set whenever the object is modified in main memory. The system then copies the object from the current address to the new address. After copying is complete, the system performs an atomic operation that swaps the current address in the object table entry with the new address if the evicted indicator remains clear.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: August 16, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Mario I. Wolczko, Matthew L. Seidl, Gregory M. Wright
  • Patent number: 6859868
    Abstract: A computer system including a processor, an object cache operatively connected to the processor, a memory, and a translator interposed between the object cache and the memory, wherein the translator maps an object address to a physical address within the memory.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: February 22, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Gregory M. Wright, Mario I. Wolczko, Matthew L. Seidl
  • Patent number: 6834391
    Abstract: One embodiment of the present invention provides a system that facilitates automated isolation of native code within a computer program that has been compiled to a platform-independent code. The system operates by receiving a library containing a native code sub-routine that provides a service to the computer program. The system analyzes the library to determine the symbol name for the native code sub-routine. A proxy sub-routine is generated for each native code sub-routine exported by the native library that forms a link to the native code sub-routine. This proxy sub-routine is placed into a new library using the original name of the native code sub-routine. The system runs the native code sub-routine in one process, and executes the platform-independent code in a separate process. The system invokes the native code sub-routine in the first process by calling the proxy sub-routine from the platform-independent code in the second process.
    Type: Grant
    Filed: April 24, 2001
    Date of Patent: December 21, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Gregorz J. Czajkowski, Laurent P. Daynes, Mario I. Wolczko
  • Publication number: 20040225849
    Abstract: One embodiment of the present invention provides a system that facilitates relocating an object in a computer system that provides an object-addressed memory hierarchy. During operation, the system receives a new address specifying to where the object is to be relocated in main memory. The system then retrieves an object table entry associated with the object. This object table entry contains a current address for the object, which is used to translate an object identifier for the object into a corresponding physical address for the object in main memory. Next, the system clears an evicted indicator from the object table entry, wherein the evicted indicator is set whenever the object is modified in main memory. The system then copies the object from the current address to the new address. After copying is complete, the system performs an atomic operation that swaps the current address in the object table entry with the new address if the evicted indicator remains clear.
    Type: Application
    Filed: May 6, 2003
    Publication date: November 11, 2004
    Inventors: Mario I. Wolczko, Matthew L. Seidl, Gregory M. Wright