Patents by Inventor Marjan Radi

Marjan Radi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220191306
    Abstract: A programmable network interface for a server includes at least one memory storing connection parameters for previously active Non-Volatile Memory express over Fabric (NVMeoF) connections with different NVMe nodes. An NVMeoF connection request is received from an NVMe node, and it is determined whether the NVMe node is associated with connection parameters stored in the at least one memory. In response to determining that the NVMe node is associated with connection parameters stored in the at least one memory, a new NVMeoF connection is established for communicating with the NVMe node using the stored connection parameters. In one aspect, an address space of the server is partitioned, and an NVMe request queue is assigned to each partition of the address space. At least one address is identified in a received NVMeoF message, and an NVMe request queue is determined for performing an NVMe request included in the NVMeoF message.
    Type: Application
    Filed: February 10, 2021
    Publication date: June 16, 2022
    Inventors: Marjan Radi, Dejan Vucinic
  • Patent number: 11360899
    Abstract: A programmable switch includes a plurality of ports for communication with devices on a network. Circuitry of the programmable switch is configured to receive a cache line request from a client on the network to obtain a cache line for performing an operation by the client. A port is identified for communicating with a memory device storing the cache line. The memory device is one of a plurality of memory devices used for a distributed cache. The circuitry is further configured to update a cache directory for the distributed cache based on the cache line request, and send the cache line request to the memory device using the identified port. In one aspect, it is determined whether the cache line request is for modifying the cache line.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: June 14, 2022
    Assignee: Western Digital Technologies, Inc.
    Inventors: Marjan Radi, Dejan Vucinic
  • Publication number: 20220052970
    Abstract: A programmable switch includes a plurality of ports for communicating with devices on a network. Circuitry of the programmable switch is configured to receive a series of related messages from a first device on the network via at least one port, and determine whether one or more messages of the series of related messages have been received out-of-order based at least in part on a sequence number included in the one or more messages. The series of related messages are sent by the programmable switch to a second device via one or more ports in an order indicated by sequence numbers included in the series of related messages by delaying at least one message. According to one aspect, a network controller selects a programmable switch between the first device and the second device to serve as a message sequencer for reordering out-of-order messages using a stored network topology.
    Type: Application
    Filed: February 12, 2021
    Publication date: February 17, 2022
    Inventors: Marjan Radi, Dejan Vucinic
  • Publication number: 20210409506
    Abstract: A programmable switch includes ports, and circuitry to receive cache messages for a distributed cache from client devices. The cache messages are queued for sending to memory devices from the ports. Queue occupancy information is generated and sent to a controller that determines, based at least in part on the queue occupancy information, at least one of a cache message transmission rate for a client device, and one or more weights for the queues used by the programmable switch. In another aspect, the programmable switch extracts cache request information from a cache message. The cache request information indicates a cache usage and is sent to the controller, which determines, based at least in part on the extracted cache request information, at least one of a cache message transmission rate for a client device, and one or more weights for queues used in determining an order for sending cache messages.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 30, 2021
    Inventors: Marjan Radi, Dejan Vucinic
  • Publication number: 20210406191
    Abstract: A programmable switch includes at least one memory configured to store a cache directory for a distributed cache, and circuitry configured to receive a cache line request from a client device to obtain a cache line. The cache directory is updated based on the received cache line request, and the cache line request is sent to a memory device to obtain the requested cache line. An indication of the cache directory update is sent to a controller for the distributed cache to update a global cache directory. In one aspect, the controller sends at least one additional indication of the update to at least one other programmable switch to update at least one backup cache directory stored at the at least one other programmable switch.
    Type: Application
    Filed: June 30, 2020
    Publication date: December 30, 2021
    Inventors: Marjan Radi, Dejan Vucinic
  • Publication number: 20200349080
    Abstract: A programmable switch receives a cache line request from a client of a plurality of clients on a network to obtain a cache line. One or more additional cache lines are identified based on the received cache line request and prefetch information. The cache line and the one or more additional cache lines are requested from one or more memory devices on the network. The requested cache line and the one or more additional cache lines are received from the one or more memory devices, and are sent to the client.
    Type: Application
    Filed: August 22, 2019
    Publication date: November 5, 2020
    Inventors: Marjan Radi, Dejan Vucinic
  • Publication number: 20200351370
    Abstract: A programmable switch includes a plurality of ports for communication with devices on a network. Circuitry of the programmable switch is configured to receive a cache line request from a client on the network to obtain a cache line for performing an operation by the client. A port is identified for communicating with a memory device storing the cache line. The memory device is one of a plurality of memory devices used for a distributed cache. The circuitry is further configured to update a cache directory for the distributed cache based on the cache line request, and send the cache line request to the memory device using the identified port. In one aspect, it is determined whether the cache line request is for modifying the cache line.
    Type: Application
    Filed: November 26, 2019
    Publication date: November 5, 2020
    Inventors: Marjan Radi, Dejan Vucinic