Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.

Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.

Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.

Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.

Abstract: A diffusive memristor device and an electronic device for emulating a biological synapse are disclosed. The diffusive memristor device includes a bottom electrode, a top electrode formed opposite the bottom electrode, and a dielectric layer disposed between the top electrode and the bottom electrode. The dielectric layer comprises silver doped silicon oxynitride (SiOxNy:Ag). In an alternate implementation, the dielectric layer comprises silver doped silicon oxide (Ag:SiO2). An electronic synapse emulation device is also disclosed. The synapse emulation device includes a diffusive memristor device, a drift memristor device connected in series with the diffusive memristor device, a first voltage pulse generator connected to the diffusive memristor device, and a second voltage pulse generator connected to the drift memristor device. Application of a signal from one of the first voltage pulse generator or the second voltage pulse generator allows the synapse emulation device to exhibit long-term plasticity.

Abstract: A diffusive memristor device and an electronic device for emulating a biological synapse are disclosed. The diffusive memristor device includes a bottom electrode, a top electrode formed opposite the bottom electrode, and a dielectric layer disposed between the top electrode and the bottom electrode. The dielectric layer comprises silver doped silicon oxynitride (SiOxNy:Ag). In an alternate implementation, the dielectric layer comprises silver doped silicon oxide (Ag:SiO2). An electronic synapse emulation device is also disclosed. The synapse emulation device includes a diffusive memristor device, a drift memristor device connected in series with the diffusive memristor device, a first voltage pulse generator connected to the diffusive memristor device, and a second voltage pulse generator connected to the drift memristor device. Application of a signal from one of the first voltage pulse generator or the second voltage pulse generator allows the synapse emulation device to exhibit long-term plasticity.

Abstract: A method for configuring the features of an integrated circuit. In the method, the integrated circuit receives a feature vector message from a first party. The feature vector message is included in a response to a feature set request from the first party to a second party. The integrated circuit configures at least one feature of the integrated circuit based on a feature vector in the feature vector message. The integrated circuit generates an attestation result based on the at least one configured feature of the integrated circuit and using a key securely stored in the integrated circuit and known to the second party and not known to the first party. The integrated circuit forwards the attestation result to the first party.

Abstract: A diffusive memristor device and an electronic device for emulating a biological neuron is disclosed. The diffusive memristor device includes a bottom electrode, a top electrode formed opposite the bottom electrode, and a dielectric layer disposed between the top electrode and the bottom electrode. The dielectric layer comprises an oxide doped with a metal.

Abstract: A battery system monitor includes cell measurement circuits (CMCs) that each measure a voltage at or current through a pair of terminals of a respective associated battery module from among a plurality of plurality of battery modules in a battery system. Wireless communication transceivers (WCTs), each associated with a different CMC, transmit voltage or current measurement information of the associated CMC across a wireless communication link. A controller receives the voltage or current measurement information from the wireless communication transceivers for monitoring the state of operation of the battery system. Battery system monitoring is improved through synchronization of clocks in different CMCs or WCTs to enable synchronous sampling of multiple battery modules, through systems for determining relative positions of battery modules in a series coupling of battery modules between terminals of the battery system, and through improvements to the reliability of wireless communication.

Abstract: Systems, apparatuses, and methods for treating native heart valves are disclosed herein. A system for delivering a prosthetic device into a heart of a patient includes an elongated catheter body and a delivery capsule. The delivery capsule can be hydraulically driven to deploy at least a portion of a prosthetic heart valve device. The delivery capsule can release the prosthetic heart valve device at a desired treatment site in a patient.

Abstract: A texture tool comprising a body to which is coupled an upper cap and a lower cap. A ball holder fits in a socket defined by the body and the lower cap. The ball holder includes a plurality of balls which come into contact with a sheet of material to be embossed or imprinted.

Abstract: A texture tool comprising a body to which is coupled an upper cap and a lower cap. A ball holder fits in a socket defined by the body and the lower cap. The ball holder includes a plurality of balls which come into contact with a sheet of material to be embossed or imprinted.

Abstract: A texture tool comprising a body to which is coupled an upper cap and a lower cap. A ball holder fits in a socket defined by the body and the lower cap. The ball holder includes a plurality of balls which come into contact with a sheet of material to be embossed or imprinted.