Abstract: A method of determining the result of an assay in a microfluidic device includes the steps of: dispensing a sample droplet onto a first portion of an electrode array of the microfluidic device; dispensing a reagent droplet onto a second portion of the electrode array of the microfluidic device; controlling actuation voltages applied to the electrode array to mix the sample droplet and the reagent droplet into a product droplet; sensing a dynamic property of the product droplet; and determining an assay of the sample droplet based on the sensed dynamic property. The dynamic property is a physical property of the product droplet that influences a transport property of the product droplet on the electrode array. Example dynamic properties of the product droplet include the moveable state, split-able state, and viscosity based on droplet properties. The method may be used to perform an amoebocyte lysate (LAL) assay.

Abstract: In order to accelerate the response of buck converters to load transients buck converters having asymmetric phase designs having a load step detection are used. When a relatively large and fast load step is detected, the clock frequency of “fast” valley mode phases is reduced, which are populated with fast, low value inductors. The clock frequency is returned to its normal rate when the current in the “slow” phases has reached a suitable level.

Abstract: A multiple output comparator compares a first input signal and a second input signal. An output mirror circuit receives the comparison and sets an output signal at a first output terminal of the multiple output comparator to a digital state indicating that the magnitude of the is greater than or lesser than the second signal. An offset generator creates an offset signal for adjusting a threshold signal level at the output mirror circuit such that the difference of the and the second signal is combined with the offset signal. The output mirror circuit transfers provides a digital state to another output terminal indicating that the is greater than or lesser than the second signal as adjusted by the adjustment signal.

Abstract: A hysteretic mode control circuit within a DC-to-DC converter is configured for varying the current limit that controls the switching interval and duration of a power switching section of the DC-to-DC converter to permit the DC-to-DC converter to manage large changes in output current load of the DC-to-DC converter. The hysteretic mode control circuit has a positive and a negative current limit section that develop a first and a second reference signal for turning on and turning off the first and the second switching device. The first and second reference signals are compared to an output voltage of the power switching section to determine if the first switching device or the second switching device is to be turned on or turned off.

Abstract: An active diode formed within a buck power regulator with an NMOS transistor is connected to a PMOS transistor at a node that is further connected to the regulator output through an inductor. The active diode combines the NMOS transistor with circuitry to prevent conduction once the active diode passes a threshold voltage. Additional circuitry compares the output voltage to the target input voltage and varies the threshold voltage of the active diode such that the active diode can discharge excess current from the regulator each cycle until the output voltage is less than the target voltage.

Abstract: A hysteretic mode control circuit within a DC-to-DC converter is configured for varying the current limit that controls the switching interval and duration of a power switching section of the DC-to-DC converter to permit the DC-to-DC converter to manage large changes in output current load of the DC-to-DC converter. The hysteretic mode control circuit has a positive and a negative current limit section that develop a first and a second reference signal for turning on and turning off the first and the second switching device. The first and second reference signals are compared to an output voltage of the power switching section to determine if the first switching device or the second switching device is to be turned on or turned off.

Abstract: A buck converter device with minimum off-time operation, the device comprising a comparator providing an output signal of a minimum off time, a first amplifier, a p-channel MOSFET whose gate is connected to the output of a first amplifier providing a signal threshold voltage to a positive terminal of a comparator, a second amplifier; and, a second p-channel MOSFET whose gate is connected to the output of a second amplifier providing a signal to a negative terminal of a comparator, and a capacitor element. A capacitor establishes a voltage whose rate of change is proportional to power supply Vdd, establishing a time to charge the capacitor to a threshold voltage proportional to (Vdd-Vref)/Vdd, and establishing a minimum off time on the output of a comparator.

Abstract: A switching mode power supply (SMPS) is capable of clearing an overvoltage condition. The overvoltage is determined by detecting that the output voltage has exceeded the input voltage by a limited amount. The overvoltage is cleared by repetitively turning on and then off the switches controlling the flow of energy to the SMPS in sequence until the excess charge resulting from the overvoltage is couple to circuit ground, and the output is reduced to within acceptable limits.

Abstract: Disclosed are methods and circuits to measure independently of duty cycles a pulsed current of a pass transistor of a switched circuit. Methods and circuits of one embodiment may be applied to precisely operate DC-to-DC converters such as buck converters in the most efficient operation modes. Another embodiment can be used to measure the pulsed current independently of duty cycle over a wide range of current values.

Abstract: A variable efficiency and response buck converter is achieved. The device includes a multi-phase switch, the coupled coils, the filter capacitor, and the load. The multi-phase switch includes the phase control inputs, the circuit common reference, at least two pairs of complementary switches with each switch containing one upper switch and one lower switch, at least two phase control outputs from the complementary switches. The coupled inductive coils are coupled to the phase control outputs to enable weak couplings and strong couplings. Based on the working mode, equivalently the coupled coils can provide strong mutual inductances and weak mutual inductances. The filter capacitors connected to the output of the coupled coils provide high efficiency output to the load.

Abstract: An active diode formed within a buck power regulator with an NMOS transistor is connected to a PMOS transistor at a node that is further connected to the regulator output through an inductor. The active diode combines the NMOS transistor with circuitry to prevent conduction once the active diode passes a threshold voltage. Additional circuitry compares the output voltage to the target input voltage and varies the threshold voltage of the active diode such that the active diode can discharge excess current from the regulator each cycle until the output voltage is less than the target voltage.

Abstract: A multiple output comparator compares a first input signal and a second input signal. An output mirror circuit receives the comparison and sets an output signal at a first output terminal of the multiple output comparator to a digital state indicating that the magnitude of the first signal is greater than or lesser than the second signal. An offset generator creates an offset signal for adjusting a threshold signal level at the output mirror circuit such that the difference of the first signal and the second signal is combined with the offset signal. The output mirror circuit transfers provides a digital state to another output terminal indicating that the first signal is greater than or lesser than the second signal as adjusted by the adjustment signal.

Abstract: A multi-phase DC-to-DC converter is configured to achieve fast transient response and to optimize efficiency over the load range. Phase shedding changes the active number of phases according to output currents. Each phase of the converter has an inductor configured to optimize the efficiency for a range of load currents in which that phase is used. A converter may have 3 phases, the first used only in sleep mode and has a large inductance with low AC losses, the second used in sync mode at low currents and having a lower inductance with low AC losses, the third phase is used in sync mode at high currents and has small inductance with low DC losses. The number of phases is ?2.

Abstract: A low dropout voltage regulator circuit that dynamically adjusts its output voltage has a voltage adjustment circuit in communication with a dynamic voltage controlling circuit for modifying the output voltage of the low dropout voltage regulator. A first amplification circuit is connected to receive an adjusted reference voltage from the voltage adjustment circuit and compare it with a feedback signal from the output voltage to provide a drive signal to a signal input terminal of a follower output transistor. An output terminal of the follower output transistor provides the output voltage of the regulation circuit. An adjustable internal load circuit applies a load current to the output terminal of the follower output transistor to increase the bandwidth of the output of the voltage regulation circuit that is sensed by a dynamic biasing sensing circuit to generate a dynamic biasing signal that modifies the bandwidth of the first amplification circuit.

Abstract: A low drop-out (LDO) voltage regulator which parallels a second pass device to a first pass device, where the second pass device has in series a small resistor. The small value resistor is a substitute for bond wires or capacitors with very low equivalent series resistances (ESR). A fast feedback loop is coupled to the junction of the second pass device and the small resistor and provides, via a Miller capacitor, a feedback signal to the amplifier of the voltage regulator. The added second pass device returns circuit stability by moving the fast-loop high frequency zero node back within the bandwidth of the circuit.

Abstract: A dynamic hysteresis comparator has a threshold voltage level with dynamic hysteresis for sensing small changes in differential input signals at the input, while controlling a duration that an output voltage state will remain fixed for preventing the output of the comparator from changing state in an unstable fashion or “chattering”. The comparator has a dynamic hysteresis circuit connected to an output of a trigger circuit of the comparator that detects when a decision is made that a first input of the comparator is greater than or lesser than a second input of the comparator causing an output of the comparator to change state. Once the decision causing the change of state of the output is detected, any decisions determining that second input is now lesser than or greater than the first input are prevented from causing the output of the comparator from changing state for a fixed time period.

Abstract: A low dropout voltage regulator circuit that dynamically adjusts its output voltage has a voltage adjustment circuit in communication with a dynamic voltage controlling circuit for modifying the output voltage of the low dropout voltage regulator. A first amplification circuit is connected to receive an adjusted reference voltage from the voltage adjustment circuit and compare it with a feedback signal from the output voltage to provide a drive signal to a signal input terminal of a follower output transistor. An output terminal of the follower output transistor provides the output voltage of the regulation circuit. An adjustable internal load circuit applies a load current to the output terminal of the follower output transistor to increase the bandwidth of the output of the voltage regulation circuit that is sensed by a dynamic biasing sensing circuit to generate a dynamic biasing signal that modifies the bandwidth of the first amplification circuit.

Abstract: A low drop-out (LDO) voltage regulator which parallels a second pass device to a first pass device, where the second pass device has in series a small resistor. The small value resistor is a substitute for bond wires or capacitors with very low equivalent series resistances (ESR). A fast feedback loop is coupled to the junction of the second pass device and the small resistor and provides, via a Miller capacitor, a feedback signal to the amplifier of the voltage regulator. The added second pass device returns circuit stability by moving the fast-loop high frequency zero node back within the bandwidth of the circuit.

Abstract: An amplifier power-down apparatus for suppressing transient signals in a circuit, for example an audio circuit, comprising a reference voltage generator circuit for generating a reference voltage. The reference voltage generator circuit comprises a capacitor for maintaining the reference voltage at a desired level. The amplifier power-down apparatus comprises a discharge control circuit for controlling the operation of the reference voltage generator circuit during power-down. The discharge control circuit comprises an amplifier with a positive feedback path for controlling a current flow from the capacitor during power-down.

Abstract: An amplifier power-down apparatus is provided for suppressing transient signals in a circuit, for example an audio circuit, comprising a reference voltage generator circuit for generating a reference voltage. The reference voltage generator circuit comprises a capacitor for maintaining the reference voltage at a desired level. The amplifier power-down apparatus comprises a discharge control circuit for controlling the operation of the reference voltage generator circuit during power-down. The discharge control circuit comprises an amplifier with a positive feedback path for controlling a current flow from the capacitor during power-down.