Abstract: Embodiments of the present invention provides for the execution of threads and/or workitems on multiple processors of a heterogeneous computing system in a manner that they can share data correctly and efficiently. Disclosed method, system, and article of manufacture embodiments include, responsive to an instruction from a sequence of instructions of a work-item, determining an ordering of visibility to other work-items of one or more other data items in relation to a particular data item, and performing at least one cache operation upon at least one of the particular data item or the other data items present in any one or more cache memories in accordance with the determined ordering. The semantics of the instruction includes a memory operation upon the particular data item.

Abstract: A system, method and a computer program product are provided for hybrid rendering with deferred primitive batch binning. A primitive batch is generated from a sequence of primitives. Initial bin intercepts are identified for primitives in the primitive batch. A bin for processing is identified. The bin corresponds to a region of a screen space. Pixels of the primitives intercepting the identified bin are processed. Next bin intercepts are identified while the primitives intercepting the identified bin are processed.

Abstract: Methods and systems are provided for mapping a memory instruction to a shared memory address space in a computer arrangement having a CPU and an APD. A method includes receiving a memory instruction that refers to an address in the shared memory address space, mapping the memory instruction based on the address to a memory resource associated with either the CPU or the APD, and performing the memory instruction based on the mapping.

Abstract: Embodiments of the present invention provides for the execution of threads and/or workitems on multiple processors of a heterogeneous computing system in a manner that they can share data correctly and efficiently. Disclosed method, system, and article of manufacture embodiments include, responsive to an instruction from a sequence of instructions of a work-item, determining an ordering of visibility to other work-items of one or more other data items in relation to a particular data item, and performing at least one cache operation upon at least one of the particular data item or the other data items present in any one or more cache memories in accordance with the determined ordering. The semantics of the instruction includes a memory operation upon the particular data item.

Abstract: Based on a driver programmable stencil reference value command, stencil reference value logic produces a plurality of stencil reference values for a corresponding plurality of pixels or pixel samples. At least one of the plurality of stencil reference values has a different value than at least one other of the plurality of stencil reference values. The driver programmable stencil reference value command may include a reference to instruction data or instruction data itself such that the graphics processing logic produces the plurality of stencil reference values based on the instruction data. Stencil logic performs a stencil test on the produced plurality of stencil reference values with respect to or without reference to a previously produced plurality of stencil values. Stencil logic performs stencil operations based on the result of the stencil test.

Abstract: Embodiments of the present invention enable the reduction of the memory bandwidth required for graphics rendering. According to an embodiment, a method to render a pixel from a compressed anti-aliased image includes: accessing metadata for the pixel, where the metadata includes entries for respective samples generated by multisampling the pixel; and retrieving a subset of said samples based upon the metadata, wherein the subset is stored in the compressed anti-aliased image stored in a memory.

Abstract: Embodiments of the present invention are directed to improving the performance of anti-aliased image rendering. One embodiment is a method of rendering a pixel from an anti-aliased image. The method includes: storing a first set and a second set of samples from a plurality of anti-aliased samples of the pixel respectively in a first memory and a second memory; and rendering a determined number of said samples from one of only the first set or the first and second sets. Corresponding system and computer program product embodiments are also disclosed.

Abstract: A method and system for processing a graphics frame in a multi-processor computing environment are described. Embodiments of the present invention enable the reduction of the memory footprint required for processing a graphics frame in a multi-processor system. In one embodiment a method of processing a graphics frame using a plurality of processors is presented. The method includes determining a respective assignment of tiles of the graphics frame to each processor of the plurality of processors; allocating a memory area in a local memory of each processor, where the size of the allocated memory area substantially corresponds to the aggregate size of tiles assigned to the respective processor; and storing the tiles of the respective assignment of tiles in the memory area of each respective processor.

Abstract: Based on a driver programmable stencil reference value command, stencil reference value logic produces a plurality of stencil reference values for a corresponding plurality of pixels or pixel samples. At least one of the plurality of stencil reference values has a different value than at least one other of the plurality of stencil reference values. The driver programmable stencil reference value command may include a reference to instruction data or instruction data itself such that the graphics processing logic produces the plurality of stencil reference values based on the instruction data. Stencil logic performs a stencil test on the produced plurality of stencil reference values with respect to or without reference to a previously produced plurality of stencil values. Stencil logic performs stencil operations based on the result of the stencil test.

Abstract: Embodiments of a system and method including graphics processing of a pixel sample are described. According to an embodiment, a first depth test processes a value, such as a z/stencil value, of a pixel sample and determines whether the value of the pixel sample satisfies the first depth test. If the value of the pixel sample satisfies the first depth test, the value of the pixel sample is not immediately written to storage, such as a Z-buffer. That is, if the value of the pixel sample satisfies the first depth test, the depth processing logic prevents or delays a write operation for the value of the pixel sample to storage at that time. A second depth test is performed on the value of the pixel sample if the value of the pixel sample satisfied the first depth test. If the value of the pixel sample satisfies the second depth test, the value of the pixel sample is then written to storage.

Abstract: A cylinder block for an internal combustion engine which, in use, supports a rotary crankshaft 40, the block having pairs of opposed lock width surfaces 37 formed thereon for forming an interference fit with respective co-operating lock width surfaces 38 on the crankshaft bearing caps 34 which in use are secured to respective bearing cap support surfaces 36 also formed on the block 31. The lock width surfaces 37, 38 are spaced from the respective bearing cap support surfaces 36 so as to improve stress cracking resistance of the block 31.

Abstract: A balance weight has a body having a cavity formed therein, a solid weight member substantially filling the cavity of the body; and an adhesive formed on a side of the body for securing the balance weight to an associated object to be balanced. A balance weight can be secured to a tire and weight assembly and has a solid body formed entirely of plastic material, wherein the body is secured to the tire and wheel assembly via an adhesive layer on one side of the body. The body can have an internal cavity formed within the body and a weight member made of metal which substantially fills the internal cavity.

Abstract: A skimmer door assembly for use with a skimmer having an opening therein, having a face plate for matingly engaging the skimmer around the opening of the skimmer. The face plate has an opening therein which communicates with the opening of the skimmer. A raised rib portion extends around a periphery of the opening of the face plate. A cover has a first, planar wall which closes the opening of the face plate. The cover has a groove formed on the planar wall which engages the rib of the face plate for sealing the face plate to prevent water from entering the opening of the face plate.

Abstract: A MEMS based thermoacoustic cryo-cooler for thermal management of cryogenic electronic devices. The cryogenic cooling system can be integrated directly into a cryogenic electronic device. A vertical comb-drive provides an acoustic source through a driving plate to a resonant tube. By exciting a standing wave within the resonant tube, a temperature difference develops across a stack in the tube, thereby enabling heat exchange between heat exchangers. A tapered resonant tube improves the efficiency of the cooling system, compared with a simple cylinder configuration, leading to reduced harmonics and strong standing waves.

Abstract: A MEMS based thermoacoustic cryo-cooler for thermal management of cryogenic electronic devices and a resonant tube used therein. A vertical comb-drive can provides an acoustic source through a driving plate to the resonant tube. By exciting a standing wave within the resonant tube, a temperature difference develops across a stack in the tube, thereby enabling heat exchange between heat exchangers. A tapered resonant tube improves the efficiency of the cooling system, compared with a simple cylinder configuration, leading to reduced harmonics and strong standing waves.

Abstract: A cylinder block for an internal combustion engine which, in use, supports a rotary crankshaft 40, the block having pairs of opposed lock width surfaces 37 formed thereon for forming an interference fit with respective co-operating lock width surfaces 38 on the crankshaft bearing caps 34 which in use are secured to respective bearing cap support surfaces 36 also formed on the block 31. The lock width surfaces 37, 38 are spaced from the respective bearing cap support surfaces 36 so as to improve stress cracking resistance of the block 31.

Abstract: A MEMS based thermoacoustic cryo-cooler for thermal management of cryogenic electronic devices. The cryogenic cooling system can be integrated directly into a cryogenic electronic device. A vertical comb-drive provides an acoustic source through a driving plate to a resonant tube. By exciting a standing wave within the resonant tube, a temperature difference develops across a stack in the tube, thereby enabling heat exchange between heat exchangers. A tapered resonant tube improves the efficiency of the cooling system, compared with a simple cylinder configuration, leading to reduced harmonics and strong standing waves.

Abstract: A configurable buffer has two storage areas. Depending upon a state of a buffer control signal, the two storage areas are configured to buffer a single stream of data together or to buffer two streams of data separately. In an exemplary video graphics processing application, one stream of data includes pass-through values of fragments being rendered (e.g. color, location, and/or depth values) and the other stream of data includes corresponding displaced (or otherwise perturbed) texture coordinate pairs. Such a buffer may be used to reduce the amount of buffer storage needed to support both single-pass and multipass operations in a pixel pipeline.

Abstract: A configurable buffer has two storage areas. Depending upon a state of a buffer control signal, the two storage areas are configured to buffer a single stream of data together or to buffer two streams of data separately. In an exemplary video graphics processing application, one stream of data includes pass-through values of fragments being rendered (e.g. color, location, and/or depth values) and the other stream of data includes corresponding displaced (or otherwise perturbed) texture coordinate pairs. Such a buffer may be used to reduce the amount of buffer storage needed to support both single-pass and multipass operations in a pixel pipeline.

Abstract: The present invention is a "tethered remote" surveillance system that uses a command and control transmitter/receiver to activate selectively a number of audio and video sensors. The system generally comprises a plurality of remote sensors which are selectively controllable through a plurality of remote integral modules to which the sensors are connected. Each integral module is a physically compact unit which includes an antenna for transmitting the outputs of the plural sensors to a command and control station and an antenna for receiving encrypted command signals from the command station. The command station includes an encrypter for generating the command signals, an antenna for transmitting the signals to the integral modules and an antenna for receiving the signals transmitted by the integral modules, as well as devices for displaying and recording the signals received.