Abstract: A method for generating an immune score, the method comprising the steps of: (i) determining a qualitative and/or quantitative assessment of tumor infiltrating lymphocytes in a sample; (ii) determining a qualitative and/or quantitative assessment of T-cell receptor signaling in the sample; (iii) determining a qualitative and/or quantitative assessment of mutation burden in the sample; (iv) generating, using a predictive algorithm, an immune score based on the determined qualitative and/or quantitative assessment of tumor infiltrating lymphocytes, the determined qualitative and/or quantitative assessment of T-cell receptor signaling, and the determined qualitative and/or quantitative assessment of mutation burden.

Abstract: A method of microfabrication includes forming an initial vertical channel structure of semiconductor material protruding from a surface of a substrate such that the initial vertical channel structure has a current flow path that is perpendicular to the surface of the substrate. The initial vertical channel structure is segmented lengthwise into a plurality of independent vertical channel structure segments, each vertical channel structure segment having a respective current flow path that is perpendicular to the surface of the substrate.

Abstract: A method for microfabrication of a three dimensional transistor stack having gate-all-around field-effect transistor devices. The channels hang between source/drain regions. Each channel is selectively deposited with layers of materials designed for adjusting the threshold voltage of the channel. The layers may be oxides, high-k materials, work function materials and metallization. The three dimensional transistor stack forms an array of high threshold voltage devices and low threshold voltage devices in a single package.

Abstract: A method of genotyping includes applying a sample solution including a plurality of copies of a sample polynucleotide to an array of sensors. The sample polynucleotide includes a region associated with an allele. The method further includes measuring using a plurality of sensors of the array of sensors a characteristic of the region of the plurality of copies of the sample polynucleotide and determining using a computational circuitry and the measured characteristics a statistical value indicative of the allele.

Abstract: Techniques herein include methods of forming higher density circuits by combining multiple substrates via stacking and bonding of individual substrates. High voltage and low voltage devices along with 3D NAND devises are fabricated on a first wafer, and high voltage and low voltage devices and/or memory are then fabricated on a second wafer and/or third wafer.

Abstract: A method for generating an immune score, the method comprising the steps of: (i) determining a qualitative and/or quantitative assessment of tumor infiltrating lymphocytes in a sample; (ii) determining a qualitative and/or quantitative assessment of T-cell receptor signaling in the sample; (iii) determining a qualitative and/or quantitative assessment of mutation burden in the sample; (iv) generating, using a predictive algorithm, an immune score based on the determined qualitative and/or quantitative assessment of tumor infiltrating lymphocytes, the determined qualitative and/or quantitative assessment of T-cell receptor signaling, and the determined qualitative and/or quantitative assessment of mutation burden.

Abstract: A method of genotyping includes applying a sample solution including a plurality of copies of a sample polynucleotide to an array of sensors. The sample polynucleotide includes a region associated with an allele. The method further includes measuring using a plurality of sensors of the array of sensors a characteristic of the region of the plurality of copies of the sample polynucleotide and determining using a computational circuitry and the measured characteristics a statistical value indicative of the allele.

Abstract: In a method for forming a semiconductor device, a layer of logic devices is formed on a substrate. The layer of logic devices includes a stack of gate-all-around field-effect transistors (GAA-FETs) positioned over the substrate, where the stack of GAA-FETs includes a first layer of GAA-FETs stacked over a second layer of GAA-FETs. A first wiring layer is formed over the layer of logic devices, where the first wiring layer includes one or more metal routing levels. A memory stack is formed over the first wiring layer. The memory stack includes wordline layers and insulating layers that alternatingly arranged over the first wiring layer. A three-dimensional (3D) NAND memory device is formed in the memory stack. The 3D NAND memory device includes a channel structure that extends into the memory stack and further is coupled to the wordline layers of the memory stack.

Abstract: A method for generating an immune score, the method comprising the steps of: (i) determining a qualitative and/or quantitative assessment of tumor infiltrating lymphocytes in a sample; (ii) determining a qualitative and/or quantitative assessment of T-cell receptor signaling in the sample; (iii) determining a qualitative and/or quantitative assessment of mutation burden in the sample; (iv) generating, using a predictive algorithm, an immune score based on the determined qualitative and/or quantitative assessment of tumor infiltrating lymphocytes, the determined qualitative and/or quantitative assessment of T-cell receptor signaling, and the determined qualitative and/or quantitative assessment of mutation burden.

Abstract: A method for microfabrication of a three dimensional transistor stack having gate-all-around field-effect transistor devices. The channels hang between source/drain regions. Each channel is selectively deposited with layers of materials designed for adjusting the threshold voltage of the channel. The layers may be oxides, high-k materials, work function materials and metallization. The three dimensional transistor stack forms an array of high threshold voltage devices and low threshold voltage devices in a single package.

Abstract: A method for microfabrication of a three dimensional transistor stack having gate-all-around field-effect transistor devices. The channels hang between source/drain regions. Each channel is selectively deposited with layers of materials designed for adjusting the threshold voltage of the channel. The layers may be oxides, high-k materials, work function materials and metallization. The three dimensional transistor stack forms an array of high threshold voltage devices and low threshold voltage devices in a single package.

Abstract: Three-dimensional integration can overcome scaling limitations by increasing transistor density in volume rather than area. To provided gate-all-around field-effect-transistor devices with different threshold voltages and doping types on the same substrate, methods are provided for growing adjacent nanosheet stacks having channels with different doping profiles. In one example, a first nanosheet stack is formed having channels with first doping characteristics. Then the first nanosheet stack is etched, and a second nanosheet stack is formed in plane with the first nanosheet stack. The second nanosheet stack has channels with different doping characteristics. This process can be repeated for additional nanosheet stacks. In another example, the formation of the nanosheet stacks with channels having different doping characteristics is performed by restricting layer formation to predefined locations using a patterned layer (e.g.

Abstract: In a method for forming a semiconductor device, a layer of logic devices is formed on a substrate. The layer of logic devices includes a stack of gate-all-around field-effect transistors (GAA-FETs) positioned over the substrate, where the stack of GAA-FETs includes a first layer of GAA-FETs stacked over a second layer of GAA-FETs. A first wiring layer is formed over the layer of logic devices, where the first wiring layer includes one or more metal routing levels. A memory stack is formed over the first wiring layer. The memory stack includes wordline layers and insulating layers that alternatingly arranged over the first wiring layer. A three-dimensional (3D) NAND memory device is formed in the memory stack. The 3D NAND memory device includes a channel structure that extends into the memory stack and further is coupled to the wordline layers of the memory stack.

Abstract: A method for microfabrication of a three dimensional transistor stack having gate-all-around field-effect transistor devices. The channels hang between source/drain regions. Each channel is selectively deposited with layers of materials designed for adjusting the threshold voltage of the channel. The layers may be oxides, high-k materials, work function materials and metallization. The three dimensional transistor stack forms an array of high threshold voltage devices and low threshold voltage devices in a single package.

Abstract: Three-dimensional integration can overcome scaling limitations by increasing transistor density in volume rather than area. To provided gate-all-around field-effect-transistor devices with different threshold voltages and doping types on the same substrate, methods are provided for growing adjacent nanosheet stacks having channels with different doping profiles. In one example, a first nanosheet stack is formed having channels with first doping characteristics. Then the first nanosheet stack is etched, and a second nanosheet stack is formed in plane with the first nanosheet stack. The second nanosheet stack has channels with different doping characteristics. This process can be repeated for additional nanosheet stacks. In another example, the formation of the nanosheet stacks with channels having different doping characteristics is performed by restricting layer formation to predefined locations using a patterned layer (e.g.

Abstract: A method for generating an immune score, the method comprising the steps of: (i) determining a qualitative and/or quantitative assessment of tumor infiltrating lymphocytes in a sample; (ii) determining a qualitative and/or quantitative assessment of T-cell receptor signaling in the sample; (iii) determining a qualitative and/or quantitative assessment of mutation burden in the sample; (iv) generating, using a predictive algorithm, an immune score based on the determined qualitative and/or quantitative assessment of tumor infiltrating lymphocytes, the determined qualitative and/or quantitative assessment of T-cell receptor signaling, and the determined qualitative and/or quantitative assessment of mutation burden.

Abstract: A protective device for a hand-held tool includes a protective shield having a first end and an opposing second end, a first clamp portion attached to the first end of the protective shield, and a second clamp portion removably attached to the first clamp portion. The first and second clamp portions are configured to securely fix a portion of the handle of the hand-held tool therebetween when the second clamp portion is attached to the first clamp portion.

Abstract: A method of genotyping includes applying a sample solution including a plurality of copies of a sample polynucleotide to an array of sensors. The sample polynucleotide includes a region associated with an allele. The method further includes measuring using a plurality of sensors of the array of sensors a characteristic of the region of the plurality of copies of the sample polynucleotide and determining using a computational circuitry and the measured characteristics a statistical value indicative of the allele.