Patents by Inventor Mark Gardner

Mark Gardner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240132952
    Abstract: A method of genotyping includes applying a sample solution including a plurality of copies of a sample polynucleotide to an array of sensors. The sample polynucleotide includes a region associated with an allele. The method further includes measuring using a plurality of sensors of the array of sensors a characteristic of the region of the plurality of copies of the sample polynucleotide and determining using a computational circuitry and the measured characteristics a statistical value indicative of the allele.
    Type: Application
    Filed: February 16, 2023
    Publication date: April 25, 2024
    Inventors: Barry MERRIMAN, Paul Mola, Mark Gardner
  • Patent number: 11764200
    Abstract: Techniques herein include methods of forming higher density circuits by combining multiple substrates via stacking and bonding of individual substrates. High voltage and low voltage devices along with 3D NAND devises are fabricated on a first wafer, and high voltage and low voltage devices and/or memory are then fabricated on a second wafer and/or third wafer.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: September 19, 2023
    Assignee: Tokyo Electron Limited
    Inventors: Mark Gardner, H. Jim Fulford
  • Publication number: 20230085564
    Abstract: A method for generating an immune score, the method comprising the steps of: (i) determining a qualitative and/or quantitative assessment of tumor infiltrating lymphocytes in a sample; (ii) determining a qualitative and/or quantitative assessment of T-cell receptor signaling in the sample; (iii) determining a qualitative and/or quantitative assessment of mutation burden in the sample; (iv) generating, using a predictive algorithm, an immune score based on the determined qualitative and/or quantitative assessment of tumor infiltrating lymphocytes, the determined qualitative and/or quantitative assessment of T-cell receptor signaling, and the determined qualitative and/or quantitative assessment of mutation burden.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 16, 2023
    Applicant: OmniSeq, Inc.
    Inventors: Carl Morrison, Sarabjot Pabla, Jeffrey Conroy, Mary Nesline, Mark Gardner, Ji He, Sean Glenn
  • Patent number: 11597971
    Abstract: A method of genotyping includes applying a sample solution including a plurality of copies of a sample polynucleotide to an array of sensors. The sample polynucleotide includes a region associated with an allele. The method further includes measuring using a plurality of sensors of the array of sensors a characteristic of the region of the plurality of copies of the sample polynucleotide and determining using a computational circuitry and the measured characteristics a statistical value indicative of the allele.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: March 7, 2023
    Assignee: LIFE TECHNOLOGIES CORPORATION
    Inventors: Barry Merriman, Paul Mola, Mark Gardner
  • Patent number: 11557655
    Abstract: In a method for forming a semiconductor device, a layer of logic devices is formed on a substrate. The layer of logic devices includes a stack of gate-all-around field-effect transistors (GAA-FETs) positioned over the substrate, where the stack of GAA-FETs includes a first layer of GAA-FETs stacked over a second layer of GAA-FETs. A first wiring layer is formed over the layer of logic devices, where the first wiring layer includes one or more metal routing levels. A memory stack is formed over the first wiring layer. The memory stack includes wordline layers and insulating layers that alternatingly arranged over the first wiring layer. A three-dimensional (3D) NAND memory device is formed in the memory stack. The 3D NAND memory device includes a channel structure that extends into the memory stack and further is coupled to the wordline layers of the memory stack.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: January 17, 2023
    Assignee: Tokyo Electron Limited
    Inventors: H. Jim Fulford, Mark Gardner
  • Patent number: 11515008
    Abstract: A method for generating an immune score, the method comprising the steps of: (i) determining a qualitative and/or quantitative assessment of tumor infiltrating lymphocytes in a sample; (ii) determining a qualitative and/or quantitative assessment of T-cell receptor signaling in the sample; (iii) determining a qualitative and/or quantitative assessment of mutation burden in the sample; (iv) generating, using a predictive algorithm, an immune score based on the determined qualitative and/or quantitative assessment of tumor infiltrating lymphocytes, the determined qualitative and/or quantitative assessment of T-cell receptor signaling, and the determined qualitative and/or quantitative assessment of mutation burden.
    Type: Grant
    Filed: October 6, 2017
    Date of Patent: November 29, 2022
    Assignee: OMNISEQ, INC.
    Inventors: Carl Morrison, Sarabjot Pabla, Jeffrey Conroy, Mary Nesline, Mark Gardner, Ji He, Sean Glenn
  • Publication number: 20220168812
    Abstract: Disclosed is the measurement and control of height in the Z-axis of layers produced in an additive manufacturing process. The height of layers being deposited can be monitored, which may involve the use of a fiducial tower to measure a global errors or optical or other means to measure layers on a layer-by-layer basis. Droplet size, pitch and other conditions may be modified to ameliorate or correct detected errors.
    Type: Application
    Filed: March 20, 2020
    Publication date: June 2, 2022
    Applicant: Desktop Metal, Inc.
    Inventor: Mark Gardner Gibson
  • Publication number: 20220161330
    Abstract: A dross removal system for magnetohydrodynamic additive. A vacuum source is used to create a pressure differential at a nozzle opening sufficient to collect dross from a pool of molten metal. The dross and any collected molten metal can be captured in a waste bin for later disposal.
    Type: Application
    Filed: March 20, 2020
    Publication date: May 26, 2022
    Applicant: Desktop Metal, Inc.
    Inventors: Mark Gardner Gibson, Julian Bell, Emanuel Michael Sachs
  • Publication number: 20220152706
    Abstract: A controlled environment system for the additive manufacture of metal objects using magnetohydrodynamic jetting. A sealing plate is placed against an Péclet gap seal of a volume enclosure. A flow of inert gas is used to maintain a high-purity volume in the interior of the volume enclosure. A print head accesses the interior and delivers build material through a hole in the sealing plate. A build plate is movable relative to the sealing plate within the interior of the volume enclosure on which objects can be fabricated.
    Type: Application
    Filed: March 20, 2020
    Publication date: May 19, 2022
    Applicant: Desktop Metal, Inc.
    Inventors: Mark Gardner Gibson, Julian Bell
  • Publication number: 20220148924
    Abstract: A method for microfabrication of a three dimensional transistor stack having gate-all-around field-effect transistor devices. The channels hang between source/drain regions. Each channel is selectively deposited with layers of materials designed for adjusting the threshold voltage of the channel. The layers may be oxides, high-k materials, work function materials and metallization. The three dimensional transistor stack forms an array of high threshold voltage devices and low threshold voltage devices in a single package.
    Type: Application
    Filed: January 20, 2022
    Publication date: May 12, 2022
    Applicant: Tokyo Electron Limited
    Inventors: Jeffrey SMITH, Kandabara Tapily, Lars Liebmann, Daniel Chanemougame, Mark Gardner, H. Jim Fulford, Anton J. Devilliers
  • Patent number: 11264289
    Abstract: A method for microfabrication of a three dimensional transistor stack having gate-all-around field-effect transistor devices. The channels hang between source/drain regions. Each channel is selectively deposited with layers of materials designed for adjusting the threshold voltage of the channel. The layers may be oxides, high-k materials, work function materials and metallization. The three dimensional transistor stack forms an array of high threshold voltage devices and low threshold voltage devices in a single package.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: March 1, 2022
    Assignee: Tokyo Electron Limited
    Inventors: Jeffrey Smith, Kandabara Tapily, Lars Liebmann, Daniel Chanemougame, Mark Gardner, H. Jim Fulford, Anton J. Devilliers
  • Patent number: 11264285
    Abstract: Three-dimensional integration can overcome scaling limitations by increasing transistor density in volume rather than area. To provided gate-all-around field-effect-transistor devices with different threshold voltages and doping types on the same substrate, methods are provided for growing adjacent nanosheet stacks having channels with different doping profiles. In one example, a first nanosheet stack is formed having channels with first doping characteristics. Then the first nanosheet stack is etched, and a second nanosheet stack is formed in plane with the first nanosheet stack. The second nanosheet stack has channels with different doping characteristics. This process can be repeated for additional nanosheet stacks. In another example, the formation of the nanosheet stacks with channels having different doping characteristics is performed by restricting layer formation to predefined locations using a patterned layer (e.g.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: March 1, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Mark Gardner, Jim Fulford
  • Publication number: 20210379664
    Abstract: An improved additive manufacturing system for manufacturing metal parts by magnetohydrodynamic printing liquid metal. A monitoring system including at least one camera capturing light reflected from a strobe light source. Images of the droplets are captured during their jetting and analyzed to determine whether the jetting performance is meeting specifications. A nozzle of the system has a nozzle bottom and a nozzle stem extending outward therefrom on which a meniscus of liquid metal can form. The nozzle is cleaned by bringing a ceramic rod in the vicinity of the nozzle and jetting a bead of metal which is rotated against the nozzle to remove an amount of dross.
    Type: Application
    Filed: September 9, 2019
    Publication date: December 9, 2021
    Applicant: Desktop Metal, Inc.
    Inventors: Mark Gardner Gibson, Emanuel Michael Sachs, Julian Bell
  • Publication number: 20210346958
    Abstract: A method of additive manufacturing using magnetohydrodynamic (MHD) printing of liquid metal. A first current pulse is applied to a liquid metal in a nozzle to eject a droplet from a discharge orifice. A second current pulse is applied to the liquid metal in the nozzle to reduce an amplitude of the oscillations in a meniscus on the discharge orifice. The second current pulse can be either of an opposite or the same polarity as the first current pulse and is timed according to according to the oscillation.
    Type: Application
    Filed: September 20, 2019
    Publication date: November 11, 2021
    Applicant: Desktop Metal, Inc.
    Inventors: Mark Gardner Gibson, Emanuel Michael Sachs
  • Publication number: 20210323053
    Abstract: A nozzle assembly for metal additive manufacturing using magnetohydrodynamic jetting. A nozzle defines a reservoir and a discharge region having a discharge orifice. A thick film heating system disposed on an exterior of the nozzle and including a first contact pad and a second contact pad connected by a heating pathway heats build material in the nozzle to a liquid state. A first electrode and a second electrode together configured to deliver an electrical current through the liquid build material in the discharge region while a magnet system delivers a magnetic field perpendicular the electrical current, thereby jetting liquid metal to form successive build layers.
    Type: Application
    Filed: April 16, 2021
    Publication date: October 21, 2021
    Applicant: Desktop Metal, Inc.
    Inventors: Mark Gardner Gibson, Julian Bell, Emanuel Michael Sachs, Nicholas Bandiera
  • Publication number: 20210323054
    Abstract: A method of developing a frequency map for an MHD jetting nozzle includes filling the MHD jetting nozzle with a liquid metal. The MHD jetting nozzle is excited with a series of jetting pulses delivered at a range of frequencies the vibration response of the MHD jetting nozzle and/or a meniscus of jetting material is measured.
    Type: Application
    Filed: April 16, 2021
    Publication date: October 21, 2021
    Applicant: Desktop Metal, Inc.
    Inventors: Mark Gardner Gibson, Emanuel Michael Sachs
  • Publication number: 20210111258
    Abstract: In a method for forming a semiconductor device, a layer of logic devices is formed on a substrate. The layer of logic devices includes a stack of gate-all-around field-effect transistors (GAA-FETs) positioned over the substrate, where the stack of GAA-FETs includes a first layer of GAA-FETs stacked over a second layer of GAA-FETs. A first wiring layer is formed over the layer of logic devices, where the first wiring layer includes one or more metal routing levels. A memory stack is formed over the first wiring layer. The memory stack includes wordline layers and insulating layers that alternatingly arranged over the first wiring layer. A three-dimensional (3D) NAND memory device is formed in the memory stack. The 3D NAND memory device includes a channel structure that extends into the memory stack and further is coupled to the wordline layers of the memory stack.
    Type: Application
    Filed: March 23, 2020
    Publication date: April 15, 2021
    Applicant: Tokyo Electron Limited
    Inventors: H. Jim Fulford, Mark Gardner
  • Patent number: 10974299
    Abstract: 3D printing using certain materials, such as metal containing multi-phase materials can be prone to clogs and other flow interruptions. Providing build material according to feed rate profiles having varying rates can mitigate these problems. Each feed rate profile can be broken up into blocks of time, some of which relate to fabricating the exterior geometry of the object. Each block of time can be represented by a FFT. The blocks that relate to the exterior are represented by a FFT that has significant high frequency content of 1 Hz or greater. It is beneficial to use profiles including feed rates outside of a range of feed rates suitable for steady state extrusion, being either higher or lower rates than the range limits. A combination of feed rate profiles based only on clog and flow interruption mitigation and operational to print the part according to a model can be used.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: April 13, 2021
    Assignee: Desktop Metal, Inc.
    Inventors: Uwe Bauer, Emanuel Michael Sachs, Mark Gardner Gibson, Nicholas Graham Bandiera
  • Patent number: D921041
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: June 1, 2021
    Assignee: GOOGLE LLC
    Inventors: Mark Gardner, Kris Louie
  • Patent number: D930705
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: September 14, 2021
    Assignee: GOOGLE LLC
    Inventors: Mark Gardner, Kris Louie