Abstract: A system, method and apparatus for executing an HMM analysis on genetic sequence data includes an integrated circuit formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. One of the physical electrical interconnects forms an input to the integrated circuit that may be connected with an electronic data source for receiving reads of genomic data. The hardwired digital logic circuits may be arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the HMM analysis on the reads of genomic data. Each subset of the hardwired digital logic circuits may be formed in a wired configuration to perform the one or more steps in the HMM analysis.

Abstract: A system and method for a reduced computation hidden markov model (HMM) in computational biology applications is disclosed herein. The method includes performing a correlation between the haplotype sequence and the read sequence at the HMM pre-filter engine. The method includes computing a MINI metric from a reduced number of cells at the HMM computation engine.

Abstract: A system and method for a reduced computation hidden markov model (HMM) in computational biology applications is disclosed herein. The method includes performing a correlation between the haplotype sequence and the read sequence at the HMM pre-filter engine. The method includes computing a HMM metric from a reduced number of cells at the HMM computation engine.

Abstract: A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data is provided. Particularly, a genomics analysis platform for executing a sequence analysis pipeline is provided. The genomics analysis platform includes one or more of a first integrated circuit, where each first integrated circuit forms a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline.

Abstract: A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data is provided. Particularly, a genomics analysis platform for executing a sequence analysis pipeline is provided. The genomics analysis platform includes one or more of a first integrated circuit, where each first integrated circuit forms a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline.

Abstract: A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data includes an integrated circuit formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. One of the physical electrical interconnects forms an input to the integrated circuit that may be connected with an electronic data source for receiving reads of genomic data. The hardwired digital logic circuits may be arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the bioinformatics analysis on the reads of genomic data. Each subset of the hardwired digital logic circuits may be formed in a wired configuration to perform the one or more steps in the bioinformatics analysis.

Abstract: A system, method and apparatus for executing a sequence analysis pipeline on genetic sequence data includes an integrated circuit formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. The hardwired digital logic circuits are arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the sequence analysis pipeline on the reads of genomic data. In various instances, each subset of the hardwired digital logic circuits may be formed in a wired configuration to perform one or more steps a variant call operation.

Abstract: A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data is provided. Particularly, a genomics analysis platform for executing a sequence analysis pipeline is provided. The genomics analysis platform includes one or more of a first integrated circuit, where each first integrated circuit forms a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline.

Abstract: A system, method and apparatus for executing a sequence analysis pipeline on genetic sequence data includes an integrated circuit formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. The hardwired digital logic circuits are arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the sequence analysis pipeline on the reads of genomic data. In various instances, each subset of the hardwired digital logic circuits may be formed in a wired configuration to perform one or more steps a variant call operation.

Abstract: A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data is provided. Particularly, a genomics analysis platform for executing a sequence analysis pipeline is provided. The genomics analysis platform includes one or more of a first integrated circuit, where each first integrated circuit forms a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline.

Abstract: A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data is provided. Particularly, a genomics analysis platform for executing a sequence analysis pipeline is provided. The genomics analysis platform includes one or more of a first integrated circuit, where each first integrated circuit forms a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline.

Abstract: A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data is provided. Particularly, a genomics analysis platform for executing a sequence analysis pipeline is provided. The genomics analysis platform includes one or more of a first integrated circuit, where each first integrated circuit forms a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline.

Abstract: A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data includes an integrated circuit formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. One of the physical electrical interconnects forms an input to the integrated circuit that may be connected with an electronic data source for receiving reads of genomic data. The hardwired digital logic circuits may be arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the bioinformatics analysis on the reads of genomic data. Each subset of the hardwired digital logic circuits may be formed in a wired configuration to perform the one or more steps in the bioinformatics analysis.

Abstract: A system, method and apparatus for executing a sequence analysis pipeline on genetic sequence data includes an integrated circuit formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. The hardwired digital logic circuits are arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the sequence analysis pipeline on the reads of genomic data. In various instances, each subset of the hardwired digital logic circuits may be formed in a wired configuration to perform one or more steps a variant call operation.

Abstract: A system, method and apparatus for executing an HMM analysis on genetic sequence data includes an integrated circuit formed of a set of hardwired digital logic circuits that are interconnected by physical electrical interconnects. One of the physical electrical interconnects forms an input to the integrated circuit that may be connected with an electronic data source for receiving reads of genomic data. The hardwired digital logic circuits may be arranged as a set of processing engines, each processing engine being formed of a subset of the hardwired digital logic circuits to perform one or more steps in the HMM analysis on the reads of genomic data. Each subset of the hardwired digital logic circuits may be formed in a wired configuration to perform the one or more steps in the HMM analysis.

Abstract: Aspects of a method and system for diversity processing utilizing a programmable interface suppression module may include one or more circuits that are operable to program an interference suppression module based on one or more interference cancellation parameters. A plurality of weighting factor values may be computed based on the one or more interference suppression parameters and a received plurality of multipath signals. A plurality of estimated signal may be generated based on the plurality of weighting factor values. A plurality of updated estimated signals may be generated based on the plurality of estimated signals. A plurality of interference suppressed signals may be generated based on the plurality of updated estimated signals.

Abstract: Disclosed are various embodiments involving a two-step searcher for cell discovery. Multiple scrambling codes associated with multiple neighboring cells are obtained. Slot timing is obtained for a received signal based at least in part on a detection of primary synchronization peak energy in the received signal. One of the scrambling codes for decoding the received signal is identified based at least in part on testing multiple scrambling code hypotheses in parallel during an accumulation time period of the received signal in response to obtaining the slot timing.

Abstract: Aspects of a method and system for interference suppression using information from non-listened base stations are provided. A wireless communication device may be operable to receive a raw signal comprising one or more desired signals from one or more serving base transceiver stations (BTSs) and comprising one or more undesired signals from one or more non-listened BTSs. The wireless communication device may be operable to generate first estimate signals that estimate the one or more undesired signals as transmitted by the one or more non-listened BTSs, generate an interference suppressed version of the raw signal based on the first estimate signals, and recover the one or more desired signals from the interference suppressed version of the raw signal. The non-listened BTSs may comprise one or more BTSs that are not serving the wireless communication device and are not involved in a hand off of the wireless communication device.

Abstract: Certain aspects of a method and system for delay matching in a rake receiver are disclosed. Aspects of one method may include compensating for a delay associated with at least one or both of the following in a rake receiver: a control channel and a data channel, prior to individual processing of received data by the data channel and individual processing of received data by the control channel. The data channel or the dedicated physical channel (DPCH) may be delayed with respect to the control channel, which may comprise, for example, the common pilot control channel (CPICH), by a particular time period.

Abstract: Aspects of a method and system for diversity processing utilizing a programmable interface suppression module may include one or more circuits that are operable to program an interference suppression module based on one or more interference cancellation parameters. A plurality of weighting factor values may be computed based on the one or more interference suppression parameters and a received plurality of multipath signals. A plurality of estimated signal may be generated based on the plurality of weighting factor values. A plurality of updated estimated signals may be generated based on the plurality of estimated signals. A plurality of interference suppressed signals may be generated based on the plurality of updated estimated signals.