Abstract: Some embodiments include methods in which a pair of spaced-apart adjacent features is formed over a substrate. The features have silicon dioxide surfaces. Silicon nitride is deposited between the features. A first region of the silicon nitride is protected with a mask while a second region is not. The second region is removed to form an opening between the features. Some embodiments include semiconductor constructions that contain a pair of spaced-apart adjacent features. The features are lines extending along a first direction and are spaced from one another by a trench. Alternating plugs and intervening materials are within the trench, with the plugs and intervening materials alternating along the first direction. The intervening materials consist of silicon nitride, and the plugs have lateral peripheries that directly contact silicon dioxide of the features, and that directly contact silicon nitride of the intervening regions.

Abstract: Some embodiments include methods in which a pair of spaced-apart adjacent features is formed over a substrate. The features have silicon dioxide surfaces. Silicon nitride is deposited between the features. A first region of the silicon nitride is protected with a mask while a second region is not. The second region is removed to form an opening between the features. Some embodiments include semiconductor constructions that contain a pair of spaced-apart adjacent features. The features are lines extending along a first direction and are spaced from one another by a trench. Alternating plugs and intervening materials are within the trench, with the plugs and intervening materials alternating along the first direction. The intervening materials consist of silicon nitride, and the plugs have lateral peripheries that directly contact silicon dioxide of the features, and that directly contact silicon nitride of the intervening regions.

Abstract: Some embodiments include methods in which a pair of spaced-apart adjacent features is formed over a substrate. The features have silicon dioxide surfaces. Silicon nitride is deposited between the features. A first region of the silicon nitride is protected with a mask while a second region is not. The second region is removed to form an opening between the features. Some embodiments include semiconductor constructions that contain a pair of spaced-apart adjacent features. The features are lines extending along a first direction and are spaced from one another by a trench. Alternating plugs and intervening materials are within the trench, with the plugs and intervening materials alternating along the first direction. The intervening materials consist of silicon nitride, and the plugs have lateral peripheries that directly contact silicon dioxide of the features, and that directly contact silicon nitride of the intervening regions.

Abstract: Some embodiments include methods in which a pair of spaced-apart adjacent features is formed over a substrate. The features have silicon dioxide surfaces. Silicon nitride is deposited between the features. A first region of the silicon nitride is protected with a mask while a second region is not. The second region is removed to form an opening between the features. Some embodiments include semiconductor constructions that contain a pair of spaced-apart adjacent features. The features are lines extending along a first direction and are spaced from one another by a trench. Alternating plugs and intervening materials are within the trench, with the plugs and intervening materials alternating along the first direction. The intervening materials consist of silicon nitride, and the plugs have lateral peripheries that directly contact silicon dioxide of the features, and that directly contact silicon nitride of the intervening regions.

Abstract: Some embodiments include methods in which a pair of spaced-apart adjacent features is formed over a substrate. The features have silicon dioxide surfaces. Silicon nitride is deposited between the features. A first region of the silicon nitride is protected with a mask while a second region is not. The second region is removed to form an opening between the features. Some embodiments include semiconductor constructions that contain a pair of spaced-apart adjacent features. The features are lines extending along a first direction, and are spaced from one another by a trench. Alternating plugs and intervening materials are within the trench, with the plugs and intervening materials alternating along the first direction. The intervening materials consist of silicon nitride, and the plugs have lateral peripheries that directly contact silicon dioxide of the features, and that directly contact silicon nitride of the intervening regions.

Abstract: A method of forming a substrate opening includes forming a plurality of side-by-side openings in a substrate. At least some of immediately adjacent side-by-side openings are formed in the substrate to different depths relative one another. Walls that are laterally between the side-by-side openings are removed to form a larger opening having a non-vertical sidewall surface where the walls were removed in at least one straight-line vertical cross-section that passes through the sidewall surface orthogonally to the removed walls.

Abstract: Some embodiments include methods in which a pair of spaced-apart adjacent features is formed over a substrate. The features have silicon dioxide surfaces. Silicon nitride is deposited between the features. A first region of the silicon nitride is protected with a mask while a second region is not. The second region is removed to form an opening between the features. Some embodiments include semiconductor constructions that contain a pair of spaced-apart adjacent features. The features are lines extending along a first direction, and are spaced from one another by a trench. Alternating plugs and intervening materials are within the trench, with the plugs and intervening materials alternating along the first direction. The intervening materials consist of silicon nitride, and the plugs have lateral peripheries that directly contact silicon dioxide of the features, and that directly contact silicon nitride of the intervening regions.

Abstract: A capacitor forming method includes forming an electrically conductive support material over a substrate, forming an opening through at least the support material to the substrate, and, after forming the opening, forming a capacitor structure contacting the substrate and the support material in the opening. The support material contains at least 25 at % carbon. Another capacitor forming method includes forming a support material over a substrate, forming an opening through at least the support material to the substrate, and, after forming the opening, forming a capacitor structure contacting the substrate and the support material in the opening. The support material contains at least 20 at % carbon. The support material has a thickness and the opening has an aspect ratio 20:1 or greater within the thickness of the support material.

Abstract: Plasma processing systems and methods for using pre-dissociated and/or pre-ionized tuning gases are disclosed herein. In one embodiment, a plasma processing system includes a reaction chamber, a support element in the reaction chamber, and one or more cathode discharge assemblies in the reaction chamber. The reaction chamber is configured to produce a plasma in an interior volume of the chamber. The support element positions a microelectronic workpiece in the reaction chamber, and the cathode discharge assembly supplies an at least partially dissociated and/or ionized tuning gas to the workpiece in the chamber.

Abstract: Some embodiments include methods in which a pair of spaced-apart adjacent features is formed over a substrate. The features have silicon dioxide surfaces. Silicon nitride is deposited between the features. A first region of the silicon nitride is protected with a mask while a second region is not. The second region is removed to form an opening between the features. Some embodiments include semiconductor constructions that contain a pair of spaced-apart adjacent features. The features are lines extending along a first direction, and are spaced from one another by a trench. Alternating plugs and intervening materials are within the trench, with the plugs and intervening materials alternating along the first direction. The intervening materials consist of silicon nitride, and the plugs have lateral peripheries that directly contact silicon dioxide of the features, and that directly contact silicon nitride of the intervening regions.

Abstract: A method of forming a substrate opening includes forming a plurality of side-by-side openings in a substrate. At least some of immediately adjacent side-by-side openings are formed in the substrate to different depths relative one another. Walls that are laterally between the side-by-side openings are removed to form a larger opening having a non-vertical sidewall surface where the walls were removed in at least one straight-line vertical cross-section that passes through the sidewall surface orthogonally to the removed walls.

Abstract: Plasma processing systems and methods for using pre-dissociated and/or pre-ionized tuning gases are disclosed herein. In one embodiment, a plasma processing system includes a reaction chamber, a support element in the reaction chamber, and one or more cathode discharge assemblies in the reaction chamber. The reaction chamber is configured to produce a plasma in an interior volume of the chamber. The support element positions a microelectronic workpiece in the reaction chamber, and the cathode discharge assembly supplies an at least partially dissociated and/or ionized tuning gas to the workpiece in the chamber.

Abstract: A method of processing a polysilicon-comprising composition comprises forming a first wall comprising at least one recess in polysilicon. A second wall comprising polysilicon is formed. Material other than polysilicon is deposited within the at least one recess and over the polysilicon of the second wall. The material is etched selectively relative to polysilicon to expose polysilicon of the second wall and to leave the material within the at least one recess in the first wall. The exposed polysilicon of the second wall is etched selectively relative to the material within the at least one recess in the first wall. Other methods are disclosed.

Abstract: A method of forming a substrate opening includes forming a plurality of side-by-side openings in a substrate. At least some of immediately adjacent side-by-side openings are formed in the substrate to different depths relative one another. Walls that are laterally between the side-by-side openings are removed to form a larger opening having a non-vertical sidewall surface where the walls were removed in at least one straight-line vertical cross-section that passes through the sidewall surface orthogonally to the removed walls.

Abstract: A capacitively coupled plasma reactor comprising a processing chamber, a first electrode, a second electrode and a thermoelectric unit. The processing chamber has an upper portion with a gas inlet and a lower portion, and the upper portion is in fluid communication with the lower portion. The first electrode has a front side and a backside and is positioned at the upper portion of the processing chamber. The second electrode is positioned in the lower portion of the processing chamber and is spaced apart from the front side of the first electrode. The thermoelectric unit is positioned proximate to the backside of the first electrode and is capable of heating and cooling the first electrode.

Abstract: A method of forming a substrate opening includes forming a plurality of side-by-side openings in a substrate. At least some of immediately adjacent side-by-side openings are formed in the substrate to different depths relative one another. Walls that are laterally between the side-by-side openings are removed to form a larger opening having a non-vertical sidewall surface where the walls were removed in at least one straight-line vertical cross-section that passes through the sidewall surface orthogonally to the removed walls.

Abstract: Methods are disclosed, including for increasing the density of isolated features in an integrated circuit. Also disclosed are associated structures. In some embodiments, contacts are formed on pitch with other structures, such as conductive interconnects that may be formed by pitch multiplication. To form the contacts, in some embodiments, a pattern corresponding to some of the contacts is formed in a selectively definable material such as photoresist. Features in the selectively definable material are trimmed, and spacer material is blanket deposited over the features and the deposited material is then etched to leave spacers on sides of the features. The selectively definable material is removed, leaving a mask defined by the spacer material. The pattern defined by the spacer material may be transferred to a substrate, to form on pitch contacts. In some embodiments, the on pitch contacts may be used to electrically contact conductive interconnects in the substrate.

Abstract: Some embodiments include methods of making stud-type capacitors utilizing carbon-containing support material. Openings may be formed through the carbon-containing support material to electrical nodes, and subsequently conductive material may be grown within the openings. The carbon-containing support material may then be removed, and the conductive material utilized as stud-type storage nodes of stud-type capacitors. The stud-type capacitors may be incorporated into DRAM, and the DRAM may be utilized in electronic systems.

Abstract: In the manufacture of integrated circuits, reactive compositions that include a reactive etchant species and an oxygen-containing species can provide selective removal of target material and can reduce contamination of gas delivery lines.

Abstract: Plasma processing systems and methods for using pre-dissociated and/or pre-ionized tuning gases are disclosed herein. In one embodiment, a plasma processing system includes a reaction chamber, a support element in the reaction chamber, and one or more cathode discharge assemblies in the reaction chamber. The reaction chamber is configured to produce a plasma in an interior volume of the chamber. The support element positions a microelectronic workpiece in the reaction chamber, and the cathode discharge assembly supplies an at least partially dissociated and/or ionized tuning gas to the workpiece in the chamber.