Patents by Inventor Mark Murin
Mark Murin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11893243Abstract: A storage system has a memory that is organized in wordlines. Each wordline has a number of strings. A controller in the storage system changes, in each of the wordlines, which of the strings is a last string programmed. Doing so can unmask a program disturb error when triple-level cells in the memory are used as pseudo-multi-level cells. By unmasking the program disturb error, the controller can detect and correct the error.Type: GrantFiled: October 6, 2021Date of Patent: February 6, 2024Assignee: Western Digital Technologies, Inc.Inventors: Daniel J. Linnen, Prakash Subedi, Khanfer A. Kukkady, Mark Murin
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Publication number: 20230106371Abstract: A storage system has a memory that is organized in wordlines. Each wordline has a number of strings. A controller in the storage system changes, in each of the wordlines, which of the strings is a last string programmed. Doing so can unmask a program disturb error when triple-level cells in the memory are used as pseudo-multi-level cells. By unmasking the program disturb error, the controller can detect and correct the error.Type: ApplicationFiled: October 6, 2021Publication date: April 6, 2023Applicant: Western Digital Technologies, Inc.Inventors: Daniel J. Linnen, Prakash Subedi, Khanfer A. Kukkady, Mark Murin
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Patent number: 11373710Abstract: Time division peak power management in non-volatile memory systems is disclosed. The memory system has a memory controller and a number of semiconductor dies. Each die is assigned a time slot in which to perform high current portions of memory operations. The memory controller provides an external clock to each die. Each die tracks repeating time slots based on the external clock. The memory controller may synchronize this tracking. If a die is about to perform a high current portion of a memory operation, the die checks to determine if its allocated slot has been reached. If not, the die halts the memory operation until its allocated time slot is reached. When the allocated time slot is reached, the halted memory operation is resumed at the high current portion. Therefore, the high current portion of the memory operation occurs during the allocated time slot.Type: GrantFiled: February 2, 2021Date of Patent: June 28, 2022Assignee: SanDisk Technologies LLCInventors: Hua-Ling Cynthia Hsu, Yu-Chung Lien, Mark Murin, Mark Shlick
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Patent number: 11226772Abstract: Power and/or current regulation in non-volatile memory systems is disclosed. Peak power/current usage may be reduced by staggering concurrent program operations in the different semiconductor dies. Each set of one or more semiconductor dies has an earliest permitted start time for its program operation, as well as a number of permitted backup start times. The permitted start times are unique for each set of one or more semiconductor dies. There may be a uniform gap or delay between each permitted start time. If a semiconductor die is busy with another memory operation at or after its earliest permitted start time, then the program operation is initiated or resumed at one of the permitted backup times. By having permitted backup times, the memory system need not poll each semiconductor die to determine whether the semiconductor die is ready/busy in order to determine when a die should start a program operation.Type: GrantFiled: June 25, 2020Date of Patent: January 18, 2022Assignee: SanDisk Technologies LLCInventors: Yu-Chung Lien, Mark Murin, Hua-Ling Cynthia Hsu, Tomer Eliash, Huai-Yuan Tseng, Deepanshu Dutta
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Publication number: 20210405920Abstract: Power and/or current regulation in non-volatile memory systems is disclosed. Peak power/current usage may be reduced by staggering concurrent program operations in the different semiconductor dies. Each set of one or more semiconductor dies has an earliest permitted start time for its program operation, as well as a number of permitted backup start times. The permitted start times are unique for each set of one or more semiconductor dies. There may be a uniform gap or delay between each permitted start time. If a semiconductor die is busy with another memory operation at or after its earliest permitted start time, then the program operation is initiated or resumed at one of the permitted backup times. By having permitted backup times, the memory system need not poll each semiconductor die to determine whether the semiconductor die is ready/busy in order to determine when a die should start a program operation.Type: ApplicationFiled: June 25, 2020Publication date: December 30, 2021Applicant: SanDisk Technologies LLCInventors: Yu-Chung Lien, Mark Murin, Hua-Ling Cynthia Hsu, Tomer Eliash, Huai-Yuan Tseng, Deepanshu Dutta
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Patent number: 10360045Abstract: A device or apparatus may be configured to perform memory operations on a memory die while a current multi-level cell programming operation is being performed. In the event that a controller identifies pending memory operations to be performed in the memory die, the controller may communicate with the memory die to determine a status of auxiliary latches of the memory die. Depending on the status, the controller may determine if the memory die is in a suspend/resume period and/or which pending memory operations to have performed.Type: GrantFiled: April 25, 2017Date of Patent: July 23, 2019Assignee: SanDisk Technologies LLCInventors: Uri Peltz, Amir Hadar, Mark Shlick, Mark Murin
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Publication number: 20180307503Abstract: A device or apparatus may be configured to perform memory operations on a memory die while a current multi-level cell programming operation is being performed. In the event that a controller identifies pending memory operations to be performed in the memory die, the controller may communicate with the memory die to determine a status of auxiliary latches of the memory die. Depending on the status, the controller may determine if the memory die is in a suspend/resume period and/or which pending memory operations to have performed.Type: ApplicationFiled: April 25, 2017Publication date: October 25, 2018Applicant: SanDisk Technologies LLCInventors: Uri Peltz, Amir Hadar, Mark Shlick, Mark Murin
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Patent number: 9704595Abstract: Techniques are provided for non-volatile storage self-detecting that a heating event has occurred to the non-volatile storage. One example of the heating event is an Infrared (IR) reflow process. In one aspect, a block of memory cells in a memory device are put through a number of program/erase cycles. A group of the memory cells in the cycled block are programmed to a reference threshold voltage distribution. Some time may pass after programming the cycled block. The memory device self-detects that there has been a heating event in response to a shift in the reference VT distribution being more than an allowed amount. The memory device may switch from a first programming mode to a second programming mode in response to detecting that the heating event has occurred.Type: GrantFiled: March 31, 2016Date of Patent: July 11, 2017Assignee: SanDisk Technologies LLCInventors: Alon Eyal, Idan Alrod, Eran Sharon, Ishai Ilani, Mark Murin, David Rozman, Wei-Cheng Lien, Deepanshu Dutta, Changyuan Chen
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Patent number: 9400747Abstract: A data storage device includes a non-volatile memory and a controller. A method includes sending a memory command from the controller to the non-volatile memory. The memory command indicates multiple sense operations to be performed at a single plane of the non-volatile memory.Type: GrantFiled: April 29, 2014Date of Patent: July 26, 2016Assignee: SANDISK TECHNOLOGIES LLCInventors: Daniel Edward Tuers, Abhijeet Manohar, Mark Murin, Mark Shlick, Menahem Lasser
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Patent number: 9218851Abstract: A data storage device includes a non-volatile memory. A method includes programming a first page at a word line of the non-volatile memory. While programming a second page at the word line, first storage elements of the word line are selectively programmed in response to a power drop at the data storage device to increase a state separation that separates data values of the first page.Type: GrantFiled: October 24, 2013Date of Patent: December 22, 2015Assignee: SANDISK TECHNOLOGIES INC.Inventors: Mark Shlick, Mark Murin, Menahem Lasser
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Patent number: 9094047Abstract: Data that are stored in cells of a multi-bit-per cell memory, according to a systematic or non-systematic ECC, are read and corrected (systematic ECC) or recovered (non-systematic ECC) in accordance with estimated probabilities that one or more of the read bits are erroneous. In one method of the present invention, the estimates are a priori. In another method of the present invention, the estimates are based only on aspects of the read bits that include significances or bit pages of the read bits. In a third method of the present invention, the estimates are based only on values of the read bits. Not all the estimates are equal.Type: GrantFiled: March 11, 2009Date of Patent: July 28, 2015Assignee: Ramot at Tel Aviv University Ltd.Inventors: Simon Litsyn, Idan Alrod, Eran Sharon, Mark Murin, Menahem Lasser
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Publication number: 20150154112Abstract: A data storage device includes a non-volatile memory and a controller. A method includes sending a memory command from the controller to the non-volatile memory. The memory command indicates multiple sense operations to be performed at a single plane of the non-volatile memory.Type: ApplicationFiled: April 29, 2014Publication date: June 4, 2015Applicant: SANDISK TECHNOLOGIES INC.Inventors: DANIEL EDWARD TUERS, ABHIJEET MANOHAR, MARK MURIN, MARK SHLICK, MENAHEM LASSER
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Publication number: 20150117098Abstract: A data storage device includes a non-volatile memory. A method includes programming a first page at a word line of the non-volatile memory. While programming a second page at the word line, first storage elements of the word line are selectively programmed in response to a power drop at the data storage device to increase a state separation that separates data values of the first page.Type: ApplicationFiled: October 24, 2013Publication date: April 30, 2015Applicant: SANDISK TECHNOLOGIES INC.Inventors: MARK SHLICK, MARK MURIN, MENAHEM LASSER
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Patent number: 8990658Abstract: Data that are stored in cells of a multi-bit-per cell memory, according to a systematic or non-systematic ECC, are read and corrected (systematic ECC) or recovered (non-systematic ECC) in accordance with estimated probabilities that one or more of the read bits are erroneous. In one method of the present invention, the estimates are a priori. In another method of the present invention, the estimates are based only on aspects of the read bits that include significances or bit pages of the read bits. In a third method of the present invention, the estimates are based only on values of the read bits. Not all the estimates are equal.Type: GrantFiled: March 11, 2009Date of Patent: March 24, 2015Assignee: Ramot at Tel Aviv University Ltd.Inventors: Simon Litsyn, Idan Alrod, Eran Sharon, Mark Murin, Menahem Lasser
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Patent number: 8966342Abstract: Data that are stored in cells of a multi-bit-per cell memory, according to a systematic or non-systematic ECC, are read and corrected (systematic ECC) or recovered (non-systematic ECC) in accordance with estimated probabilities that one or more of the read bits are erroneous. In one method of the present invention, the estimates are a priori. In another method of the present invention, the estimates are based only on aspects of the read bits that include significances or bit pages of the read bits. In a third method of the present invention, the estimates are based only on values of the read bits. Not all the estimates are equal.Type: GrantFiled: March 11, 2009Date of Patent: February 24, 2015Assignee: Ramot at Tel Aviv University Ltd.Inventors: Simon Litsyn, Idan Alrod, Eran Sharon, Mark Murin, Menahem Lasser
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Patent number: 8891301Abstract: A data storage device includes a non-volatile memory that includes a three-dimensional (3D) memory and circuitry associated with operation of memory cells of the 3D memory. A method includes programming a first page at a word line of the non-volatile memory. While programming a second page at the word line, first storage elements of the word line are selectively programmed in response to a power drop at the data storage device to increase a state separation that separates data values of the first page.Type: GrantFiled: May 22, 2014Date of Patent: November 18, 2014Assignee: Sandisk Technologies Inc.Inventors: Mark Shlick, Mark Murin, Menahem Lasser
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Patent number: 8874832Abstract: A method for managing a flash memory that includes a plurality of primary cells and a plurality of spare cells includes interrogating the flash memory to determine which spare cells have been used to replace respective primary cells and using at least a portion of a remainder of the spare cells as reference cells.Type: GrantFiled: October 10, 2012Date of Patent: October 28, 2014Assignee: SanDisk Technologies Inc.Inventors: Mark Murin, Eran Sharon
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Patent number: 8806113Abstract: A method includes writing a first portion of received user data to a first page of a block of a memory according to a writing schedule and writing a subsequent portion of the received user data to another page of the block according to the writing schedule. The method includes storing first metadata corresponding to writing the first portion in the memory. The method further includes associating the first metadata with the subsequent portion.Type: GrantFiled: November 7, 2012Date of Patent: August 12, 2014Assignee: Sandisk IL Ltd.Inventors: Menahem Lasser, Mark Murin
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Patent number: 8788909Abstract: Data that are stored in cells of a multi-bit-per cell memory, according to a systematic or non-systematic ECC, are read and corrected (systematic ECC) or recovered (non-systematic ECC) in accordance with estimated probabilities that one or more of the read bits are erroneous. In one method of the present invention, the estimates are a priori. In another method of the present invention, the estimates are based only on aspects of the read bits that include significances or bit pages of the read bits. In a third method of the present invention, the estimates are based only on values of the read bits. Not all the estimates are equal.Type: GrantFiled: March 11, 2009Date of Patent: July 22, 2014Assignee: Ramot at Tel Aviv University Ltd.Inventors: Simon Litsyn, Idan Alrod, Eran Sharon, Mark Murin, Menahem Lasser
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Patent number: 8650462Abstract: Data that are stored in cells of a multi-bit-per cell memory, according to a systematic or non-systematic ECC, are read and corrected (systematic ECC) or recovered (non-systematic ECC) in accordance with estimated probabilities that one or more of the read bits are erroneous. In one method of the present invention, the estimates are a priori. In another method of the present invention, the estimates are based only on aspects of the read bits that include significances or bit pages of the read bits. In a third method of the present invention, the estimates are based only on values of the read bits. Not all the estimates are equal.Type: GrantFiled: March 11, 2009Date of Patent: February 11, 2014Assignee: Ramot at Tel Aviv University Ltd.Inventors: Simon Litsyn, Idan Alrod, Eran Sharon, Mark Murin, Menahem Lasser