Patents by Inventor Mark Simpson

Mark Simpson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090320678
    Abstract: Methods and apparatuses are described for removing a contaminant, such as a vaporous trace metal contaminant like mercury, from a gas stream. In one embodiment, a primary particulate collection device that removes particulate matter is used. In this embodiment, a sorbent filter is placed within the housing of the primary particulate collection device, such as an electrostatic precipitator or a baghouse, to adsorb the contaminant of interest. In another embodiment, a sorbent filter is placed within or after a scrubber, such as a wet scrubber, to adsorb the contaminant of interest. In some embodiments, the invention provides methods and apparatuses that can advantageously be retrofit into existing particulate collection equipment. In some embodiments, the invention provides methods and apparatuses that in addition to removal of a contaminant additionally remove particulate matter from a gas stream.
    Type: Application
    Filed: March 25, 2009
    Publication date: December 31, 2009
    Applicant: Electric Power Research Institute, Inc.
    Inventors: Ramsay Chang, Charles E. Dene, Larry Scot Monroe, Mark Simpson Berry, M. Brandon Looney
  • Publication number: 20080115704
    Abstract: The invention provides methods and apparatuses for removing aerosols and, in some cases, vapor phase contaminants, such as mercury, from a gas stream. One method is directed to the removal of additional aerosols from a gas stream from which aerosols have previously been removed by using a screen in combination with a primary aerosol collection device. Another method is directed to the removal of both aerosols and vapor phase contaminants by using a sorbent in combination with a screen. Another method is directed to the removal of vapor phase contaminants by using a catalyst to convert the contaminant to a form that is more easily removed from the gas stream and optionally injecting a chemical to increase the rate of conversion. The invention also provides various apparatuses for use in performing the various methods of the invention.
    Type: Application
    Filed: September 14, 2007
    Publication date: May 22, 2008
    Inventors: Mark Simpson Berry, Ramsay Chang
  • Publication number: 20080105120
    Abstract: The invention provides methods and apparatuses for removing additional aerosols and in some cases additional particulate matter from a gas stream, wherein a certain portion of such aerosols and particulate matter has already been removed using a primary aerosol and particulate collection device. In some embodiments, the invention comprises a method for removing additional aerosols from a gas stream that has aerosols previously removed by a primary aerosol collector, comprising passing a gas stream comprising a plurality of aerosols through a gas duct; removing a first portion of the plurality of said aerosols using a primary aerosol collector; passing the gas stream through a screen; and collecting at least a second portion of the plurality of aerosols on the screen. The invention also provides various apparatuses for use in performing the method of the invention.
    Type: Application
    Filed: November 3, 2006
    Publication date: May 8, 2008
    Inventors: Mark Simpson Berry, Ramsay Chang
  • Publication number: 20070172828
    Abstract: In a genetic optimization method, the genes of a chromosome population are computationally genetically evolved. The evolving includes evolving a number of expressed genes in each chromosome and employing a fitness criterion evaluated without reference to unexpressed genes of each chromosome. An optimized chromosome produced by the genetic evolving is selected.
    Type: Application
    Filed: February 1, 2005
    Publication date: July 26, 2007
    Applicant: Koninklijke Phillips Electronics N.V.
    Inventors: J. Schaffer, Mark Simpson
  • Publication number: 20070043663
    Abstract: An e-payment advice system includes a at least one payor computer system generating payment instructions and payment advice records. At least one web-based server receives and stores payment advice records from the payor and generates a unique identifier for each payment advice records and returns the identifier to the payor after receipt of the payment advice record. At least one payor banking computer system matches the identifier with the payment instructions and transmits the matched data to the payor banking computer system. At least one payee banking computer system transmits the identifier and a payment in accordance with the payment instructions to the payee banking computer system which transmits the unique identifier to the payee. The payee transmits the identifier to the web-based server which transmits the payment advice record identified by the identifier to the payee which will then close out the accounts receivable related to the payment advice.
    Type: Application
    Filed: February 17, 2006
    Publication date: February 22, 2007
    Inventor: Mark Simpson
  • Publication number: 20050259368
    Abstract: Termination of a high voltage device is achieved by a plurality of discrete deposits of charge that are deposited in varying volumes and/or spacing laterally along a termination region. The manner in which the volumes and/or spacing varies also varies between different layers of a multiple layer device. In a preferred embodiment, the variations are such that the field strength is substantially constant along any horizontal or vertical cross section of the termination region.
    Type: Application
    Filed: June 24, 2005
    Publication date: November 24, 2005
    Inventors: Ted Letavic, Mark Simpson
  • Patent number: 6927103
    Abstract: Termination of a high voltage device is achieved by a plurality of discrete deposits of charge that are deposited in varying volumes and/or spacing laterally along a termination region. The manner in which the volumes and/or spacing varies also varies between different layers of a multiple layer device. In a preferred embodiment, the variations are such that the field strength is substantially constant along any horizontal or vertical cross section of the termination region.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: August 9, 2005
    Assignee: Koninklijke Phillips Electronics N.V.
    Inventors: Ted Letavic, Mark Simpson
  • Publication number: 20050097249
    Abstract: Memory systems and methods are described. In one embodiment, a circuit board has front and back surfaces. At least one memory device having a plurality of pins is mounted on the front surface of the circuit board. At least one other memory device having a plurality of pins is mounted on the back surface of the circuit board. The memory devices are mounted on the circuit board such that at least some pins from the one memory device align with at least some pins of the other memory device to provide aligned pin pairs. A via is disposed in the circuit board and extends between and connects individual pins of an aligned pin pair.
    Type: Application
    Filed: November 4, 2003
    Publication date: May 5, 2005
    Inventors: William Oberlin, Mark Simpson, Srinivas Venkataraman
  • Publication number: 20050085023
    Abstract: A dual gate oxide high-voltage semiconductor device and method for forming the same are provided. Specifically, a device formed according to the present invention includes a semiconductor substrate, a buried oxide layer formed over the substrate, a silicon layer formed over the buried oxide layer, and a top oxide layer formed over the silicon layer. Adjacent an edge of the top oxide layer, a dual gate oxide is formed. The dual gate oxide allows both specific-on-resistance and breakdown voltage of the device to be optimized.
    Type: Application
    Filed: December 3, 2004
    Publication date: April 21, 2005
    Inventors: Theodore Letavic, Mark Simpson
  • Publication number: 20050028194
    Abstract: A video retrieval system is presented that allows a user to quickly and easily select and receive stories of interest from a video stream. The video retrieval system classifies stories and delivers samples of selected stories that match each user's current preference. The user's preferences may include particular broadcast networks, persons, story topics, keywords, and the like. Key frames of each selected story are sequentially displayed; when the user views a frame of interest, the user selects the story that is associated with the key frame for more detailed viewing. This invention is particularly well suited for targeted news retrieval. In a preferred embodiment, news stories are stored, and the selection of a news story for detailed viewing based on the associated key frames effects a playback of the selected news story. The principles of this invention also allows a user to effect a directed search of other types of broadcasts as well.
    Type: Application
    Filed: September 2, 2004
    Publication date: February 3, 2005
    Inventors: Jan Elenbaas, Nevenka Dimitrova, Thomas McGee, Mark Simpson, Jacquelyn Martino, Mohamed Abdel-Mottaleb, Marjorie Garrett, Carolyn Ramsey, Hsiang-Lung Wu, Ranjit Desai
  • Publication number: 20040232510
    Abstract: A hybrid semiconductor device is presented in which one or more diode regions are integrated into a transistor region. In a preferred embodiment the transistor region is a continuous (self-terminating) SOI LDMOS device in which are integrated one or more diode portions. Within the diode portions, since there is only one PN junction, the mechanism for breakdown failure due to bipolar turn-on is nonexistent. The diode regions are formed such that they have a lower breakdown voltage than the transistor region, and thus any transient voltage (or current) induced breakdown is necessarily contained in the diode regions. In a preferred embodiment, the breakdown voltage of the diode portions is lowered by narrowing their field plate length relative to the transistor portion of the device. This allows the device to survive any such breakdown without being destroyed, resulting in a more rugged and more reliable device.
    Type: Application
    Filed: July 2, 2004
    Publication date: November 25, 2004
    Inventors: John Petruzzello, Theodore James Letavic, Mark Simpson
  • Patent number: 6794719
    Abstract: A hybrid semiconductor device is presented in which one or more diode regions are integrated into a transistor region. In a preferred embodiment the transistor region is a continuous (self-terminating) SOI LDMOS device in which are integrated one or more diode portions. Within the diode portions, since there is only one PN junction, the mechanism for breakdown failure due to bipolar turn-on is nonexistent. The diode regions are formed such that they have a lower breakdown voltage than the transistor region, and thus any transient voltage (or current) induced breakdown is necessarily contained in the diode regions. In a preferred embodiment, the breakdown voltage of the diode portions is lowered by narrowing their field plate length relative to the transistor portion of the device. This allows the device to survive any such breakdown without being destroyed, resulting in a more rugged and more reliable device.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: September 21, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: John Petruzzello, Theodore James Letavic, Mark Simpson
  • Publication number: 20040104430
    Abstract: Termination of a high voltage device is achieved by a plurality of discrete deposits of charge that are deposited in varying volumes and/or spacing laterally along a termination region. The manner in which the volumes and/or spacing varies also varies between different layers of a multiple layer device. In a preferred embodiment, the variations are such that the field strength is substantially constant along any horizontal or vertical cross section of the termination region.
    Type: Application
    Filed: November 12, 2003
    Publication date: June 3, 2004
    Inventors: Ted Letavic, Mark Simpson
  • Patent number: 6642558
    Abstract: Termination of a high voltage device is achieved by a plurality of discrete deposits of charge that are deposited in varying volumes and/or spacing laterally along a termination region. The manner in which the volumes and/or spacing varies also varies between different layers of a multiple layer device. In a preferred embodiment, the variations are such that the field strength is substantially constant along any horizontal or vertical cross section of the termination region.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: November 4, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Ted Letavic, Mark Simpson
  • Patent number: 6604020
    Abstract: A pointer to teach a robot to repetitively manipulate a brazing nozzle is provided. In a preferred embodiment, the pointer allows the robot to manipulate the brazing nozzle at a preselected work distance away from a surface along a multi-dimensional path on a complex work piece. The pointer includes a base portion for connection with an end of a robot arm. The pointer additionally has a main body having a length inclusive of the base portion approximating the length of the brazing nozzle and the preselected work distance of the brazing nozzle away from the work piece. A contact portion of the pointer is continuous with the main body and is provided for contacting the work piece. The contact portion has two small parallel spaced surface flats. The surface flats of the contact portion are generally aligned in a common plane at the preselected work angle with respect to the robot arm.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: August 5, 2003
    Assignee: DaimlerChrysler Corporation
    Inventors: Mark Simpson, Anthony J. Osborne, John LeBlanc, Michael Roy
  • Publication number: 20020155646
    Abstract: An improved method and structure for a transistor device with a lateral drift region and a conducting top field plate is presented. The method consists of decreasing the gate to drain capacitance by means of decreasing the portion of the field plate that is connected to the gate electrode, and hence the effective overlap of the gate with the drift region and drain. This results in decreased energy dissipation in switching the transistor, and more efficient operation. The rate of decrease of the gate to drain capacitance is even faster at higher drain voltages, inuring in significant energy efficiencies in high voltage applications.
    Type: Application
    Filed: February 27, 2001
    Publication date: October 24, 2002
    Inventors: John Petruzzello, Theodore James Letavic, Mark Simpson
  • Patent number: 6468878
    Abstract: An improved method and structure for a transistor device with a lateral drift region and a conducting top field plate is presented. The method consists of decreasing the gate to drain capacitance by means of decreasing the portion of the field plate that is connected to the gate electrode, and hence the effective overlap of the gate with the drift region and drain. This results in decreased energy dissipation in switching the transistor, and more efficient operation. The rate of decrease of the gate to drain capacitance is even faster at higher drain voltages, inuring in significant energy efficiencies in high voltage applications.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: October 22, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: John Petruzzello, Theodore James Letavic, Mark Simpson
  • Patent number: 6414365
    Abstract: A thin layer SOI high-voltage device in which the drift charge is depleted using a three-dimensional MOS capacitor structure. The drift region of the high-voltage semiconductor device is doped with a graded charge profile which increases from source-to-drain. The drift region is physically patterned to create a stripe geometry where individual SOI stripes. Each SOI stripe is individually circumscribed longitudinally by a dielectric layer wherein each dielectric layer is longitudinally circumscribed by field plates of a conducting multi-capacitor field plate layer which is electrically shorted to the substrate. The resultant structure is a thin drift-region stripe which is completely enclosed by a MOS field plate, resulting in three-dimensional depletion upon application of a bias voltage between the SOI stripe and its encapsulating field plates.
    Type: Grant
    Filed: October 1, 2001
    Date of Patent: July 2, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Ted Letavic, Mark Simpson
  • Patent number: 6346451
    Abstract: A lateral thin-film Silicon-On-Insulator (SOI) device includes a semiconductor substrate, a buried insulating layer on the substrate and a lateral transistor device in an SOI layer on the buried insulating layer and having a source region of a first conductivity type formed in a body region of a second conductivity type opposite to that of the first. A lateral drift region of a first conductivity type is provided adjacent the body region, and a drain region of the first conductivity type is provided laterally spaced apart from the body region by the drift region. A gate electrode is provided over a part of the body region in which a channel region is formed during operation and extending over a part of the lateral drift region adjacent the body region, with the gate electrode being at least substantially insulated from the body region and drift region by an insulation region.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: February 12, 2002
    Assignee: Philips Electronics North America Corporation
    Inventors: Mark Simpson, Theodore Letavic
  • Patent number: 6314516
    Abstract: A method for configuring communications settings in a computer system is provided. The method includes receiving a configuration settings file. The configuration settings file includes global connection settings, a connection type, and connection type specific settings. A communications link is configured to address a service provider based on the global settings. An access device in the computer system is configured based on the connection type and the connection type specific settings.
    Type: Grant
    Filed: December 29, 1999
    Date of Patent: November 6, 2001
    Assignee: Compaq Computer Corporation
    Inventors: John M. Cagle, Mark R. Potter, Mohana Rao Mullapudi, Mark Simpson, Wolfgang M. Neubauer