Abstract: Microelectronic workpieces that have bump sites over bond-pads and methods of fabricating such bump sites. One embodiment of such a workpiece, for example, includes a substrate having a plurality of microelectronic dies comprising integrated circuitry and bond-pads, such as copper bond-pads, electrically coupled to the integrated circuitry. The workpiece further includes (a) a dielectric structure having a plurality of openings with sidewalls projecting from corresponding bond-pads, and (b) a plurality of caps over corresponding bond-pads. The individual caps can include a discrete portion of a barrier layer attached to the bond-pads and the sidewalls of the openings, and a discrete portion of a cap layer on the barrier layer. The caps are electrically isolated from each other and self-aligned with corresponding bond-pads without forming a mask layer over the cap layer.

Abstract: A wireless identification device including a housing; circuitry in the housing configured to provide a signal to identify the device in response to an interrogation signal; and a selectively actuated switch supported by the housing and controlling whether the circuitry identifies the device. A method of manufacturing a wireless identification device, the method comprising configuring circuitry to provide a signal to identify the device in response to an interrogation signal; coupling the circuitry to a push-on/push-off switch supported by the housing and controlling whether the circuitry provides the signal to identify the device; and encasing the circuitry in a housing such that the switch is actuable from outside the housing by touching a portion of the housing.

Abstract: A wireless identification device including a housing; circuitry in the housing configured to provide a signal to identify the device in response to an interrogation signal; and a selectively actuated switch supported by the housing and controlling whether the circuitry identifies the device. A method of manufacturing a wireless identification device, the method comprising configuring circuitry to provide a signal to identify the device in response to an interrogation signal; coupling the circuitry to a push-on/push-off switch supported by the housing and controlling whether the circuitry provides the signal to identify the device; and encasing the circuitry in a housing such that the switch is actuable from outside the housing by touching a portion of the housing.

Abstract: A wireless identification device including a housing; circuitry in the housing configured to provide a signal to identify the device in response to an interrogation signal; and a selectively actuated switch supported by the housing and controlling whether the circuitry identifies the device. A method of manufacturing a wireless identification device, the method comprising configuring circuitry to provide a signal to identify the device in response to an interrogation signal; coupling the circuitry to a push-on/push-off switch supported by the housing and controlling whether the circuitry provides the signal to identify the device; and encasing the circuitry in a housing such that the switch is actuable from outside the housing by touching a portion of the housing.

Abstract: A radio frequency identification device includes an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

Abstract: The present invention provides electronic communication devices, methods of forming electrical communication devices, and communications methods. An electronic communication device adapted to receive electronic signals includes: a housing comprising a substrate and an encapsulant; an integrated circuit provided within the housing and comprising transponder circuitry operable to communicate an identification signal responsive to receiving a polling signal; an antenna provided within the housing and being coupled with the transponder circuitry; and a ground plane provided within the housing and being spaced from the antenna and configured to shield some of the electronic signals from the antenna and reflect others of the electronic signals towards the antenna.

Abstract: An interconnect for testing semiconductor components includes interconnect contacts configured for bonding to, and then separation from component contacts on the components. The interconnect can be utilized with a method that includes the steps of bonding the interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component. During the separating step the solder-wettable layers are dissolved, reducing adhesion of the bonded electrical connections, and permitting separation of the component and interconnect.

Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.

Abstract: A method for testing a semiconductor component includes the steps of bonding an interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component. During the separating step the solder-wettable layers are dissolved, reducing adhesion of the bonded electrical connections, and permitting separation of the component and interconnect. The interconnect includes interconnect contacts configured for bonding to, and then separation from component contacts on the components.

Abstract: A method for testing a semiconductor component includes the steps of bonding an interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component. During the separating step the solder-wettable layers are dissolved, reducing adhesion of the bonded electrical connections, and permitting separation of the component and interconnect. The interconnect includes interconnect contacts configured for bonding to, and then separation from component contacts on the components.

Abstract: A radio frequency identification device includes an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

Abstract: A method for testing a semiconductor component includes the steps of bonding an interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component. During the separating step the solder-wettable layers are dissolved, reducing adhesion of the bonded electrical connections, and permitting separation of the component and interconnect. The interconnect includes interconnect contacts configured for bonding to, and then separation from component contacts on the components.

Abstract: An MRAM device having a plurality of MRAM cells formed of a fixed magnetic layer, a second soft magnetic layer and a dielectric layer interposed between the fixed magnetic layer and the soft magnetic layer. The MRAM cells are all formed simultaneously and at least some of the MRAM cells are designed to function as antifuse devices whereby the application of a selected electrical potential can short the antifuse device to thereby affect the functionality of the MRAM device.

Abstract: An adjustable radio frequency data communications device has a monolithic semiconductor integrated circuit with integrated circuitry, interrogation receiving circuitry provided on the monolithic integrated circuit forming at least part of the integrated circuitry and configured to receive an interrogation signal from the interrogator unit, an antenna electrically coupled to the interrogation receiving circuitry and configured to communicate with the remote interrogator unit, a power source electrically coupled to the integrated circuitry and configured to generate operating power for the communications device, and at least one of the antenna and the interrogation receiving circuitry having reconfigurable electrical characteristics, the electrical characteristics being reconfigurable to selectively tune the at least one of the antenna and the interrogation receiving circuitry within a range of tuned and detuned states to realize a desired receiver sensitivity of the communications device.

Abstract: The present invention relates to methods for forming through-wafer interconnects in semiconductor substrates and the resulting structures. In one embodiment, a method for forming a through-wafer interconnect includes providing a substrate having a pad on a surface thereof, depositing a passivation layer over the pad and the surface of the substrate, and forming an aperture through the passivation layer and the pad using a substantially continuous process. An insulative layer is deposited in the aperture followed by a conductive layer and a conductive fill. In another embodiment of the invention, a semiconductor device is formed including a first interconnect structure that extends through a conductive pad and is electrically coupled with the conductive pad while a second interconnect structure is formed through another conductive pad while being electrically isolated therefrom. Semiconductor devices and assemblies produced with the methods are also disclosed.

Abstract: Microelectronic imaging units and methods for manufacturing a plurality of imaging units at the wafer level are disclosed herein. In one embodiment, a method for manufacturing a plurality of imaging units includes providing an imager workpiece having a plurality of imaging dies including integrated circuits, external contacts electrically coupled to the integrated circuits, and image sensors operably coupled to the integrated circuits. The individual image sensors include at least one dark current pixel at a perimeter portion of the image sensor. The method includes depositing a cover layer onto the workpiece and over the image sensors. The method further includes patterning and selectively developing the cover layer to form discrete volumes of cover layer material over corresponding image sensors. The discrete volumes of cover layer material have sidewalls aligned with an inboard edge of the individual dark current pixels such that the dark current pixels are not covered by the discrete volumes.

Abstract: The invention relates to interconnects for an integrated circuit memory device. Embodiments of the invention include processes to fabricate interconnects for memory devices in relatively few steps. Embodiments of the invention further include memory devices with metallization layers having unequal pitch dimensions in different areas of the chip, thereby permitting simultaneous fabrication of array electrodes and electrical interconnects in different areas of the chip. This reduces the number of fabrication steps used to make interconnects, thereby speeding up fabrication and reducing production costs.

Abstract: A system for testing semiconductor components includes an interconnect, an alignment system for aligning a substrate to the interconnect, a bonding system for bonding the component to the interconnect, and a heating system for heating the component and the interconnect for separation. The interconnect includes interconnect contacts configured for bonding to, and then separation from component contacts on the components. The system can be utilized with a method that includes the steps of bonding the interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component.

Abstract: The present invention provides electronic communication devices, methods of forming electrical communication devices, and communications methods. An electronic communication device adapted to receive electronic signals includes: a housing comprising a substrate and an encapsulant; an integrated circuit provided within the housing and comprising transponder circuitry operable to communicate an identification signal responsive to receiving a polling signal; an antenna provided within the housing and being coupled with the transponder circuitry; and a ground plane provided within the housing and being spaced from the antenna and configured to shield some of the electronic signals from the antenna and reflect others of the electronic signals towards the antenna.

Abstract: An interconnect for testing semiconductor components includes interconnect contacts configured for bonding to, and then separation from component contacts on the components. The interconnect can be utilized with a method that includes the steps of bonding the interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component. During the separating step the solder-wettable layers are dissolved, reducing adhesion of the bonded electrical connections, and permitting separation of the component and interconnect.