Abstract: A method of forming a magnetic tunnel junction memory element and the resulting structure are disclosed. A magnetic tunnel junction memory element comprising a thick nonmagnetic layer between two ferromagnetic layers. The thick nonmagnetic layer has an opening in which a thinner tunnel barrier layer is disposed. The resistance of a magnetic tunnel junction memory element may be controlled by adjusting the surface area and/or thickness of the tunnel barrier layer without regard to the surface area of the ferromagnetic layers.

Abstract: A method for testing a semiconductor component includes the steps of bonding an interconnect to the component to form bonded electrical connections, applying test signals through the bonded electrical connections, and then separating the interconnect from the component. The bonding step can be performed using metallurgical bonding, and the separating step can be performed using solder-wettable and solder non-wettable metal layers on the interconnect or the component. During the separating step the solder-wettable layers are dissolved, reducing adhesion of the bonded electrical connections, and permitting separation of the component and interconnect. The interconnect includes interconnect contacts configured for bonding to, and then separation from component contacts on the components.

Abstract: A wireless identification device including a housing; circuitry in the housing configured to provide a signal to identify the device in response to an interrogation signal; and a selectively actuated switch supported by the housing and controlling whether the circuitry identifies the device. A method of manufacturing a wireless identification device, the method comprising configuring circuitry to provide a signal to identify the device in response to an interrogation signal; coupling the circuitry to a push-on/push-off switch supported by the housing and controlling whether the circuitry provides the signal to identify the device; and encasing the circuitry in a housing such that the switch is actuable from outside the housing by touching a portion of the housing.

Abstract: Microelectronic workpieces that have bump sites over bond-pads and methods of fabricating such bump sites. One embodiment of such a workpiece, for example, includes a substrate having a plurality of microelectronic dies comprising integrated circuitry and bond-pads, such as copper bond-pads, electrically coupled to the integrated circuitry. The workpiece further includes (a) a dielectric structure having a plurality of openings with sidewalls projecting from corresponding bond-pads, and (b) a plurality of caps over corresponding bond-pads. The individual caps can include a discrete portion of a barrier layer attached to the bond-pads and the sidewalls of the openings, and a discrete portion of a cap layer on the barrier layer. The caps are electrically isolated from each other and self-aligned with corresponding bond-pads without forming a mask layer over the cap layer.

Abstract: An adjustable radio frequency data communications device has a monolithic semiconductor integrated circuit with integrated circuitry, interrogation receiving circuitry provided on the monolithic integrated circuit forming at least part of the integrated circuitry and configured to receive an interrogation signal from the interrogator unit, an antenna electrically coupled to the interrogation receiving circuitry and configured to communicate with the remote interrogator unit, a power source electrically coupled to the integrated circuitry and configured to generate operating power for the communications device, and at least one of the antenna and the interrogation receiving circuitry having reconfigurable electrical characteristics, the electrical characteristics being reconfigurable to selectively tune the at least one of the antenna and the interrogation receiving circuitry within a range of tuned and detuned states to realize a desired receiver sensitivity of the communications device.

Abstract: Computer method and apparatus for collaborative web search operate in an intranet with non-existent or defective link structure. A search engine produces an initial search result list in response to a user query. A list optimizer reranks pages on the initial list based on implicit user recommendation or endorsement of pages. A last click heuristic defines user endorsement of a page. To form the final result list, the list optimizer scores each page according to reranking, a textual match (or information retrieval score) of the page with the query and an adjustment value.

Abstract: A technique for recommending products to a user (110a). According to the technique, the user requests (110a) a recommendation from a recommendation system (200). The recommendation system (200) generates a recommendation using a technique whose time complexity is less than O(m·n). The generated list is then presented to the user (110a).

Abstract: The invention relates to interconnects for an integrated circuit memory device. Embodiments of the invention include processes to fabricate interconnects for memory devices in relatively few steps. Embodiments of the invention further include memory devices with metallization layers having unequal pitch dimensions in different areas of the chip, thereby permitting simultaneous fabrication of array electrodes and electrical interconnects in different areas of the chip. This reduces the number of fabrication steps used to make interconnects, thereby speeding up fabrication and reducing production costs.

Abstract: A radio frequency identification device includes an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

Abstract: An integrated circuit includes operational circuitry; a sensor configured to sense an environmental parameter; and adjustment circuitry coupled to the sensor and to the operational circuitry and configured to affect the operational circuitry to at least partially counteract the effects of the environmental parameter. A method of testing an integrated circuit includes supporting a sensor in the integrated circuit and using the sensor to sense environmental data.

Abstract: A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.

Abstract: Logical logging to extend recovery is described. In one aspect, a dependency cycle between at least two objects is detected. The dependency cycle indicates that the two objects should be flushed simultaneously from a volatile main memory to a non-volatile memory to preserve those objects in the event of a system crash. One of the two objects is written to a stable of to break the dependency cycle. The other of the two objects is flushed to the non-volatile memory. The object that has been written to the stable log is then flushed to the stable log to the non-volatile memory.

Abstract: Structures and methods for providing magnetic shielding for integrated circuits are disclosed. The shielding comprises a foil or sheet of magnetically permeable material applied to an outer surface of a molded (e.g., epoxy) integrated circuit package. The foil can be held in place by adhesive or by mechanical means. The thickness of the shielding can be tailored to a customer's specific needs, and can be applied after all high temperature processing, such that a degaussed shield can be provided despite use of strong magnetic fields during high temperature processing, which fields are employed to maintain pinned magnetic layers within the integrated circuit.

Abstract: A microelectronic imager comprising an imaging unit and an optics unit attached to the imaging unit, and methods for packaging microelectronic imagers. In one embodiment, the imaging unit can include (a) a microelectronic die with an image sensor and a plurality of external contacts electrically coupled to the image sensor and (b) a first referencing element fixed to the imaging unit. The optics unit can include an optic member and a second referencing element fixed to the optics unit. The second referencing element is releasably seated with the first referencing element at a preset position in which the optic member is situated at a desired location relative to the image sensor.

Abstract: An MRAM device having a plurality of MRAM cells formed of a fixed magnetic layer, a second soft magnetic layer and a dielectric layer interposed between the fixed magnetic layer and the soft magnetic layer. The MRAM cells are all formed simultaneously and at least some of the MRAM cells are designed to function as antifuse devices whereby the application of a selected electrical potential can short the antifuse device to thereby affect the functionality of the MRAM device.

Abstract: A method and apparatus which provide one or more electromagnetic shield layers for integrated circuit chips containing electromagnetic circuit elements are disclosed. The shield layers may be in contact with the integrated circuit chip, including magnetic memory structures such as MRAMs, or in a flip-chip carrier, or both. A printed circuit board which supports the chip may also have one or more shield layers.

Abstract: A device for magnetically annealing magnetoresistive elements formed on wafers includes a heated chuck and a delivery mechanism for individually placing the wafers individually on the chuck one at a time. A coil is adjacent to the chuck and generates a magnetic field after the wafer is heated to a Néel temperature of an anti-ferromagnetic layer. A control system regulates the temperature of the heated chuck, the strength of the magnetic field, and a time period during which each chuck is heated to control the annealing process. The annealed elements are incorporated in the fabrication of magnetic memory devices.

Abstract: A microelectronic imager comprising an imaging unit and an optics unit attached to the imaging unit, and methods for packaging microelectronic imagers. In one embodiment, the imaging unit can include (a) a microelectronic die with an image sensor and a plurality of external contacts electrically coupled to the image sensor and (b) a first referencing element fixed to the imaging unit. The optics unit can include an optic member and a second referencing element fixed to the optics unit. The second referencing element is seated with the first referencing element at a fixed, preset position in which the optic member is situated at a desired location relative to the image sensor.

Abstract: A radio frequency identification device comprises an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

Abstract: An integrated circuit structure is formed using a damascene process that involves forming a trench or cavity for the structure in a temporary layer of material. A conductive material, such as copper, can then be deposited on the temporary layer to overfill the trench or cavity, and the excess conductive material can be removed by polishing down to the surface of the temporary layer. The integrated circuit structure can then be exposed by removing the temporary layer. One example of an integrated circuit structure that can be formed using this method is an upper electrode in an MRAM array. By using the process to form an upper electrode in an MRAM array, the process of forming a magnetic keeper around the upper electrode is advantageously simplified.