Patents by Inventor Marko J Tadjer

Marko J Tadjer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240234139
    Abstract: A method for growing nanocrystalline diamond (NCD) on Ga2O3 to provide thermal management in Ga2O3-based devices. A protective SiNx interlayer is deposited on the Ga2O3 before growth of the NCD layer to protect the Ga2O3 from damage caused during growth of the NCD layer. The presence of the NCD provides thermal management and enables improved performance of the Ga2O3-based device.
    Type: Application
    Filed: October 20, 2023
    Publication date: July 11, 2024
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Marko J. Tadjer, Joseph A. Spencer, Alan G. Jacobs, Hannah N. Masten, James Spencer Lundh, Karl D. Hobart, Travis J. Anderson, Tatyana I. Feygelson, Bradford B. Pate, Boris N. Feigelson
  • Patent number: 12020985
    Abstract: Methods for obtaining a free-standing thick (>5 ?m) epitaxial material layer or heterostructure stack and for transferring the thick epitaxial layer or stack to an arbitrary substrate. A thick epitaxial layer or heterostructure stack is formed on an engineered substrate, with a sacrificial layer disposed between the epitaxial layer and the engineered substrate. When the sacrificial layer is removed, the epitaxial layer becomes a thick freestanding layer that can be transferred to an arbitrary substrate, with the remaining engineered substrate being reusable for subsequent material layer growth. In an exemplary case, the material layer is a GaN layer and can be selectively bonded to an arbitrary substrate to selectively produce a Ga-polar or an N-polar GaN layer.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: June 25, 2024
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, Marko J. Tadjer, Karl D. Hobart
  • Publication number: 20240136180
    Abstract: A method for growing nanocrystalline diamond (NCD) on Ga2O3 to provide thermal management in Ga2O3-based devices. A protective SiNx interlayer is deposited on the Ga2O3 before growth of the NCD layer to protect the Ga2O3 from damage caused during growth of the NCD layer. The presence of the NCD provides thermal management and enables improved performance of the Ga2O3-based device.
    Type: Application
    Filed: October 19, 2023
    Publication date: April 25, 2024
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Marko J. Tadjer, Joseph A. Spencer, Alan G. Jacobs, Hannah N. Masten, James Spencer Lundh, Karl D. Hobart, Travis J. Anderson, Tatyana I. Feygelson, Bradford B. Pate, Boris N. Feigelson
  • Publication number: 20230420539
    Abstract: A self-aligned lithography process for the fabrication of an electronic device having predefined areas of a second semiconductor material having a second conductivity type deposited into trenches formed in a first semiconductor material layer having a first conductivity type. A single lithography mask is used for etching trenches in the first semiconductor material, enabling cleaning of the trenches, and providing defined areas for the deposition of the second semiconductor material into the first semiconductor material. The presence of the areas of the second semiconductor material within the first semiconductor material creates a heterojunction beneath a metal for the formation of a first type of contact to the first semiconductor material and a second type of contact to the second type of material. By using a single mask for the etching, cleaning, and filling steps, misalignment issues plaguing devices having small (1-2 ?m) feature sizes is eliminated.
    Type: Application
    Filed: June 23, 2023
    Publication date: December 28, 2023
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Joseph A. Spencer, Marko J. Tadjer, Alan G. Jacobs, Karl D. Hobart, Yuhao Zhang
  • Patent number: 11817318
    Abstract: A method for activating implanted dopants and repairing damage to dopant-implanted GaN to form n-type or p-type GaN. A GaN substrate is implanted with n- or p-type ions and is subjected to a high-temperature anneal to activate the implanted dopants and to produce planar n- or p-type doped areas within the GaN having an activated dopant concentration of about 1018-1022 cm?3. An initial annealing at a temperature at which the GaN is stable at a predetermined process temperature for a predetermined time can be conducted before the high-temperature anneal. A thermally stable cap can be applied to the GaN substrate to suppress nitrogen evolution from the GaN surface during the high-temperature annealing step. The high-temperature annealing can be conducted under N2 pressure to increase the stability of the GaN. The annealing can be conducted using laser annealing or rapid thermal annealing (RTA).
    Type: Grant
    Filed: March 1, 2023
    Date of Patent: November 14, 2023
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, James C. Gallagher, Marko J. Tadjer, Alan G. Jacobs, Boris N. Feigelson
  • Publication number: 20230352541
    Abstract: Semiconductor heterostructures having an engineered polarization. Semiconductor materials having specified crystallographic directions and specified polarizations are directly bonded to one another by means of atomic layer bonding without the use of any interfacial bonding materials, where spontaneous polarization of the two layers produced by joining the two materials by direct wafer bonding produces a strong 2DEG or 2DHG at the interface. Embodiments include GaN/AlN and AlN/GaN heterostructures having an N- or Ga-polar GaN layer directly bonded to an N- or Al-polar Al layer. Other embodiments can incorporate an InN epitaxial layer or an alloy incorporating an N-polar, Al-polar, or Ga-polar material having In, Al, or Ga in the crystal lattice, e.g., (InxAl1-xN), InxGa1-xN, AlxGa1-xN, InxAlyGa1-x-yN, where (0<x?1, 0<y?1, 0<x+y?1).
    Type: Application
    Filed: April 28, 2022
    Publication date: November 2, 2023
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Marko J. Tadjer, Michael A. Mastro, Mark Goorsky, Asif Khan, Samuel Graham, Jr.
  • Publication number: 20230352600
    Abstract: Ga2O3-based rectifier structure and method of forming the same. A Schottky diode structure is combined with a metal-oxide-semiconductor structure to provide a metal oxide-type Schottky barrier diode (MOSSBD) rectifier that includes an n-type ?-Ga2O3 drift layer on a ?-Ga2O3 substrate, the drift layer having a plurality of spaced-apart semi-insulating regions formed by in-situ ion implantation of acceptor species at predefined spatially defined regions of the drift layer to create alternating areas of n-type and semi-insulating regions within the n-type drift layer. The thus-formed structure achieves high forward bias current with low specific on-resistance when the anode is biased with positive voltage and low leakage current when the device is operated under reverse bias.
    Type: Application
    Filed: April 28, 2023
    Publication date: November 2, 2023
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Marko J. Tadjer, Hannah N. Masten, Joseph A. Spencer, Alan G. Jacobs, Karl D. Hobart, Yuhao Zhang
  • Publication number: 20230352571
    Abstract: Semiconductor heterostructures having an engineered polarization. Semiconductor materials having specified crystallographic directions and specified polarizations are directly bonded to one another by means of atomic layer bonding without the use of any interfacial bonding materials, where spontaneous polarization of the two layers produced by joining the two materials by direct wafer bonding produces a strong 2DEG or 2DHG at the interface. Embodiments include GaN/AIN and AlN/GaN heterostructures having an N- or Ga-polar GaN layer directly bonded to an N- or Al-polar Al layer. Other embodiments can incorporate an InN epitaxial layer or an alloy incorporating an N-polar, Al-polar, or Ga-polar material having In, Al, or Ga in the crystal lattice, e.g., (InxAl1-xN), InxGa1-xN, AlxGa1-xN, InxAlyGa1-x-yN, where (0<x?1, 0<y?1, 0<x+y?1).
    Type: Application
    Filed: April 28, 2022
    Publication date: November 2, 2023
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Marko J. Tadjer, Michael A. Mastro, Mark Goorsky, Asif Khan, Samuel Graham, JR.
  • Publication number: 20230207323
    Abstract: A method for activating implanted dopants and repairing damage to dopant-implanted GaN to form n-type or p-type GaN. A GaN substrate is implanted with n- or p-type ions and is subjected to a high-temperature anneal to activate the implanted dopants and to produce planar n- or p-type doped areas within the GaN having an activated dopant concentration of about 1018-1022 cm?3. An initial annealing at a temperature at which the GaN is stable at a predetermined process temperature for a predetermined time can be conducted before the high-temperature anneal. A thermally stable cap can be applied to the GaN substrate to suppress nitrogen evolution from the GaN surface during the high-temperature annealing step. The high-temperature annealing can be conducted under N2 pressure to increase the stability of the GaN. The annealing can be conducted using laser annealing or rapid thermal annealing (RTA).
    Type: Application
    Filed: March 1, 2023
    Publication date: June 29, 2023
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, James C. Gallagher, Marko J. Tadjer, Alan G. Jacobs, Boris N. Feigelson
  • Patent number: 11634834
    Abstract: A method for growing polycrystalline diamond films having engineered grain growth and microstructure. Grain growth of a polycrystalline diamond film on a substrate is manipulated by growing the diamond on a nanopatterned substrate having features on the order of the initial grain size of the diamond film. By growing the diamond on such nanopatterned substrates, the crystal texture of a polycrystalline diamond film can be engineered to favor the preferred <110> orientation texture, which in turn enhances the thermal conductivity of the diamond film.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: April 25, 2023
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Tatyana I. Feygelson, Marko J. Tadjer, Travis J. Anderson, Andrew D. Koehler, Samuel Graham, Jr., Mark Goorsky, Zhe Cheng, Luke Yates, Tingyu Bai, Yekan Wang
  • Publication number: 20230074175
    Abstract: A method for controlling a concentration of donors in an Al-alloyed gallium oxide crystal structure includes implanting a Group IV element as a donor impurity into the crystal structure with an ion implantation process and annealing the implanted crystal structure to activate the Group IV element to form an electrically conductive region. The method may further include depositing one or more electrically conductive materials on at least a portion of the implanted crystal structure to form an ohmic contact. Examples of semiconductor devices are also disclosed and include a layer of an Al-alloyed gallium oxide crystal structure, at least one region including the crystal structure implanted with a Group IV element as a donor impurity with an ion implantation process and annealed to activate the Group IV element, an ohmic contact including one or more electrically conductive materials deposited on the at least one region.
    Type: Application
    Filed: September 8, 2022
    Publication date: March 9, 2023
    Inventors: Rebecca L. PETERSON, Ming-Hsun LEE, Alan G. JACOBS, Marko J. TADJER
  • Patent number: 11532478
    Abstract: A method for activating implanted dopants and repairing damage to dopant-implanted GaN to form n-type or p-type GaN. A GaN substrate is implanted with n- or p-type ions and is subjected to a high-temperature anneal to activate the implanted dopants and to produce planar n- or p-type doped areas within the GaN having an activated dopant concentration of about 1018-1022 cm?3. An initial annealing at a temperature at which the GaN is stable at a predetermined process temperature for a predetermined time can be conducted before the high-temperature anneal. A thermally stable cap can be applied to the GaN substrate to suppress nitrogen evolution from the GaN surface during the high-temperature annealing step. The high-temperature annealing can be conducted under N2 pressure to increase the stability of the GaN. The annealing can be conducted using laser annealing or rapid thermal annealing (RTA).
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: December 20, 2022
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, James C. Gallagher, Marko J. Tadjer, Alan G. Jacobs, Boris N. Feigelson
  • Publication number: 20220254639
    Abstract: A method for activating implanted dopants and repairing damage to dopant-implanted GaN to form n-type or p-type GaN. A GaN substrate is implanted with n- or p-type ions and is subjected to a high-temperature anneal to activate the implanted dopants and to produce planar n- or p-type doped areas within the GaN having an activated dopant concentration of about 1018-1022 cm?3. An initial annealing at a temperature at which the GaN is stable at a predetermined process temperature for a predetermined time can be conducted before the high-temperature anneal. A thermally stable cap can be applied to the GaN substrate to suppress nitrogen evolution from the GaN surface during the high-temperature annealing step. The high-temperature annealing can be conducted under N2 pressure to increase the stability of the GaN. The annealing can be conducted using laser annealing or rapid thermal annealing (RTA).
    Type: Application
    Filed: January 26, 2022
    Publication date: August 11, 2022
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, James C. Gallagher, Marko J. Tadjer, Alan G. Jacobs, Boris N. Feigelson
  • Patent number: 11342420
    Abstract: Current conducting devices and methods for their formation are disclosed. Described are vertical current devices that include a substrate, an n-type material layer, a plurality of p-type gates, and a source. The n-type material layer disposed on the substrate and includes a current channel. A plurality of p-type gates are disposed on opposite sides of the current channel. A source is disposed on a distal side of the current channel with respect to the substrate. The n-type material layer comprises beta-gallium oxide.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: May 24, 2022
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Francis J. Kub, Travis J. Anderson, Marko J. Tadjer, Andrew D. Koehler, Karl D. Hobart
  • Publication number: 20220059353
    Abstract: A method for activating implanted dopants and repairing damage to dopant-implanted GaN to form n-type or p-type GaN. A GaN substrate is implanted with n- or p-type ions and is subjected to a high-temperature anneal to activate the implanted dopants and to produce planar n- or p-type doped areas within the GaN having an activated dopant concentration of about 1018-1022 cm?3. An initial annealing at a temperature at which the GaN is stable at a predetermined process temperature for a predetermined time can be conducted before the high-temperature anneal. A thermally stable cap can be applied to the GaN substrate to suppress nitrogen evolution from the GaN surface during the high-temperature annealing step. The high-temperature annealing can be conducted under N2 pressure to increase the stability of the GaN. The annealing can be conducted using laser annealing or rapid thermal annealing (RTA).
    Type: Application
    Filed: November 8, 2021
    Publication date: February 24, 2022
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, James C. Gallagher, Marko J. Tadjer, Alan G. Jacobs, Boris N. Feigelson
  • Publication number: 20220059352
    Abstract: A method for activating implanted dopants and repairing damage to dopant-implanted GaN to form n-type or p-type GaN. A GaN substrate is implanted with n- or p-type ions and is subjected to a high-temperature anneal to activate the implanted dopants and to produce planar n- or p-type doped areas within the GaN having an activated dopant concentration of about 1018-1022 cm?3. An initial annealing at a temperature at which the GaN is stable at a predetermined process temperature for a predetermined time can be conducted before the high-temperature anneal. A thermally stable cap can be applied to the GaN substrate to suppress nitrogen evolution from the GaN surface during the high-temperature annealing step. The high-temperature annealing can be conducted under N2 pressure to increase the stability of the GaN. The annealing can be conducted using laser annealing or rapid thermal annealing (RTA).
    Type: Application
    Filed: November 8, 2021
    Publication date: February 24, 2022
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, James C. Gallagher, Marko J. Tadjer, Alan G. Jacobs, Boris N. Feigelson
  • Patent number: 11201058
    Abstract: A method for activating implanted dopants and repairing damage to dopant-implanted GaN to form n-type or p-type GaN. A GaN substrate is implanted with n- or p-type ions and is subjected to a high-temperature anneal to activate the implanted dopants and to produce planar n- or p-type doped areas within the GaN having an activated dopant concentration of about 1018-1022 cm?3. An initial annealing at a temperature at which the GaN is stable at a predetermined process temperature for a predetermined time can be conducted before the high-temperature anneal. A thermally stable cap can be applied to the GaN substrate to suppress nitrogen evolution from the GaN surface during the high-temperature annealing step. The high-temperature annealing can be conducted under N2 pressure to increase the stability of the GaN. The annealing can be conducted using laser annealing or rapid thermal annealing (RTA).
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: December 14, 2021
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, James C. Gallagher, Marko J. Tadjer, Alan G. Jacobs, Boris N. Feigelson
  • Publication number: 20210381127
    Abstract: A method for growing polycrystalline diamond films having engineered grain growth and microstructure. Grain growth of a polycrystalline diamond film on a substrate is manipulated by growing the diamond on a nanopatterned substrate having features on the order of the initial grain size of the diamond film. By growing the diamond on such nanopatterned substrates, the crystal texture of a polycrystalline diamond film can be engineered to favor the preferred <110> orientation texture, which in turn enhances the thermal conductivity of the diamond film.
    Type: Application
    Filed: August 24, 2021
    Publication date: December 9, 2021
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Karl D. Hobart, Tatyana I. Feygelson, Marko J. Tadjer, Travis J. Anderson, Andrew D. Koehler, Samuel Graham, JR., Mark Goorsky, Zhe Cheng, Luke Yates, Tingyu Bai, Yekan Wang
  • Publication number: 20210375680
    Abstract: Methods for obtaining a free-standing thick (>5 ?m) epitaxial material layer or heterostructure stack and for transferring the thick epitaxial layer or stack to an arbitrary substrate. A thick epitaxial layer or heterostructure stack is formed on an engineered substrate, with a sacrificial layer disposed between the epitaxial layer and the engineered substrate. When the sacrificial layer is removed, the epitaxial layer becomes a thick freestanding layer that can be transferred to an arbitrary substrate, with the remaining engineered substrate being reusable for subsequent material layer growth. In an exemplary case, the material layer is a GaN layer and can be selectively bonded to an arbitrary substrate to selectively produce a Ga-polar or an N-polar GaN layer.
    Type: Application
    Filed: May 24, 2021
    Publication date: December 2, 2021
    Applicant: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Travis J. Anderson, Marko J. Tadjer, Karl D. Hobart
  • Patent number: 11171055
    Abstract: A method of cleaving includes providing a substrate. Optionally, the substrate includes ?-gallium oxide, hexagonal zinc sulfide, or magnesium selenide. The substrate includes at least one natural cleave plane and a crystallinity. The substrate is cleaved along a first natural cleave plane of the at least one natural cleave plane. The cleaving the substrate along the first natural cleave plane includes the following. A micro-crack is generated in the substrate while maintaining the crystallinity adjacent to the micro-crack by generating a plurality of phonons in the substrate, the micro-crack comprising a micro-crack direction along the first natural cleave plane. The micro-crack is propagated along the first natural cleave plane while maintaining the crystallinity adjacent to the micro-crack. Optionally, generating a micro-crack in the substrate by generating a plurality of phonons in the substrate includes generating the plurality of phonons by electron-hole recombination.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: November 9, 2021
    Assignee: The Government of the United States of America, as represented by the Secretary of the Navy
    Inventors: Nadeemullah A. Mahadik, Robert E. Stahlbush, Marko J. Tadjer, Karl D. Hobart, Francis J. Kub