Patents by Inventor Marko Tuominen

Marko Tuominen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7476618
    Abstract: A method for enhancing the reliability of copper interconnects and/or contacts, such as the bottom of vias exposing top surfaces of buried copper, or at the top of copper lines just after CMP. The method comprises contacting the exposed copper surface with a vapor phase compound of a noble metal and selectively forming a layer of the noble metal on the exposed copper surface, either by a copper replacement reaction or selective deposition (e.g., ALD or CVD) of the noble metal.
    Type: Grant
    Filed: October 18, 2005
    Date of Patent: January 13, 2009
    Assignee: ASM Japan K.K.
    Inventors: Olli V. Kilpelä, Wonyong Koh, Hannu A. Huotari, Marko Tuominen, Miika Leinikka
  • Publication number: 20080274276
    Abstract: An apparatus and method improves heating of a solid precursor inside a sublimation vessel. In one embodiment, inert, thermally conductive elements are interspersed among units of solid precursor. For example the thermally conductive elements can comprise a powder, beads, rods, fibers, etc. In one arrangement, microwave energy can directly heat the thermally conductive elements.
    Type: Application
    Filed: July 10, 2008
    Publication date: November 6, 2008
    Applicant: ASM INTERNATIONAL N.V.
    Inventors: Marko Tuominen, Eric Shero, Mohith Verghese
  • Publication number: 20080200019
    Abstract: Processes are provided for selectively depositing thin films comprising one or more noble metals on a substrate by vapor deposition processes. In some embodiments, atomic layer deposition (ALD) processes are used to deposit a noble metal containing thin film on a high-k material, metal, metal nitride or other conductive metal compound while avoiding deposition on a lower k insulator such as silicon oxide. The ability to deposit on a first surface, such as a high-k material, while avoiding deposition on a second surface, such as a silicon oxide or silicon nitride surface, may be utilized, for example, in the formation of a gate electrode.
    Type: Application
    Filed: March 14, 2006
    Publication date: August 21, 2008
    Inventors: Hannu Huotari, Marko Tuominen, Miika Leinikka
  • Publication number: 20070163488
    Abstract: Process for producing silicon oxide containing thin films on a growth substrate by the ALCVD method. In the process, a vaporisable silicon compound is bonded to the growth substrate, and the bonded silicon compound is converted to silicon dioxide. The invention comprises using a silicon compound which contains at least one organic ligand and the bonded silicon compound is converted to silicon dioxide by contacting it with a vaporised, reactive oxygen source, in particular with ozone. The present invention provides a controlled process for growing controlling thin films containing SiO2, with sufficiently short reaction times.
    Type: Application
    Filed: December 22, 2006
    Publication date: July 19, 2007
    Inventors: Eva Tois, Suvi Haukka, Marko Tuominen
  • Publication number: 20070036892
    Abstract: The invention relates generally to processes for enhancing the deposition of noble metal thin films on a substrate by atomic layer deposition. Treatment with gaseous halides or metalorganic compounds reduces the incubation time for deposition of noble metals on particular surfaces. The methods may be utilized to facilitate selective deposition. For example, selective deposition of noble metals on high-k materials relative to insulators can be enhanced by pretreatment with halide reactants. In addition, halide treatment can be used to avoid deposition on the quartz walls of the reaction chamber.
    Type: Application
    Filed: March 14, 2006
    Publication date: February 15, 2007
    Inventors: Suvi Haukka, Marko Tuominen, Antti Rahtu
  • Publication number: 20070026654
    Abstract: Processes are provided for selectively depositing thin films comprising one or more noble metals on a substrate by vapor deposition processes. In some embodiments, atomic layer deposition (ALD) processes are used to deposit a noble metal containing thin film on a high-k material, metal, metal nitride or other conductive metal compound while avoiding deposition on a lower k insulator such as silicon oxide. The ability to deposit on a first surface, such as a high-k material, while avoiding deposition on a second surface, such as a silicon oxide or silicon nitride surface, may be utilized, for example, in the formation of a gate electrode.
    Type: Application
    Filed: March 14, 2006
    Publication date: February 1, 2007
    Inventors: Hannu Huotari, Marko Tuominen, Miika Leinikka
  • Publication number: 20060292872
    Abstract: Germanium has higher mobility than silicon and therefore is considered to be a good alternative semiconductor for CMOS technology. Surface treatments a can facilitate atomic layer deposition (ALD) of thin films, such as high-k dielectric layers, on germanium substrates. Surface treatment can comprise the formation of a thin layer of GeOx or GeOxNy. After surface treatment and prior to deposition of the desired thin film, a passivation layer may be deposited on the substrate. The passivation layer may be, for example, a metal oxide layer deposited by ALD.
    Type: Application
    Filed: January 20, 2006
    Publication date: December 28, 2006
    Inventors: Suvi Haukka, Marko Tuominen, Antti Rahtu
  • Publication number: 20060121733
    Abstract: A method for enhancing the reliability of copper interconnects and/or contacts, such as the bottom of vias exposing top surfaces of buried copper, or at the top of copper lines just after CMP. The method comprises contacting the exposed copper surface with a vapor phase compound of a noble metal and selectively forming a layer of the noble metal on the exposed copper surface, either by a copper replacement reaction or selective deposition (e.g., ALD or CVD) of the noble metal.
    Type: Application
    Filed: October 18, 2005
    Publication date: June 8, 2006
    Inventors: Olli Kilpela, Wonyong Koh, Hannu Huotari, Marko Tuominen, Miika Leinikka
  • Patent number: 7045406
    Abstract: A method forms a gate stack for a semiconductor device with a desired work function of the gate electrode. The work function is adjusted by changing the overall electronegativity of the gate electrode material in the region that determines the work function of the gate electrode during the gate electrode deposition. The gate stack is deposited by an atomic layer deposition type process and the overall electronegativity of the gate electrode is tuned by introducing at least one pulse of an additional precursor to selected deposition cycles of the gate electrode. The tuning of the work function of the gate electrode can be done not only by introducing additional material into the gate electrode, but also by utilizing the effects of a graded mode deposition and thickness variations of the lower gate part of the gate electrode in combination with the effects that the incorporation of the additional material pulses offers.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: May 16, 2006
    Assignee: ASM International, N.V.
    Inventors: Hannu Huotari, Suvi Haukka, Marko Tuominen
  • Patent number: 7038284
    Abstract: An ultrathin aluminum oxide and lanthanide layers, particularly formed by an atomic layer deposition (ALD) type process, serve as interface layers between two or more materials. The interface layers can prevent oxidation of a substrate and can prevent diffusion of molecules between the materials. In the illustrated embodiments, a high-k dielectric material is sandwiched between two layers of aluminum oxide or lanthanide oxide in the formation of a transistor gate dielectric or a memory cell dielectric. Aluminum oxides can serve as a nucleation layer with less than a full monolayer of aluminum oxide. One monolayer or greater can also serve as a diffusion barrier, protecting the substrate from oxidation and the high-k dielectric from impurity diffusion. Nanolaminates can be formed with multiple alternating interface layers and high-k layers, where intermediate interface layers can break up the crystal structure of the high-k materials and lower leakage levels.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: May 2, 2006
    Assignee: ASM International, N.V.
    Inventors: Suvi P. Haukka, Jarmo Skarp, Marko Tuominen
  • Publication number: 20060024439
    Abstract: Abstract of the Disclosure An apparatus and method improves heating of a solid precursor inside a sublimation vessel. In one embodiment, inert, thermally conductive elements are interspersed among units of solid precursor. For example the thermally conductive elements can comprise a powder, beads, rods, fibers, etc. In one arrangement, microwave energy can directly heat the thermally conductive elements.
    Type: Application
    Filed: June 16, 2003
    Publication date: February 2, 2006
    Applicant: ASM INTERNATIONAL N.V.
    Inventors: MARKO TUOMINEN, ERIC SHERO, MOHITH VERGHESE
  • Patent number: 6806145
    Abstract: The present invention relates to methods for forming dielectric layers on a substrate, such as in an integrated circuit. In one aspect of the invention, a thin interfacial layer is formed. The interfacial layer is preferably an oxide layer and a high-k material is preferably deposited on the interfacial layer by a process that does not cause substantial further growth of the interfacial layer. For example, water vapor may be used as an oxidant source during high-k deposition at less than or equal to about 300° C.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: October 19, 2004
    Assignee: ASM International, N.V.
    Inventors: Suvi Haukka, Eric Shero, Christophe Pomarede, Jan Willem Hub Maes, Marko Tuominen
  • Patent number: 6794314
    Abstract: A method is disclosed for forming an ultrathin oxide layer of uniform thickness. The method is particularly advantageous for producing uniformly thin interfacial oxides beneath materials of high dielectric permitivity, or uniformly thin passivation oxides. Hydrofluoric (HF) etching of a silicon surface, for example, is followed by termination of the silicon surface with ligands larger than H or F, particularly hydroxyl, alkoxy or carboxylic tails. The substrate is oxidized with the surface termination in place. The surface termination and relatively low temperatures moderate the rate of oxidation, such that a controllable thickness of oxide is formed. In some embodiments, the ligand termination is replaced with OH prior to further deposition. The deposition preferably includes alternating, self-limiting chemistries in an atomic layer deposition process, though any other suitable deposition process can be used.
    Type: Grant
    Filed: October 25, 2002
    Date of Patent: September 21, 2004
    Assignee: ASM International N.V.
    Inventors: Ivo Raaijmakers, Yong-Bae Kim, Marko Tuominen, Suvi P. Haukka
  • Patent number: 6759325
    Abstract: Method and structures are provided for conformal lining of dual damascene structures in integrated circuits, and particularly of openings formed in porous materials. Trenches and contact vias are formed in insulating layers. The pores on the sidewalls of the trenches and vias are blocked, and then the structure is exposed to alternating chemistries to form monolayers of a desired lining material. In exemplary process flows chemical or physical vapor deposition (CVD or PVD) of a sealing layer blocks the pores due to imperfect conformality. An alternating process can also be arranged by selection of pulse separation and/or pulse duration to achieve reduced conformality relative to a self-saturating, self-limiting atomic layer deposition (ALD) process. In still another arrangement, layers with anisotropic pore structures can be sealed by selectively melting upper surfaces. Blocking is followed by a self-limiting, self-saturating atomic layer deposition (ALD) reactions without significantly filling the pores.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: July 6, 2004
    Assignee: ASM Microchemistry Oy
    Inventors: Ivo Raaijmakers, Pekka T. Soininen, Ernst Granneman, Suvi Haukka, Kai-Erik Elers, Marko Tuominen, Hessel Sprey, Herbert Terhorst, Menso Hendriks
  • Publication number: 20040106261
    Abstract: A method forms a gate stack for a semiconductor device with a desired work function of the gate electrode. The work function is adjusted by changing the overall electronegativity of the gate electrode material in the region that determines the work function of the gate electrode during the gate electrode deposition. The gate stack is deposited by an atomic layer deposition type process and the overall electronegativity of the gate electrode is tuned by introducing at least one pulse of an additional precursor to selected deposition cycles of the gate electrode. The tuning of the work function of the gate electrode can be done not only by introducing additional material into the gate electrode, but also by utilizing the effects of a graded mode deposition and thickness variations of the lower gate part of the gate electrode in combination with the effects that the incorporation of the additional material pulses offers.
    Type: Application
    Filed: May 5, 2003
    Publication date: June 3, 2004
    Applicant: ASM International N.V.
    Inventors: Hannu Huotari, Suvi Haukka, Marko Tuominen
  • Publication number: 20040065253
    Abstract: Process for producing silicon oxide containing thin films on a growth substrate by the ALCVD method. In the process, a vaporisable silicon compound is bonded to the growth substrate, and the bonded silicon compound is converted to silicon dioxide. The invention comprises using a silicon compound which contains at least one organic ligand and the bonded silicon compound is converted to silicon dioxide by contacting it with a vaporised, reactive oxygen source, in particular with ozone. The present invention provides a controlled process for growing controlling thin films containing SiO2, with sufficiently short reaction times.
    Type: Application
    Filed: October 3, 2003
    Publication date: April 8, 2004
    Inventors: Eva Tois, Suvi Haukka, Marko Tuominen
  • Publication number: 20040043557
    Abstract: An ultrathin aluminum oxide and lanthanide layers, particularly formed by an atomic layer deposition (ALD) type process, serve as interface layers between two or more materials. The interface layers can prevent oxidation of a substrate and can prevent diffusion of molecules between the materials. In the illustrated embodiments, a high-k dielectric material is sandwiched between two layers of aluminum oxide or lanthanide oxide in the formation of a transistor gate dielectric or a memory cell dielectric. Aluminum oxides can serve as a nucleation layer with less than a full monolayer of aluminum oxide. One monolayer or greater can also serve as a diffusion barrier, protecting the substrate from oxidation and the high-k dielectric from impurity diffusion. Nanolaminates can be formed with multiple alternating interface layers and high-k layers, where intermediate interface layers can break up the crystal structure of the high-k materials and lower leakage levels.
    Type: Application
    Filed: September 2, 2003
    Publication date: March 4, 2004
    Inventors: Suvi P. Haukka, Jarmo Skarp, Marko Tuominen
  • Publication number: 20030232138
    Abstract: An apparatus and method improves heating of a solid precursor inside a sublimation vessel. In one embodiment, inert, thermally conductive elements are interspersed among units of solid precursor. For example the thermally conductive elements can comprise a powder, beads, rods, fibers, etc. In one arrangement, microwave energy can directly heat the thermally conductive elements.
    Type: Application
    Filed: June 16, 2003
    Publication date: December 18, 2003
    Inventors: Marko Tuominen, Eric Shero, Mohith Verghese
  • Patent number: 6660660
    Abstract: An ultrathin aluminum oxide and lanthanide layers, particularly formed by an atomic layer deposition (ALD) type process, serve as interface layers between two or more materials. The interface layers can prevent oxidation of a substrate and can prevent diffusion of molecules between the materials. In the illustrated embodiments, a high-k dielectric material is sandwiched between two layers of aluminum oxide or lanthanide oxide in the formation of a transistor gate dielectric or a memory cell dielectric. Aluminum oxides can serve as a nucleation layer with less than a full monolayer of aluminum oxide. One monolayer or greater can also serve as a diffusion barrier, protecting the substrate from oxidation and the high-k dielectric from impurity diffusion. Nanolaminates can be formed with multiple alternating interface layers and high-k layers, where intermediate interface layers can break up the crystal structure of the high-k materials and lower leakage levels.
    Type: Grant
    Filed: August 31, 2001
    Date of Patent: December 9, 2003
    Assignee: ASM International, NV.
    Inventors: Suvi P. Haukka, Marko Tuominen
  • Publication number: 20030188682
    Abstract: Process for producing silicon oxide containing thin films on a growth substrate by the ALCVD method. In the process, a vaporisable silicon compound is bonded to the growth substrate, and the bonded silicon compound is converted to silicon dioxide. The invention comprises using a silicon compound which contains at least one organic ligand and the bonded silicon compound is converted to silicon dioxide by contacting it with a vaporised, reactive oxygen source, in particular with ozone. The present invention provides a controlled process for growing controlling thin films containing SiO2, with sufficiently short reaction times.
    Type: Application
    Filed: August 27, 2002
    Publication date: October 9, 2003
    Applicant: ASM Microchemistry OY
    Inventors: Eva Tois , Suvi Haukka , Marko Tuominen