Patents by Inventor Markus Heinrici

Markus Heinrici has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11195713
    Abstract: In one aspect, a method of forming a silicon-insulator layer is provided. The method includes arranging a silicon structure in a plasma etch process chamber and applying a plasma to the silicon structure in the plasma etch process chamber at a temperature of the silicon structure equal to or below 100° C. The plasma includes a component and a halogen derivate, thereby forming the silicon-insulator layer. The silicon-insulator layer includes silicon and the component. In another aspect, a semiconductor device is provided having a silicon-insulator layer formed by the method.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: December 7, 2021
    Assignee: Infineon Technologies AG
    Inventors: Joachim Hirschler, Georg Ehrentraut, Christoffer Erbert, Klaus Goeschl, Markus Heinrici, Michael Hutzler, Wolfgang Koell, Stefan Krivec, Ingmar Neumann, Mathias Plappert, Michael Roesner, Olaf Storbeck
  • Patent number: 10967450
    Abstract: A method of yielding a thinner product wafer from a thicker base SiC wafer cut from a SiC ingot includes: supporting the base SiC wafer with a support substrate: and while the base SiC wafer is supported by the support substrate, cutting through the base SiC wafer in a direction parallel to a first main surface of the base SiC wafer using a wire as part of a wire electrical discharge machining (WEDM) process, to separate the product wafer from the base SiC wafer, the product wafer being attached to the support substrate when cut from the base SiC wafer.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: April 6, 2021
    Assignee: Infineon Technologies AG
    Inventors: Nirdesh Ojha, Francisco Javier Santos Rodriguez, Roland Rupp, Markus Heinrici, Karin Delalut, Claudia Friza
  • Publication number: 20190385842
    Abstract: In one aspect, a method of forming a silicon-insulator layer is provided. The method includes arranging a silicon structure in a plasma etch process chamber and applying a plasma to the silicon structure in the plasma etch process chamber at a temperature of the silicon structure equal to or below 100° C. The plasma includes a component and a halogen derivate, thereby forming the silicon-insulator layer. The silicon-insulator layer includes silicon and the component. In another aspect, a semiconductor device is provided having a silicon-insulator layer formed by the method.
    Type: Application
    Filed: May 30, 2019
    Publication date: December 19, 2019
    Inventors: Joachim Hirschler, Georg Ehrentraut, Christoffer Erbert, Klaus Goeschl, Markus Heinrici, Michael Hutzler, Wolfgang Koell, Stefan Krivec, Ingmar Neumann, Mathias Plappert, Michael Roesner, Olaf Storbeck
  • Publication number: 20190337069
    Abstract: A method of yielding a thinner product wafer from a thicker base SiC wafer cut from a SiC ingot includes: supporting the base SiC wafer with a support substrate: and while the base SiC wafer is supported by the support substrate, cutting through the base SiC wafer in a direction parallel to a first main surface of the base SiC wafer using a wire as part of a wire electrical discharge machining (WEDM) process, to separate the product wafer from the base SiC wafer, the product wafer being attached to the support substrate when cut from the base SiC wafer.
    Type: Application
    Filed: May 4, 2018
    Publication date: November 7, 2019
    Inventors: Nirdesh Ojha, Francisco Javier Santos Rodriguez, Roland Rupp, Markus Heinrici, Karin Delalut, Claudia Friza
  • Patent number: 10453806
    Abstract: A method for forming a semiconductor device and semiconductor device is disclosed. In one example, the method includes forming a silicone layer on a semiconductor die. The method further includes plasma treating a silicone surface of the silicone layer. A surfactant is deposited on the plasma-treated silicone surface of the silicone layer to obtain a silicone surface at least partly covered by surfactant. A mold is formed on the silicone surface at least partly covered by surfactant. The surfactant includes surfactant molecules comprising an inorganic skeleton terminated by organic compounds.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: October 22, 2019
    Assignee: Infineon Teohnologies Austria AG
    Inventors: Joachim Hirschler, Christoffer Erbert, Markus Heinrici, Mathias Plappert, Caterina Travan
  • Patent number: 10373868
    Abstract: According to various embodiments, a method for processing a substrate may include: processing a plurality of device regions in a substrate separated from each other by dicing regions, each device region including at least one electronic component; wherein processing each device region of the plurality of device regions includes: forming a recess into the substrate in the device region, wherein the recess is defined by recess sidewalls of the substrate, wherein the recess sidewalls are arranged in the device region; forming a contact pad in the recess to electrically connect the at least one electronic component, wherein the contact pad has a greater porosity than the recess sidewalls; and singulating the plurality of device regions from each other by dicing the substrate in the dicing region.
    Type: Grant
    Filed: January 18, 2016
    Date of Patent: August 6, 2019
    Assignees: INFINEON TECHNOLOGIES AUSTRIA AG, TECHNISCHE UNIVERSITAET GRAZ
    Inventors: Martin Mischitz, Markus Heinrici, Michael Roesner, Oliver Hellmund, Caterina Travan, Manfred Schneegans, Peter Irsigler, Friedrich Kroener
  • Publication number: 20180145038
    Abstract: A method for forming a semiconductor device and semiconductor device is disclosed. In one example, the method includes forming a silicone layer on a semiconductor die. The method further includes plasma treating a silicone surface of the silicone layer. A surfactant is deposited on the plasma-treated silicone surface of the silicone layer to obtain a silicone surface at least partly covered by surfactant. A mold is formed on the silicone surface at least partly covered by surfactant. The surfactant includes surfactant molecules comprising an inorganic skeleton terminated by organic compounds.
    Type: Application
    Filed: November 14, 2017
    Publication date: May 24, 2018
    Applicant: Infineon Technologies Austria AG
    Inventors: Joachim Hirschler, Christoffer Erbert, Markus Heinrici, Mathias Plappert, Caterina Travan
  • Patent number: 9929111
    Abstract: A method of manufacturing a layer structure includes: forming a first layer over a substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface; wherein a porosity of the first layer is greater than a porosity of the substrate and greater than a porosity of the second layer; wherein the second layer is formed by physical vapor deposition; and wherein the first layer and the second layer are formed from the same solid material.
    Type: Grant
    Filed: March 17, 2017
    Date of Patent: March 27, 2018
    Assignee: Infineon Technologies AG
    Inventors: Martin Mischitz, Markus Heinrici, Barbara Eichinger, Manfred Schneegans, Stefan Krivec
  • Patent number: 9844134
    Abstract: A device comprises a base element and a metallization layer over the base element. The metallization layer comprises pores and has a varying degree of porosity, the degree of porosity being higher in a portion adjacent to the base element than in a portion remote from the base element.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: December 12, 2017
    Assignee: Infineon Technologies AG
    Inventors: Martin Mischitz, Markus Heinrici, Stefan Schwab
  • Patent number: 9818602
    Abstract: A method a described which includes depositing a first component of a multicomponent system by means of an inkjet process, and depositing a second component of the multicomponent system by means of an inkjet process.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: November 14, 2017
    Assignees: Infineon Technologies AG, Technische Universität Graz
    Inventors: Stefan Schwab, Markus Heinrici, Rafael Janski, Susanne Kraeuter, Martin Mischitz
  • Patent number: 9793119
    Abstract: According to various embodiments, a method of processing a substrate may include: disposing a viscous material over a substrate including at least one topography feature extending into the substrate to form a protection layer over the substrate; adjusting a viscosity of the viscous material during a contacting period of the viscous material and the substrate to stabilize a spatial distribution of the viscous material as disposed; processing the substrate using the protection layer as mask; and removing the protection layer after processing the substrate.
    Type: Grant
    Filed: November 10, 2016
    Date of Patent: October 17, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Martin Mischitz, Markus Heinrici, Florian Bernsteiner
  • Patent number: 9768023
    Abstract: According to various embodiments, a method of processing a substrate may include: disposing a viscous material over a substrate including at least one topography feature extending into the substrate to form a protection layer over the substrate; adjusting a viscosity of the viscous material during a contacting period of the viscous material and the substrate to stabilize a spatial distribution of the viscous material as disposed; processing the substrate using the protection layer as mask; and removing the protection layer after processing the substrate.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: September 19, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Martin Mischitz, Markus Heinrici, Florian Bernsteiner
  • Publication number: 20170207123
    Abstract: According to various embodiments, a method for processing a substrate may include: processing a plurality of device regions in a substrate separated from each other by dicing regions, each device region including at least one electronic component; wherein processing each device region of the plurality of device regions includes: forming a recess into the substrate in the device region, wherein the recess is defined by recess sidewalls of the substrate, wherein the recess sidewalls are arranged in the device region; forming a contact pad in the recess to electrically connect the at least one electronic component, wherein the contact pad has a greater porosity than the recess sidewalls; and singulating the plurality of device regions from each other by dicing the substrate in the dicing region.
    Type: Application
    Filed: January 18, 2016
    Publication date: July 20, 2017
    Inventors: Martin MISCHITZ, Markus HEINRICI, Michael ROESNER, Oliver HELLMUND, Caterina TRAVAN, Manfred SCHNEEGANS, Peter IRSIGLER, Friedrich KROENER
  • Publication number: 20170194272
    Abstract: A method of manufacturing a layer structure includes: forming a first layer over a substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface; wherein a porosity of the first layer is greater than a porosity of the substrate and greater than a porosity of the second layer; wherein the second layer is formed by physical vapor deposition; and wherein the first layer and the second layer are formed from the same solid material.
    Type: Application
    Filed: March 17, 2017
    Publication date: July 6, 2017
    Inventors: Martin MISCHITZ, Markus HEINRICI, Barbara EICHINGER, Manfred SCHNEEGANS, Stefan KRIVEC
  • Publication number: 20170154767
    Abstract: According to various embodiments, a method of processing a substrate may include: disposing a viscous material over a substrate including at least one topography feature extending into the substrate to form a protection layer over the substrate; adjusting a viscosity of the viscous material during a contacting period of the viscous material and the substrate to stabilize a spatial distribution of the viscous material as disposed; processing the substrate using the protection layer as mask; and removing the protection layer after processing the substrate.
    Type: Application
    Filed: November 10, 2016
    Publication date: June 1, 2017
    Inventors: Martin MISCHITZ, Markus HEINRICI, Florian BERNSTEINER
  • Patent number: 9620466
    Abstract: A method of manufacturing an electronic device may include: forming at least one electronic component in a substrate; forming a contact pad in electrical contact with the at least one electronic component; wherein forming the contact pad includes: forming a first layer over the substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface, wherein the second layer has a lower porosity than the first layer.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: April 11, 2017
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Martin Mischitz, Markus Heinrici, Barbara Eichinger, Manfred Schneegans, Stefan Krivec
  • Publication number: 20160225718
    Abstract: A device comprises a base element and a metallization layer over the base element. The metallization layer comprises pores and has a varying degree of porosity, the degree of porosity being higher in a portion adjacent to the base element than in a portion remote from the base element.
    Type: Application
    Filed: January 29, 2015
    Publication date: August 4, 2016
    Inventors: Martin Mischitz, Markus Heinrici, Stefan Schwab
  • Publication number: 20160204017
    Abstract: Various embodiments provide a method of picking up a chip from a carrier system, wherein the method comprises providing a carrier system comprising a plurality of chips comprising edge portions and being attached to a one surface of the carrier system by an adhesive layer; embrittling the adhesive layer selectively at the edge portions of the plurality of chips; and picking up at least one chip of the plurality of chips.
    Type: Application
    Filed: January 13, 2016
    Publication date: July 14, 2016
    Inventors: Michael Roesner, Chu Hua Goh, Markus Heinrici, Joachim Hirschler, Irina Mueller
  • Publication number: 20160082718
    Abstract: A method a described which includes depositing a first component of a multicomponent system by means of an inkjet process, and depositing a second component of the multicomponent system by means of an inkjet process.
    Type: Application
    Filed: September 22, 2015
    Publication date: March 24, 2016
    Inventors: Stefan Schwab, Markus Heinrici, Rafael Janski, Susanne Kraeuter, Martin Mischitz
  • Patent number: 9190322
    Abstract: A method for producing a metal layer on a wafer is described. In one embodiment the method comprises providing a semiconductor wafer including a coating, printing a metal particle paste on the semiconductor wafer thereby forming a metal layer and heating the metal layer in a reductive gas for sintering the metal particle paste or for annealing a sintered metal particle paste in an oven.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: November 17, 2015
    Assignee: Infineon Technologies AG
    Inventors: Martin Mischitz, Manfred Schneegans, Markus Heinrici