Patents by Inventor Markus Kuhn
Markus Kuhn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12205427Abstract: A compensating element having first and second modules is disclosed. A locking mechanism which can be switched between a first and a second operating state is provided. The first module is connected firmly to the second module in the first operating state. The first operating state defines a zero position between the first and the second module. The first and the second module are connected to one another in the second operating state by a spring mechanism in such a way that they are movable relative to one another. The compensating element has a midaxis, and the first and the second module are arranged at least partially next to one another in the direction of the midaxis. A measuring system is also disclosed with which the relative position between the first and the second module can be measured. The first or second module includes an externally visible luminous surface. A luminous state of the luminous surface is dependent on the relative position measured by the measuring system.Type: GrantFiled: May 4, 2022Date of Patent: January 21, 2025Assignee: Robert Bosch GmbHInventors: Efim Kuhn, Andreas Rueb, David Geissler, Fan Yang, Floria Krusche, Markus Groganz, Michael Danzberger, Peter Schlegel, Sebastian Siedler, Thomas Dickmann, Tobias Wolf
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Publication number: 20250008181Abstract: A method includes receiving, by a processor, from a first server, a first plurality of frames associated with a media item. Each frame of the first plurality of frames is associated with a respective timestamp of a first plurality of timestamps generated by the first server. A second plurality of frames associated with the media item are received from a second server. The second plurality of frames are each associated with a respective timestamp of a second plurality of timestamps generated by the second server. An offset value between a first timestamp of the first plurality of timestamps and a second timestamp of the second plurality of timestamps is determined. A modified plurality of frames is generated by modifying, based on the offset value, each timestamp of a subset of the second plurality of timestamps. The modified plurality of frames is sent to the client device.Type: ApplicationFiled: June 29, 2023Publication date: January 2, 2025Inventors: Tristan Schmelcher, Markus Kuhn, Laura McKnight, Alexander Kharitonov, David Kim
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Patent number: 11351030Abstract: A method of designing a set of contoured implants for fixation to a bone of a patient, includes obtaining a set of virtual bone models of the bone, selecting a plurality of points on an outer surface of each virtual bone model in the set of virtual bone models, manufacturing a set of implants, each implant corresponding to a respective virtual bone model and having fixation holes corresponding to the selected plurality of points on the outer surface of the respective virtual bone model, contouring each implant in the set of implants and selecting a contoured implant from the set of implants for fixation to the bone of the patient such that the selected contoured implant corresponds to a size of the bone of the patient.Type: GrantFiled: June 26, 2020Date of Patent: June 7, 2022Assignee: Stryker European Operations Holdings LLCInventors: Markus Kuhn, Reinhard Rübecamp, Andy Perrin, Verena Heizmann
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Publication number: 20220115678Abstract: A humidifier module is provided having a water vapor-permeable membrane having spacers defining a flow field arranged on either side of the membrane and having a yarn stitched into the membrane. The spacers defining the flow field are formed by the yarn stitched into the membrane. A humidifier, a method for making a humidifier module and a method for making a humidifier are also provided.Type: ApplicationFiled: December 3, 2019Publication date: April 14, 2022Inventors: Rune STAECK, Felix ROTHE, Dirk JENSSEN, Martin BUCHENBERGER, Markus KÜHN, Jan BEUSCHER, Sven HARTWIG
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Patent number: 10897009Abstract: Resistive memory cells, precursors thereof, and methods of making resistive memory cells are described. In some embodiments, the resistive memory cells are formed from a resistive memory precursor that includes a switching layer precursor containing a plurality of oxygen vacancies that are present in a controlled distribution therein, optionally without the use of an oxygen exchange layer. In these or other embodiments, the resistive memory precursors described may include a second electrode formed on a switching layer precursor, wherein the second electrode is includes a second electrode material that is conductive but which does not substantially react with oxygen. Devices including resistive memory cells are also described.Type: GrantFiled: May 17, 2019Date of Patent: January 19, 2021Assignee: Intel CorporationInventors: Niloy Mukherjee, Ravi Pillarisetty, Prashant Majhi, Uday Shah, Ryan E Arch, Markus Kuhn, Justin S. Brockman, Huiying Liu, Elijah V Karpov, Kaan Oguz, Brian S. Doyle, Robert S. Chau
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Publication number: 20210007849Abstract: A method of designing a set of contoured implants for fixation to a bone of a patient, includes obtaining a set of virtual bone models of the bone, selecting a plurality of points on an outer surface of each virtual bone model in the set of virtual bone models, manufacturing a set of implants, each implant corresponding to a respective virtual bone model and having fixation holes corresponding to the selected plurality of points on the outer surface of the respective virtual bone model, contouring each implant in the set of implants and selecting a contoured implant from the set of implants for fixation to the bone of the patient such that the selected contoured implant corresponds to a size of the bone of the patient.Type: ApplicationFiled: June 26, 2020Publication date: January 14, 2021Inventors: Markus Kuhn, Reinhard Rübecamp, Andy Perrin, Verena Heizmann
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Patent number: 10516109Abstract: Resistive memory cells, precursors thereof, and methods of making resistive memory cells are described. In some embodiments, the resistive memory cells are formed from a resistive memory precursor that includes a switching layer precursor containing a plurality of oxygen vacancies that are present in a controlled distribution therein, optionally without the use of an oxygen exchange layer. In these or other embodiments, the resistive memory precursors described may include a second electrode formed on a switching layer precursor, wherein the second electrode is includes a second electrode material that is conductive but which does not substantially react with oxygen. Devices including resistive memory cells are also described.Type: GrantFiled: December 24, 2014Date of Patent: December 24, 2019Assignee: Intel CorporationInventors: Niloy Mukherjee, Ravi Pillarisetty, Prashant Majhi, Uday Shah, Ryan E Arch, Markus Kuhn, Justin S. Brockman, Huiying Liu, Elijah V Karpov, Kaan Oguz, Brian S. Doyle, Robert S. Chau
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Publication number: 20190348604Abstract: Resistive memory cells, precursors thereof, and methods of making resistive memory cells are described. In some embodiments, the resistive memory cells are formed from a resistive memory precursor that includes a switching layer precursor containing a plurality of oxygen vacancies that are present in a controlled distribution therein, optionally without the use of an oxygen exchange layer. In these or other embodiments, the resistive memory precursors described may include a second electrode formed on a switching layer precursor, wherein the second electrode is includes a second electrode material that is conductive but which does not substantially react with oxygen. Devices including resistive memory cells are also described.Type: ApplicationFiled: May 17, 2019Publication date: November 14, 2019Applicant: INTEL CORPORATIONInventors: NILOY MUKHERJEE, RAVI PILLARISETTY, PRASHANT MAJHI, UDAY SHAH, RYAN E ARCH, MARKUS KUHN, JUSTIN S. BROCKMAN, HUIYING LIU, ELIJAH V KARPOV, KAAN OGUZ, BRIAN S. DOYLE, ROBERT S. CHAU
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Patent number: 10463411Abstract: The invention relates to a surgical retaining instrument for bone plates. The retaining instrument comprises a carrying element and two plate retaining jaws arranged on the carrying element. The mutual distance of the plate retaining jaws can be changed in order to pick up or release a bone plate. Furthermore, an actuating device is provided, which has two arms, which can be moved relative to each other and which are designed to change the mutual distance of the plate retaining jaws. The carrying element is rotatably mounted relative to the arms.Type: GrantFiled: January 12, 2012Date of Patent: November 5, 2019Assignee: Stryker European Holdings I, LLCInventors: Christian Knoepfle, Karl Greiner, Manfred Schmuck, Uwe Koerner, Markus Kuhn
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Patent number: 10400801Abstract: A compact unit has an electric motor accommodated in housing parts (7, 55) of a unit housing (45) and driving at least one hydraulic pump and giving off heat at the same time, an air heat-exchanging device, and a fan (19) drivable to produce an air flow. A flow-conducting device (47, 55) divides the air flow at least in a first partial flow flowing around the electric motor and a second partial flow flowing to the heat-exchanging device in the unit housing (45). Alternatively, arranged in series, the air flow first flows against the electric motor and then the heat-exchanging device, or that the incidence of the air flow occurs at least partially in the reverse direction.Type: GrantFiled: January 14, 2015Date of Patent: September 3, 2019Assignee: HYDAC FLUIDTECHNIK GMBHInventors: Andreas Boehler, Markus Kuhn
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Patent number: 10304929Abstract: Techniques are disclosed for enabling multi-sided condensation of semiconductor fins. The techniques can be employed, for instance, in fabricating fin-based transistors. In one example case, a strain layer is provided on a bulk substrate. The strain layer is associated with a critical thickness that is dependent on a component of the strain layer, and the strain layer has a thickness lower than or equal to the critical thickness. A fin is formed in the substrate and strain layer, such that the fin includes a substrate portion and a strain layer portion. The fin is oxidized to condense the strain layer portion of the fin, so that a concentration of the component in the strain layer changes from a pre-condensation concentration to a higher post-condensation concentration, thereby causing the critical thickness to be exceeded.Type: GrantFiled: July 14, 2017Date of Patent: May 28, 2019Assignee: Intel CorporationInventors: Jack T. Kavalieros, Nancy Zelick, Been-Yih Jin, Markus Kuhn, Stephen M. Cea
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Publication number: 20180062077Abstract: Resistive memory cells, precursors thereof, and methods of making resistive memory cells are described. In some embodiments, the resistive memory cells are formed from a resistive memory precursor that includes a switching layer precursor containing a plurality of oxygen vacancies that are present in a controlled distribution therein, optionally without the use of an oxygen exchange layer. In these or other embodiments, the resistive memory precursors described may include a second electrode formed on a switching layer precursor, wherein the second electrode is includes a second electrode material that is conductive but which does not substantially react with oxygen. Devices including resistive memory cells are also described.Type: ApplicationFiled: December 24, 2014Publication date: March 1, 2018Applicant: Intel CorporationInventors: NILOY MUKHERJEE, RAVI PILLARISETTY, PRASHANT MAJHI, UDAY SHAH, RYAN E ARCH, MARKUS KUHN, JUSTIN S. BROCKMAN, HUIYING LIU, ELIJAH V KARPOV, KAAN OGUZ
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Publication number: 20170317172Abstract: Techniques are disclosed for enabling multi-sided condensation of semiconductor fins. The techniques can be employed, for instance, in fabricating fin-based transistors. In one example case, a strain layer is provided on a bulk substrate. The strain layer is associated with a critical thickness that is dependent on a component of the strain layer, and the strain layer has a thickness lower than or equal to the critical thickness. A fin is formed in the substrate and strain layer, such that the fin includes a substrate portion and a strain layer portion. The fin is oxidized to condense the strain layer portion of the fin, so that a concentration of the component in the strain layer changes from a pre-condensation concentration to a higher post-condensation concentration, thereby causing the critical thickness to be exceeded.Type: ApplicationFiled: July 14, 2017Publication date: November 2, 2017Inventors: Jack T. KAVALIEROS, Nancy ZELICK, Been-Yih JIN, Markus KUHN, Stephen M. CEA
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Patent number: 9711598Abstract: Techniques are disclosed for enabling multi-sided condensation of semiconductor fins The techniques can be employed, for instance, in fabricating fin-based transistors. In one example case, a strain layer is provided on a bulk substrate. The strain layer is associated with a critical thickness that is dependent on a component of the strain layer, and the strain layer has a thickness lower than or equal to the critical thickness. A fin is formed in the substrate and strain layer, such that the fin includes a substrate portion and a strain layer portion. The fin is oxidized to condense the strain layer portion of the fin, so that a concentration of the component in the strain layer changes from a pre-condensation concentration to a higher post-condensation concentration, thereby causing the critical thickness to be exceeded.Type: GrantFiled: July 21, 2016Date of Patent: July 18, 2017Assignee: Intel CorporationInventors: Jack T. Kavalieros, Nancy Zelick, Been-Yih Jin, Markus Kuhn, Stephen M. Cea
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Patent number: 9680013Abstract: A method and a device made according to the method. The method comprises providing a substrate including a first material, and providing a fin including a second material, the fin being disposed on the substrate and having a device active portion, the first material and the second material presenting a lattice mismatch between respective crystalline structures thereof. Providing the fin includes providing a biaxially strained film including the second material on the substrate; and removing parts of the biaxially strained film to form a substantially uniaxially strained fin therefrom.Type: GrantFiled: September 5, 2013Date of Patent: June 13, 2017Assignee: Intel CorporationInventors: Stephen M. Cea, Roza Kotlyar, Jack T. Kavalieros, Martin D. Giles, Tahir Ghani, Kelin J. Kuhn, Markus Kuhn, Nancy M. Zelick
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Publication number: 20170058923Abstract: The invention relates to a compact unit, at least consisting of an electric motor, which is accommodated in housing parts (7, 55) of a unit housing (45) and which drives at least one hydraulic pump and gives off heat at the same time, an air heat-exchanging device, and a fan (19), which can be driven in order t o produce an air flow. The compact unit is characerized in that a flow-conducting device (47, 55) that divides off from the air flow at least a first partial flow flowing around the electric motor and a second partial flow flowing to the heat-exchanging device is present in the unit housing (45), or that, arranged in series, the air flow first flows against the electric motor and then the heat-exchanging device, or that the incidence of the air flow occurs at least partially in the reverse direction.Type: ApplicationFiled: January 14, 2015Publication date: March 2, 2017Inventors: Andreas BOEHLER, Markus KUHN
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Publication number: 20160329403Abstract: Techniques are disclosed for enabling multi-sided condensation of semiconductor fins The techniques can be employed, for instance, in fabricating fin-based transistors. In one example case, a strain layer is provided on a bulk substrate. The strain layer is associated with a critical thickness that is dependent on a component of the strain layer, and the strain layer has a thickness lower than or equal to the critical thickness. A fin is formed in the substrate and strain layer, such that the fin includes a substrate portion and a strain layer portion. The fin is oxidized to condense the strain layer portion of the fin, so that a concentration of the component in the strain layer changes from a pre-condensation concentration to a higher post-condensation concentration, thereby causing the critical thickness to be exceeded.Type: ApplicationFiled: July 21, 2016Publication date: November 10, 2016Inventors: Jack T. Kavalieros, Nancy Zelick, Been-Yih Jin, Markus Kuhn, Stephen M. Cea
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Patent number: 9419140Abstract: Techniques are disclosed for enabling multi-sided condensation of semiconductor fins. The techniques can be employed, for instance, in fabricating fin-based transistors. In one example case, a strain layer is provided on a bulk substrate. The strain layer is associated with a critical thickness that is dependent on a component of the strain layer, and the strain layer has a thickness lower than or equal to the critical thickness. A fin is formed in the substrate and strain layer, such that the fin includes a substrate portion and a strain layer portion. The fin is oxidized to condense the strain layer portion of the fin, so that a concentration of the component in the strain layer changes from a pre-condensation concentration to a higher post-condensation concentration, thereby causing the critical thickness to be exceeded.Type: GrantFiled: October 13, 2015Date of Patent: August 16, 2016Assignee: Intel CorporationInventors: Jack T. Kavalieros, Nancy Zelick, Been-Yih Jin, Markus Kuhn, Stephen M. Cea
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Publication number: 20160049513Abstract: Techniques are disclosed for enabling multi-sided condensation of semiconductor fins. The techniques can be employed, for instance, in fabricating fin-based transistors. In one example case, a strain layer is provided on a bulk substrate. The strain layer is associated with a critical thickness that is dependent on a component of the strain layer, and the strain layer has a thickness lower than or equal to the critical thickness. A fin is formed in the substrate and strain layer, such that the fin includes a substrate portion and a strain layer portion. The fin is oxidized to condense the strain layer portion of the fin, so that a concentration of the component in the strain layer changes from a pre-condensation concentration to a higher post-condensation concentration, thereby causing the critical thickness to be exceeded.Type: ApplicationFiled: October 13, 2015Publication date: February 18, 2016Inventors: Jack T. Kavalieros, Nancy Zelick, Been-Yih Jin, Markus Kuhn, Stephen M. Cea
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Patent number: 9159835Abstract: Techniques are disclosed for enabling multi-sided condensation of semiconductor fins. The techniques can be employed, for instance, in fabricating fin-based transistors. In one example case, a strain layer is provided on a bulk substrate. The strain layer is associated with a critical thickness that is dependent on a component of the strain layer, and the strain layer has a thickness lower than or equal to the critical thickness. A fin is formed in the substrate and strain layer, such that the fin includes a substrate portion and a strain layer portion. The fin is oxidized to condense the strain layer portion of the fin, so that a concentration of the component in the strain layer changes from a pre-condensation concentration to a higher post-condensation concentration, thereby causing the critical thickness to be exceeded.Type: GrantFiled: June 4, 2012Date of Patent: October 13, 2015Assignee: Intel CorporationInventors: Jack T. Kavalieros, Nancy Zelick, Been-Yih Jin, Markus Kuhn, Stephen M. Cea