Patents by Inventor Martin Fennell

Martin Fennell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240071611
    Abstract: Systems, devices, and methods are provided that enable the revision of RF command handling software stored in ROM, and that enable to supplementation of RF command handling software stored in ROM. Examples of the systems, devices, and methods make use of a lookup data structure stored within writable non-volatile memory.
    Type: Application
    Filed: August 2, 2023
    Publication date: February 29, 2024
    Inventors: Xuandong Hua, Jean-Pierre Cole, Martin Fennell, Theodore J. Kunich, Lane Westlund, Arni Ingimundarson
  • Patent number: 11763941
    Abstract: Systems, devices, and methods are provided that enable the revision of RF command handling software stored in ROM, and that enable to supplementation of RF command handling software stored in ROM. Examples of the systems, devices, and methods make use of a lookup data structure stored within writable non-volatile memory.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: September 19, 2023
    Assignee: ABBOTT DIABETES CARE INC.
    Inventors: Xuandong Hua, Jean-Pierre Cole, Martin Fennell, Theodore J. Kunich, Lane Westlund, Arni Ingimundarson
  • Publication number: 20220301704
    Abstract: Systems, devices, and methods are provided that enable the revision of RF command handling software stored in ROM, and that enable to supplementation of RF command handling software stored in ROM. Examples of the systems, devices, and methods make use of a lookup data structure stored within writable non-volatile memory.
    Type: Application
    Filed: January 5, 2022
    Publication date: September 22, 2022
    Inventors: Xuandong Hua, Jean-Pierre Cole, Martin Fennell, Theodore J. Kunich, Lane Westlund, Arni Ingimundarson
  • Patent number: 11250949
    Abstract: Systems, devices, and methods are provided that enable the revision of RF command handling software stored in ROM, and that enable to supplementation of RF command handling software stored in ROM. Examples of the systems, devices, and methods make use of a lookup data structure stored within writable non-volatile memory.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: February 15, 2022
    Assignee: ABBOTT DIABETES CARE INC.
    Inventors: Xuandong Hua, Jean-Pierre Cole, Martin Fennell, Theodore J. Kunich, Lane Westlund, Arni Ingimundarson
  • Publication number: 20200058395
    Abstract: Systems, devices, and methods are provided that enable the revision of RF command handling software stored in ROM, and that enable to supplementation of RF command handling software stored in ROM. Examples of the systems, devices, and methods make use of a lookup data structure stored within writable non-volatile memory.
    Type: Application
    Filed: October 24, 2019
    Publication date: February 20, 2020
    Inventors: Xuandong Hua, Jean-Pierre Cole, Martin Fennell, Theodore J. Kunich, Lane Westlund, Arni Ingimundarson
  • Patent number: 10497473
    Abstract: Systems, devices, and methods are provided that enable the revision of RF command handling software stored in ROM, and that enable to supplementation of RF command handling software stored in ROM. Examples of the systems, devices, and methods make use of a lookup data structure stored within writable non-volatile memory.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: December 3, 2019
    Assignee: ABBOTT DIABETES CARE INC.
    Inventors: Xuandong Hua, Jean-Pierre Cole, Martin Fennell, Theodore J. Kunich, Lane Westlund, Arni Ingimundarson
  • Publication number: 20160140306
    Abstract: Systems, devices, and methods are provided that enable the revision of RF command handling software stored in ROM, and that enable to supplementation of RF command handling software stored in ROM. Examples of the systems, devices, and methods make use of a lookup data structure stored within writable non-volatile memory.
    Type: Application
    Filed: November 18, 2015
    Publication date: May 19, 2016
    Inventors: Xuandong Hua, Jean-Pierre Cole, Martin Fennell, Theodore J. Kunich, Lane Westlund, Arni Ingimundarson
  • Patent number: 8863053
    Abstract: A system generally including a clock structure analysis tool, a static timing analysis tool and a waveform tool is disclosed. The clock structure analysis tool may be configured to generate a simplified clock structure for a clock signal in a complex clock structure in a design of a circuit. The static timing analysis tool may be configured to generate a plurality of results for a plurality of intermediate signals in the simplified clock structure in response to a static timing analysis of the design. The waveform tool may be configured to generate a first representation in a graphical user interface format of the intermediate signals and the results.
    Type: Grant
    Filed: August 27, 2013
    Date of Patent: October 14, 2014
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Juergen Dirks, Martin Fennell, Matthias Dinter
  • Patent number: 8739094
    Abstract: A method of estimating power consumption of an electronic device is performed by a processing device. The estimating includes estimating a power consumption of a gate-level implementation of an electronic device design. The estimating further includes independently calculating for each of a plurality of implementation-invariant nodes of the design an incremental power dissipation associated with that node.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: May 27, 2014
    Assignee: LSI Corporation
    Inventors: Martin Fennell, James Monthie, Iain Stickland
  • Publication number: 20130346932
    Abstract: A system generally including a clock structure analysis tool, a static timing analysis tool and a waveform tool is disclosed. The clock structure analysis tool may be configured to generate a simplified clock structure for a clock signal in a complex clock structure in a design of a circuit. The static timing analysis tool may be configured to generate a plurality of results for a plurality of intermediate signals in the simplified clock structure in response to a static timing analysis of the design. The waveform tool may be configured to generate a first representation in a graphical user interface format of the intermediate signals and the results.
    Type: Application
    Filed: August 27, 2013
    Publication date: December 26, 2013
    Applicant: LSI Corporation
    Inventors: Juergen Dirks, Martin Fennell, Matthias Dinter
  • Patent number: 8539407
    Abstract: A system generally including a clock structure analysis tool, a static timing analysis tool and a waveform tool is disclosed. The clock structure analysis tool may be configured to generate a simplified clock structure for a clock signal in a complex clock structure in a design of a circuit. The static timing analysis tool may be configured to generate a plurality of results for a plurality of intermediate signals in the simplified clock structure in response to a static timing analysis of the design. The waveform tool may be configured to generate a first representation in a graphical user interface format of the intermediate signals and the results.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: September 17, 2013
    Assignee: LSI Corporation
    Inventors: Juergen Dirks, Martin Fennell, Matthias Dinter
  • Publication number: 20130167098
    Abstract: A method of estimating power consumption of an electronic device is performed by a processing device. The estimating includes estimating a power consumption of a gate-level implementation of an electronic device design. The estimating further includes independently calculating for each of a plurality of implementation-invariant nodes of the design an incremental power dissipation associated with that node.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 27, 2013
    Inventors: Martin Fennell, James Monthie, Iain Stickland
  • Publication number: 20130167096
    Abstract: A method of designing an integrated circuit includes receiving a placement database of logic devices of an electronic device design that includes first and second logic devices. The method further includes determining a first timing window associated with a first state transition of the first logic device, and a second timing window associated with a second state transition of the second logic device. In the event that the first and second timing windows overlap, the placement database is modified, thereby reducing interaction of the first and second logic devices.
    Type: Application
    Filed: December 22, 2011
    Publication date: June 27, 2013
    Applicant: LSI Corporation
    Inventors: Martin Fennell, James Monthie, Iain Stickland
  • Publication number: 20130088275
    Abstract: A clock tree power decoupling system includes a pre-decoupling processor that provides a clock tree that supports a critical timing path condition. The clock tree power decoupling system also includes a clock tree power decoupler having a clock tree module that identifies clock buffers in the clock tree corresponding to synchronous start and end points of the critical timing path condition, and a power decoupling module that inserts a decoupling capacitance proximate the clock buffers in the clock tree, wherein the decoupling capacitance is sized to rectify the critical timing path condition. The clock tree power decoupling system additionally includes a post-decoupling processor that provides a power-decoupled clock-inserted database employing the decoupling capacitance. A method of clock tree power decoupling is also provided.
    Type: Application
    Filed: October 6, 2011
    Publication date: April 11, 2013
    Applicant: LSI Corporation
    Inventors: Martin Fennell, Iain Stickland, James G. Monthie
  • Publication number: 20090246104
    Abstract: A Bayer liquor is produced by dissolving bauxite in hot caustic soda. The liquor is cooled so that it is supersaturated, and seed crystals of gibbsite are added to the liquor (16). At the same time at least part of the liquor is subjected to intense ultrasonic irradiation (34) such as to cause cavitation, preferably by passing liquor and seed crystals (28) through a recirculation duct (30). The ultrasound increases the proportion of fines by breaking up any crystal agglomerates and also by generating crystal nuclei, and also removes fouling from crystal surfaces. The precipitation process is consequently more effective. If ultrasound is applied when measurements indicate that there are insufficient fines in the liquor, this improves the consistency of the precipitation process.
    Type: Application
    Filed: June 17, 2005
    Publication date: October 1, 2009
    Inventors: Linda Jane McCausland, Martin Fennell
  • Publication number: 20090150846
    Abstract: A system generally including a clock structure analysis tool, a static timing analysis tool and a waveform tool is disclosed. The clock structure analysis tool may be configured to generate a simplified clock structure for a clock signal in a complex clock structure in a design of a circuit. The static timing analysis tool may be configured to generate a plurality of results for a plurality of intermediate signals in the simplified clock structure in response to a static timing analysis of the design. The waveform tool may be configured to generate a first representation in a graphical user interface format of the intermediate signals and the results.
    Type: Application
    Filed: February 19, 2009
    Publication date: June 11, 2009
    Inventors: Juergen Dirks, Martin Fennell, Matthias Dinter
  • Patent number: 7546560
    Abstract: A method for optimizing a design of a circuit is disclosed. The method generally includes the steps of (A) identifying a plurality of first flip flops in the design and (B) replacing each of the first flip flops in a file of the design that do not have to be initialized during operations of the circuit with a respective second flip flop without an initialization capability.
    Type: Grant
    Filed: December 6, 2006
    Date of Patent: June 9, 2009
    Assignee: LSI Corporation
    Inventors: Juergen Dirks, Martin Fennell, Iain Stickland
  • Patent number: 7523426
    Abstract: A system generally including a clock structure analysis tool, a static timing analysis tool and a waveform tool is disclosed. The clock structure analysis tool may be configured to generate a simplified clock structure for a clock signal in a complex clock structure in a design of a circuit. The static timing analysis tool may be configured to generate a plurality of results for a plurality of intermediate signals in the simplified clock structure in response to a static timing analysis of the design. The waveform tool may be configured to generate a first representation in a graphical user interface format of the intermediate signals and the results.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: April 21, 2009
    Assignee: LSI Corporation
    Inventors: Juergen Dirks, Martin Fennell, Matthias Dinter
  • Publication number: 20090087360
    Abstract: The Bayer process uses hot sodium hydroxide solution to obtain pure alumina from bauxite ore. Alumina dissolves, and is then precipitated, and the remaining caustic Bayer liquor can be recycled for use again. However sodium oxalate tends to build up in the recycled liquor, and causes problems. By removing a stream of the liquor, treating it so as to be supersaturated with sodium oxalate, and then subjecting it to ultrasonic irradiation, crystal nuclei are formed. The resultant crystals can then be separated from the liquor. Surprisingly, other organic compounds in solution do not prevent this crystallisation process from being effective.
    Type: Application
    Filed: March 3, 2005
    Publication date: April 2, 2009
    Inventors: Linda Jane McCausland, Martin Fennell
  • Publication number: 20090026064
    Abstract: In the Bayer process for the production of alumina, problems are caused by silica dissolving in the caustic liquor. This silica arises from the presence of kaolin in the bauxite. A process for removing this kaolin comprises contacting the bauxite with sodium hydroxide solution to form a mixture, and subjecting the mixture to intense ultrasonic irradiation to cause cavitation; this can be carried out at temperatures below 100° C. This enhances both the dissolution of kaolin and the precipitation of sodium aluminium silicate. Silica remaining in solution in spent Bayer liquor (after digestion and then precipitation of gibbsite) can be removed by a similar ultrasonic irradiation treatment to cause it to precipitate before it forms scale in heat exchangers.
    Type: Application
    Filed: June 23, 2005
    Publication date: January 29, 2009
    Applicant: ACCENTUS PLC
    Inventors: Linda Jane McCausland, Martin Fennell