Abstract: A method for optimizing a design of a circuit is disclosed. The method generally includes the steps of (A) identifying a plurality of first flip flops in the design and (B) replacing each of the first flip flops in a file of the design that do not have to be initialized during operations of the circuit with a respective second flip flop without an initialization capability.

Abstract: Method and apparatus for providing a disposable power supply source integrated into the housing of the transmitter unit mount that is placed on the skin of the patient, and configured to receive the transmitter unit is disclosed. The transmitter unit mount is configured to be disposable with the analyte sensor so that power supply providing power to the transmitter unit is also replaced. The transmitter unit may include a rechargeable battery that is recharged by the power supply unit of the transmitter unit mount when the transmitter is mounted to the transmitter unit mount. Other energy store configurations including single large capacitor (supercap) or a capacitor and DC/DC converter configurations are disclosed.

Abstract: Method and apparatus for providing a leak detection circuit for data monitoring and management system using the guard trace of a glucose sensor by applying a leak detection test signal to determine whether a leakage current is present is provided. The leak detection circuit may includes an interface circuit such as a capacitor coupled to the guard trace to detect the leakage current when the leak detection test signal is applied to the guard trace, such that the user or patient using the data monitoring and management system such as glucose monitoring systems may be promptly and accurately notified of a failed sensor, and to alert the user to replace the sensor.

Abstract: A system generally including a clock structure analysis tool, a static timing analysis tool and a waveform tool is disclosed. The clock structure analysis tool may be configured to generate a simplified clock structure for a clock signal in a complex clock structure in a design of a circuit. The static timing analysis tool may be configured to generate a plurality of results for a plurality of intermediate signals in the simplified clock structure in response to a static timing analysis of the design. The waveform tool may be configured to generate a first representation in a graphical user interface format of the intermediate signals and the results.