Abstract: A sensor having a particular application in the field of signature verification is disclosed. In the presently preferred embodiment, two plates are disposed in a spaced apart relationship and constructed to provide a plurality of electrical capacitors. Pressure applied at any point on one plate will cause deflection of that plate toward the other plate changing the capacitance of each capacitor. The change in capacitancegenerates electrical signals which may be combined and processed to provide signals indicative of the location on the plate at which the pressure was applied and indicative of the magnitude of its vertical component. In an alternate embodiment, first and second spaced apart parallel lines are disposed on one plate with a third ground line interlaced between the first and second lines. A voltage is applied across the first and second lines and the capacitance between the first and second lines is measured as a function of the distance between the plates.

Abstract: A phase-locked loop for use in the common T1 systems. The phase relationship of the clock pulse output of a voltage controlled oscillator is determined with respect to an incoming data pulse train. If the clock signal leads the data signal, an error signal of a first polarity is applied to an integrator whose output is provided to the VCO to reduce the frequency of the clock pulse. If the clock signal lags the data signal, an error signal of a second polarity is applied to the integrator whose output is provided to the VCO to increase the frequency of the clock pulse. The logic of the circuitry is such that the output of the integrator is always either increasing or decreasing, even if there is zero phase error between the clock pulse and data pulse (i.e. the loop has infinite gain for zero error). The integrator continues to integrate in a first direction until the frequency of the clock pulses is adjusted so far that the lead is changed to a lag or vice-versa, with respect to the next data pulse.